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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-12-27 08:45:26 -05:00
The PCIe 7.0 specification, section 11, defines the Trusted Execution
Environment (TEE) Device Interface Security Protocol (TDISP). This
protocol definition builds upon Component Measurement and Authentication
(CMA), and link Integrity and Data Encryption (IDE). It adds support for
assigning devices (PCI physical or virtual function) to a confidential VM
such that the assigned device is enabled to access guest private memory
protected by technologies like Intel TDX, AMD SEV-SNP, RISCV COVE, or ARM
CCA.
The "TSM" (TEE Security Manager) is a concept in the TDISP specification
of an agent that mediates between a "DSM" (Device Security Manager) and
system software in both a VMM and a confidential VM. A VMM uses TSM ABIs
to setup link security and assign devices. A confidential VM uses TSM
ABIs to transition an assigned device into the TDISP "RUN" state and
validate its configuration. From a Linux perspective the TSM abstracts
many of the details of TDISP, IDE, and CMA. Some of those details leak
through at times, but for the most part TDISP is an internal
implementation detail of the TSM.
CONFIG_PCI_TSM adds an "authenticated" attribute and "tsm/" subdirectory
to pci-sysfs. Consider that the TSM driver may itself be a PCI driver.
Userspace can watch for the arrival of a "TSM" device,
/sys/class/tsm/tsm0/uevent KOBJ_CHANGE, to know when the PCI core has
initialized TSM services.
The operations that can be executed against a PCI device are split into
two mutually exclusive operation sets, "Link" and "Security" (struct
pci_tsm_{link,security}_ops). The "Link" operations manage physical link
security properties and communication with the device's Device Security
Manager firmware. These are the host side operations in TDISP. The
"Security" operations coordinate the security state of the assigned
virtual device (TDI). These are the guest side operations in TDISP.
Only "link" (Secure Session and physical Link Encryption) operations are
defined at this stage. There are placeholders for the device security
(Trusted Computing Base entry / exit) operations.
The locking allows for multiple devices to be executing commands
simultaneously, one outstanding command per-device and an rwsem
synchronizes the implementation relative to TSM registration/unregistration
events.
Thanks to Wu Hao for his work on an early draft of this support.
Cc: Lukas Wunner <lukas@wunner.de>
Cc: Samuel Ortiz <sameo@rivosinc.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Alexey Kardashevskiy <aik@amd.com>
Co-developed-by: Xu Yilun <yilun.xu@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
Link: https://patch.msgid.link/20251031212902.2256310-5-dan.j.williams@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
350 lines
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350 lines
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# SPDX-License-Identifier: GPL-2.0
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#
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# PCI configuration
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#
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# select this to offer the PCI prompt
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config HAVE_PCI
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bool
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# select this to unconditionally force on PCI support
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config FORCE_PCI
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bool
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select HAVE_PCI
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select PCI
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# select this to provide a generic PCI iomap,
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# without PCI itself having to be defined
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config GENERIC_PCI_IOMAP
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bool
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menuconfig PCI
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bool "PCI support"
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depends on HAVE_PCI
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depends on MMU
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help
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This option enables support for the PCI local bus, including
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support for PCI-X and the foundations for PCI Express support.
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Say 'Y' here unless you know what you are doing.
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if PCI
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config PCI_DOMAINS
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bool
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depends on PCI
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config PCI_DOMAINS_GENERIC
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bool
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select PCI_DOMAINS
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config PCI_SYSCALL
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bool
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source "drivers/pci/pcie/Kconfig"
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config PCI_MSI
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bool "Message Signaled Interrupts (MSI and MSI-X)"
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select GENERIC_MSI_IRQ
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help
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This allows device drivers to enable MSI (Message Signaled
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Interrupts). Message Signaled Interrupts enable a device to
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generate an interrupt using an inbound Memory Write on its
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PCI bus instead of asserting a device IRQ pin.
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Use of PCI MSI interrupts can be disabled at kernel boot time
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by using the 'pci=nomsi' option. This disables MSI for the
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entire system.
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If you don't know what to do here, say Y.
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config PCI_MSI_ARCH_FALLBACKS
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bool
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config PCI_QUIRKS
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default y
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bool "Enable PCI quirk workarounds" if EXPERT
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help
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This enables workarounds for various PCI chipset bugs/quirks.
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Disable this only if your target machine is unaffected by PCI
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quirks.
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config PCI_DEBUG
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bool "PCI Debugging"
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depends on DEBUG_KERNEL
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help
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Say Y here if you want the PCI core to produce a bunch of debug
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messages to the system log. Select this if you are having a
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problem with PCI support and want to see more of what is going on.
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When in doubt, say N.
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config PCI_REALLOC_ENABLE_AUTO
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bool "Enable PCI resource re-allocation detection"
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depends on PCI_IOV
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help
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Say Y here if you want the PCI core to detect if PCI resource
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re-allocation needs to be enabled. You can always use pci=realloc=on
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or pci=realloc=off to override it. It will automatically
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re-allocate PCI resources if SR-IOV BARs have not been allocated by
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the BIOS.
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When in doubt, say N.
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config PCI_STUB
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tristate "PCI Stub driver"
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help
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Say Y or M here if you want be able to reserve a PCI device
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when it is going to be assigned to a guest operating system.
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When in doubt, say N.
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config PCI_PF_STUB
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tristate "PCI PF Stub driver"
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depends on PCI_IOV
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help
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Say Y or M here if you want to enable support for devices that
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require SR-IOV support, while at the same time the PF (Physical
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Function) itself is not providing any actual services on the
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host itself such as storage or networking.
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When in doubt, say N.
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config XEN_PCIDEV_FRONTEND
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tristate "Xen PCI Frontend"
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depends on XEN_PV
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select PCI_XEN
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select XEN_XENBUS_FRONTEND
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default y
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help
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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config PCI_ATS
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bool
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config PCI_IDE
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bool
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config PCI_TSM
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bool "PCI TSM: Device security protocol support"
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select PCI_IDE
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select PCI_DOE
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select TSM
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help
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The TEE (Trusted Execution Environment) Device Interface
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Security Protocol (TDISP) defines a "TSM" as a platform agent
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that manages device authentication, link encryption, link
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integrity protection, and assignment of PCI device functions
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(virtual or physical) to confidential computing VMs that can
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access (DMA) guest private memory.
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Enable a platform TSM driver to use this capability.
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config PCI_DOE
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bool "Enable PCI Data Object Exchange (DOE) support"
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help
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Say Y here if you want be able to communicate with PCIe DOE
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mailboxes.
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config PCI_ECAM
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bool
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config PCI_LOCKLESS_CONFIG
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bool
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config PCI_BRIDGE_EMUL
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bool
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config PCI_IOV
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bool "PCI IOV support"
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select PCI_ATS
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help
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I/O Virtualization is a PCI feature supported by some devices
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which allows them to create virtual devices which share their
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physical resources.
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If unsure, say N.
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config PCI_NPEM
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bool "Native PCIe Enclosure Management"
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depends on LEDS_CLASS=y
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help
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Support for Native PCIe Enclosure Management. It allows managing LED
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indications in storage enclosures. Enclosure must support following
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indications: OK, Locate, Fail, Rebuild, other indications are
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optional.
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config PCI_PRI
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bool "PCI PRI support"
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select PCI_ATS
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help
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PRI is the PCI Page Request Interface. It allows PCI devices that are
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behind an IOMMU to recover from page faults.
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If unsure, say N.
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config PCI_PASID
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bool "PCI PASID support"
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select PCI_ATS
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help
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Process Address Space Identifiers (PASIDs) can be used by PCI devices
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to access more than one IO address space at the same time. To make
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use of this feature an IOMMU is required which also supports PASIDs.
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Select this option if you have such an IOMMU and want to compile the
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driver for it into your kernel.
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If unsure, say N.
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config PCIE_TPH
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bool "TLP Processing Hints"
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help
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This option adds support for PCIe TLP Processing Hints (TPH).
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TPH allows endpoint devices to provide optimization hints, such as
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desired caching behavior, for requests that target memory space.
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These hints, called Steering Tags, can empower the system hardware
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to optimize the utilization of platform resources.
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config PCI_P2PDMA
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bool "PCI peer-to-peer transfer support"
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depends on ZONE_DEVICE
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#
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# The need for the scatterlist DMA bus address flag means PCI P2PDMA
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# requires 64bit
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#
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depends on 64BIT
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select GENERIC_ALLOCATOR
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select NEED_SG_DMA_FLAGS
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help
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Enables drivers to do PCI peer-to-peer transactions to and from
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BARs that are exposed in other devices that are the part of
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the hierarchy where peer-to-peer DMA is guaranteed by the PCI
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specification to work (ie. anything below a single PCI bridge).
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Many PCIe root complexes do not support P2P transactions and
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it's hard to tell which support it at all, so at this time,
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P2P DMA transactions must be between devices behind the same root
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port.
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Enabling this option will reduce the entropy of x86 KASLR memory
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regions. For example - on a 46 bit system, the entropy goes down
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from 16 bits to 15 bits. The actual reduction in entropy depends
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on the physical address bits, on processor features, kernel config
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(5 level page table) and physical memory present on the system.
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If unsure, say N.
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config PCI_LABEL
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def_bool y if (DMI || ACPI)
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select NLS
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config PCI_HYPERV
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tristate "Hyper-V PCI Frontend"
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depends on ((X86 && X86_64) || ARM64) && HYPERV_VMBUS && PCI_MSI && SYSFS
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select PCI_HYPERV_INTERFACE
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select IRQ_MSI_LIB
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help
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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config PCI_DYNAMIC_OF_NODES
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bool "Create Device tree nodes for PCI devices"
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depends on OF_IRQ
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select OF_DYNAMIC
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help
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This option enables support for generating device tree nodes for some
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PCI devices. Thus, the driver of this kind can load and overlay
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flattened device tree for its downstream devices.
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Once this option is selected, the device tree nodes will be generated
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for all PCI bridges.
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choice
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prompt "PCI Express hierarchy optimization setting"
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default PCIE_BUS_DEFAULT
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depends on PCI && EXPERT
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help
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MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
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device parameters that affect performance and the ability to
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support hotplug and peer-to-peer DMA.
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The following choices set the MPS and MRRS optimization strategy
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at compile-time. The choices are the same as those offered for
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the kernel command-line parameter 'pci', i.e.,
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'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
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'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
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This is a compile-time setting and can be overridden by the above
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command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
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config PCIE_BUS_TUNE_OFF
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bool "Tune Off"
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depends on PCI
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help
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Use the BIOS defaults; don't touch MPS at all. This is the same
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as booting with 'pci=pcie_bus_tune_off'.
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config PCIE_BUS_DEFAULT
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bool "Default"
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depends on PCI
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help
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Default choice; ensure that the MPS matches upstream bridge.
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config PCIE_BUS_SAFE
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bool "Safe"
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depends on PCI
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help
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Use largest MPS that boot-time devices support. If you have a
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closed system with no possibility of adding new devices, this
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will use the largest MPS that's supported by all devices. This
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is the same as booting with 'pci=pcie_bus_safe'.
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config PCIE_BUS_PERFORMANCE
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bool "Performance"
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depends on PCI
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help
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Use MPS and MRRS for best performance. Ensure that a given
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device's MPS is no larger than its parent MPS, which allows us to
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keep all switches/bridges to the max MPS supported by their
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parent. This is the same as booting with 'pci=pcie_bus_perf'.
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config PCIE_BUS_PEER2PEER
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bool "Peer2peer"
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depends on PCI
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help
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Set MPS = 128 for all devices. MPS configuration effected by the
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other options could cause the MPS on one root port to be
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different than that of the MPS on another, which may cause
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hot-added devices or peer-to-peer DMA to fail. Set MPS to the
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smallest possible value (128B) system-wide to avoid these issues.
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This is the same as booting with 'pci=pcie_bus_peer2peer'.
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endchoice
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config VGA_ARB
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bool "VGA Arbitration" if EXPERT
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default y
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depends on (PCI && !S390)
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select SCREEN_INFO if X86
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help
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Some "legacy" VGA devices implemented on PCI typically have the same
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hard-decoded addresses as they did on ISA. When multiple PCI devices
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are accessed at same time they need some kind of coordination. Please
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see Documentation/gpu/vgaarbiter.rst for more details. Select this to
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enable VGA arbiter.
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config VGA_ARB_MAX_GPUS
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int "Maximum number of GPUs"
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default 16
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depends on VGA_ARB
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help
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Reserves space in the kernel to maintain resource locking for
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multiple GPUS. The overhead for each GPU is very small.
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source "drivers/pci/hotplug/Kconfig"
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source "drivers/pci/controller/Kconfig"
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source "drivers/pci/endpoint/Kconfig"
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source "drivers/pci/switch/Kconfig"
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source "drivers/pci/pwrctrl/Kconfig"
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endif
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