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2c192b06f1
We can't add the eviction fence without validating the BO. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Sunil Khatri <sunil.khatri@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef AMDGPU_EV_FENCE_H_
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#define AMDGPU_EV_FENCE_H_
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#include <linux/dma-fence.h>
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struct amdgpu_eviction_fence {
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struct dma_fence base;
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spinlock_t lock;
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char timeline_name[TASK_COMM_LEN];
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struct amdgpu_eviction_fence_mgr *evf_mgr;
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};
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struct amdgpu_eviction_fence_mgr {
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u64 ev_fence_ctx;
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atomic_t ev_fence_seq;
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/*
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* Only updated while holding the VM resv lock.
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* Only signaled while holding the userq mutex.
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*/
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struct dma_fence __rcu *ev_fence;
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struct work_struct suspend_work;
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bool shutdown;
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};
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static inline struct dma_fence *
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amdgpu_evf_mgr_get_fence(struct amdgpu_eviction_fence_mgr *evf_mgr)
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{
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struct dma_fence *ev_fence;
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rcu_read_lock();
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ev_fence = dma_fence_get_rcu_safe(&evf_mgr->ev_fence);
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rcu_read_unlock();
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return ev_fence;
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}
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int amdgpu_evf_mgr_attach_fence(struct amdgpu_eviction_fence_mgr *evf_mgr,
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struct amdgpu_bo *bo);
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int amdgpu_evf_mgr_rearm(struct amdgpu_eviction_fence_mgr *evf_mgr,
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struct drm_exec *exec);
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void amdgpu_evf_mgr_detach_fence(struct amdgpu_eviction_fence_mgr *evf_mgr,
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struct amdgpu_bo *bo);
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void amdgpu_evf_mgr_init(struct amdgpu_eviction_fence_mgr *evf_mgr);
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void amdgpu_evf_mgr_shutdown(struct amdgpu_eviction_fence_mgr *evf_mgr);
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void amdgpu_evf_mgr_flush_suspend(struct amdgpu_eviction_fence_mgr *evf_mgr);
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void amdgpu_evf_mgr_fini(struct amdgpu_eviction_fence_mgr *evf_mgr);
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#endif
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