Files
linux/arch/arm64/kernel
Catalin Marinas 534eb6940a arm64: Avoid eager DVMSync reclaim batches with C1-Pro SME erratum
The C1-Pro SME DVMSync workaround currently samples mm_cpumask() from
arch_tlbbatch_add_pending(). It requires a DSB after every batched TLBI
so that the mask read is ordered after the hardware DVMSync, defeating
much of the reclaim batching benefit.

Introduce the sme_active_cpus mask tracking which CPUs run in user-space
with SME enabled and use it for batch flushing instead of accumulating
the mm_cpumask() of the unmapped pages.

Fixes: 0baba94a97 ("arm64: errata: Work around early CME DVMSync acknowledgement")
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Tested-by: Joshua Liu <josliu@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
2026-06-29 12:00:37 +01:00
..
2025-05-21 16:46:37 +02:00
2026-06-05 11:44:36 +01:00
2024-10-28 21:44:29 +00:00
2024-06-28 18:38:31 +01:00
2022-09-26 10:13:14 -07:00
2024-07-10 14:23:38 +02:00