Jiang Jian
fc227d807b
phy: phy-brcm-usb: drop unexpected word "the" in the comments
...
there is an unexpected word "the" in the comments that need to be dropped
file: ./drivers/phy/broadcom/phy-brcm-usb-init.c
line: 864
* Make sure the the second and third memory controller
changed to
* Make sure the second and third memory controller
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com >
Acked-by: Florian Fainelli <f.fainelli@gmail.com >
Link: https://lore.kernel.org/r/20220621122401.115500-1-jiangjian@cdjrlc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:59:17 +05:30
Peter Geis
8dc60f8da2
phy: rockchip-inno-usb2: Sync initial otg state
...
The initial otg state for the phy defaults to device mode. The actual
state isn't detected until an ID IRQ fires. Fix this by syncing the ID
state during initialization.
Fixes: 51a9b2c03d ("phy: rockchip-inno-usb2: Handle ID IRQ")
Signed-off-by: Peter Geis <pgwipeout@gmail.com >
Reviewed-by: Samuel Holland <samuel@sholland.org >
Link: https://lore.kernel.org/r/20220622003140.30365-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:56:53 +05:30
Robert Marko
334fad1854
phy: qcom-qmp-pcie: add IPQ8074 PCIe Gen3 QMP PHY support
...
IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
Gen2 one is already supported, so add the support for the Gen3 one.
It uses the same register layout as IPQ6018.
Signed-off-by: Robert Marko <robimarko@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220621195512.1760362-3-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:55:52 +05:30
Robert Marko
85d43a69db
dt-bindings: phy: qcom,qmp: add IPQ8074 PCIe Gen3 PHY binding
...
IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
Gen2 one is already supported, document the bindings for the Gen3 one.
Signed-off-by: Robert Marko <robimarko@gmail.com >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20220621195512.1760362-2-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:55:52 +05:30
Robert Marko
2ec9bc8d1b
phy: qcom-qmp-pcie: make pipe clock rate configurable
...
IPQ8074 Gen3 PCIe PHY uses 250MHz as the pipe clock rate instead of 125MHz
like every other PCIe QMP PHY does, so make it configurable as part of the
qmp_phy_cfg.
Signed-off-by: Robert Marko <robimarko@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220621195512.1760362-1-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:55:52 +05:30
Johan Hovold
fe841d5ba7
phy: qcom-qmp: clean up hex defines
...
Use lower case hex consistently for define values.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220609120338.4080-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:42:32 +05:30
Johan Hovold
b46ae21d0a
phy: qcom-qmp: clean up define alignment
...
Clean up the QMP defines by removing some stray white space and making
sure values are aligned.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Link: https://lore.kernel.org/r/20220609120338.4080-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:42:32 +05:30
Johan Hovold
74acf0ee6e
phy: qcom-qmp: clean up v4 and v5 define order
...
Clean up the QMP v4 and v5 defines by moving a few entries that were out
of order.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220609120338.4080-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:42:32 +05:30
Johan Hovold
5d5b7d509f
phy: qcom-qmp-usb: clean up pipe clock handling
...
Clean up the pipe clock handling by using dev_err_probe() to handle
probe deferral and dropping the obsolete comment that claimed that the
pipe clock was optional for some other PHY types.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220623113314.29761-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:33:26 +05:30
Johan Hovold
36db6ce1e4
phy: qcom-qmp-pcie-msm8996: drop obsolete pipe clock type check
...
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220623113314.29761-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:33:26 +05:30
Johan Hovold
8f662cd9f6
phy: qcom-qmp-pcie: drop obsolete pipe clock type check
...
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220623113314.29761-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:33:25 +05:30
Markus Schneider-Pargmann
6a23afad44
phy: phy-mtk-dp: Add driver for DP phy
...
This is a new driver that supports the integrated DisplayPort phy for
mediatek SoCs, especially the mt8195. The phy is integrated into the
DisplayPort controller and will be created by the mtk-dp driver. This
driver expects a struct regmap to be able to work on the same registers
as the DisplayPort controller. It sets the device data to be the struct
phy so that the DisplayPort controller can easily work with it.
The driver does not have any devicetree bindings because the datasheet
does not list the controller and the phy as distinct units.
The interaction with the controller can be covered by the configure
callback of the phy framework and its displayport parameters.
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com >
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com >
[Bo-Chen: Modify reviewers' comments.]
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com >
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com >
Link: https://lore.kernel.org/r/20220624062725.4095-1-rex-bc.chen@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:28:09 +05:30
Rahul T R
f6723b8495
phy: cdns-dphy: Add support for DPHY TX on J721e
...
Add support new compatible for dphy-tx on j721e
and implement dphy ops required.
Signed-off-by: Rahul T R <r-ravikumar@ti.com >
Reviewed-by: Pratyush Yadav <p.yadav@ti.com >
Link: https://lore.kernel.org/r/20220623125433.18467-4-r-ravikumar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:23:41 +05:30
Rahul T R
efcd5f5268
phy: cdns-dphy: Add band config for dphy tx
...
Add support for band ctrl config for dphy tx.
Signed-off-by: Rahul T R <r-ravikumar@ti.com >
Reviewed-by: Pratyush Yadav <p.yadav@ti.com >
Link: https://lore.kernel.org/r/20220623125433.18467-3-r-ravikumar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:23:41 +05:30
Rahul T R
79446a2d2b
phy: dt-bindings: cdns,dphy: Add compatible for dphy on j721e
...
Add compatible to support dphy tx on j721e
Signed-off-by: Rahul T R <r-ravikumar@ti.com >
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20220623125433.18467-2-r-ravikumar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:23:41 +05:30
Peter Geis
b113e55913
phy: rockchip-inno-usb2: Prevent incorrect error on probe
...
If a phy supply is designated but isn't available at probe time, an
EPROBE_DEFER is returned. Use dev_err_probe to prevent this from
incorrectly printing during boot.
Signed-off-by: Peter Geis <pgwipeout@gmail.com >
Link: https://lore.kernel.org/r/20220625212711.558495-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:03:21 +05:30
Jiang Jian
f49f2ece44
phy: dphy: drop unexpected word "the" in the comments
...
there is an unexpected word "the" in the comments that need to be dropped
file: ./drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c
line: 139
* when in RxULPS check state, after the the logic enable the analog,
changed to
* when in RxULPS check state, after the logic enable the analog,
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com >
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com >
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com >
Link: https://lore.kernel.org/r/20220621120015.113682-1-jiangjian@cdjrlc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 12:02:03 +05:30
Vidya Sagar
de60266825
phy: tegra: Add PCIe PIPE2UPHY support for Tegra234
...
Synopsys DesignWare core based PCIe controllers in Tegra234 SoC
interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U)
module. For each PCIe lane of a controller, there is a P2U unit
instantiated at hardware level. This driver provides support for the
programming required for each P2U that is going to be used for a PCIe
controller.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com >
Link: https://lore.kernel.org/r/20220629060435.25297-9-vidyas@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 11:44:35 +05:30
Vidya Sagar
93134b0a4b
dt-bindings: PHY: P2U: Add support for Tegra234 P2U block
...
Add support for Tegra234 P2U (PIPE to UPHY) module block which is a glue
module instantiated once for each PCIe lane between Synopsys DesignWare
core based PCIe IP and Universal PHY block.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com >
Reviewed-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20220629060435.25297-2-vidyas@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 11:44:35 +05:30
Jianjun Wang
e4e46bc71c
phy: mediatek: Add PCIe PHY driver
...
Add PCIe GEN3 PHY driver support on MediaTek chipsets.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com >
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com >
Reviewed-by: AngeloGioachino Del Regno <angelogioacchino.delregno@collabora.com >
Link: https://lore.kernel.org/r/20220617070246.20142-3-jianjun.wang@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 10:58:38 +05:30
Jianjun Wang
3a8802528d
dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
...
Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com >
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org >
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com >
Link: https://lore.kernel.org/r/20220617070246.20142-2-jianjun.wang@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 10:58:38 +05:30
Andy Shevchenko
d4a0a189b7
phy: ti: tusb1210: Don't check for write errors when powering on
...
On some platforms, like Intel Merrifield, the writing values during power on
may timeout:
tusb1210 dwc3.0.auto.ulpi: error -110 writing val 0x41 to reg 0x80
phy phy-dwc3.0.auto.ulpi.0: phy poweron failed --> -110
dwc3 dwc3.0.auto: error -ETIMEDOUT: failed to initialize core
dwc3: probe of dwc3.0.auto failed with error -110
which effectively fails the probe of the USB controller.
Drop the check as it was before the culprit commit (see Fixes tag).
Fixes: 09a3512681 ("phy: ti: tusb1210: Improve ulpi_read()/_write() error checking")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com >
Acked-by: Hans de Goede <hdegoede@redhat.com >
Tested-by: Ferry Toth <fntoth@gmail.com >
Link: https://lore.kernel.org/r/20220613160848.82746-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-07-05 10:57:32 +05:30
Lukas Bulwahn
18b3eb79b1
MAINTAINERS: add include/dt-bindings/phy to GENERIC PHY FRAMEWORK
...
Maintainers of the directory Documentation/devicetree/bindings/phy
are also the maintainers of the corresponding directory
include/dt-bindings/phy.
Add the file entry for include/dt-bindings/phy to the appropriate
section in MAINTAINERS.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com >
Link: https://lore.kernel.org/r/20220613122621.18397-1-lukas.bulwahn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:38:59 -07:00
Dmitry Baryshkov
5bef2838f1
phy: qcom-qmp: fix PCIe PHY support
...
Replace init/exit ops with power_on/power_off which should be used for
the PCIe PHYs to fix PHY initialization.
Fixes: da07a06b90 ("phy: qcom-qmp-pcie: drop support for non-PCIe PHY types")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220610185542.3662484-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:38:06 -07:00
Dmitry Baryshkov
fbbf71f374
phy: qcom-qmp: fix msm8996 PCIe PHY support
...
Replace init/exit ops with power_on/power_off which should be used for
the PCIe PHYs to fix PHY initialization.
Fixes: f575ac2d64 ("phy: qcom-qmp-pcie-msm8996: drop support for non-PCIe PHY types")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220610185542.3662484-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:38:06 -07:00
Roger Quadros
4daa43e92e
phy: ti: phy-j721e-wiz: use OF data for device specific data
...
Move device specific data into OF data structure so it
is easier to maintain and we can get rid of if statements.
Signed-off-by: Roger Quadros <rogerq@kernel.org >
Reviewed-by: Matt Ranostay <mranostay@ti.com >
Link: https://lore.kernel.org/r/20220526064121.27625-1-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:33:43 -07:00
Geert Uytterhoeven
5cda442dc0
dt-bindings: phy: renesas: usb3-phy: Spelling s/funcional/functional/
...
Fix a misspelling of the word "functional".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
Acked-by: Rob Herring <robh@kernel.org >
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com >
Link: https://lore.kernel.org/r/3da9bd360e1c83007af0e0e90fa4e6c2b50fdab3.1652100633.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:21:09 -07:00
Alim Akhtar
f1b2d06de1
phy: samsung-ufs: add support for FSD ufs phy driver
...
Adds support for Tesla Full Self-Driving (FSD) ufs phy driver.
This SoC has different cdr lock status offset.
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com >
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com >
Reviewed-by: Chanho Park <chanho61.park@samsung.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20220610104119.66401-4-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:18:37 -07:00
Alim Akhtar
e313216b52
phy: samsung-ufs: move cdr offset to drvdata
...
Move CDR lock offset to drv data so that it can be extended for other SoCs
which are having CDR lock at different register offset.
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com >
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com >
Reviewed-by: Chanho Park <chanho61.park@samsung.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20220610104119.66401-3-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:18:37 -07:00
Alim Akhtar
63f4676dd8
dt-bindings: phy: Add FSD UFS PHY bindings
...
Add tesla,fsd-ufs-phy compatible for Tesla Full Self-Driving (FSD) SoC.
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com >
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20220610104119.66401-2-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:18:37 -07:00
Douglas Anderson
c667d9c630
dt-bindings: phy: List supplies for qcom,edp-phy
...
We're supposed to list the supplies in the dt bindings but there are
none in the eDP PHY bindings.
Looking at the driver in Linux, I can see that there seem to be two
relevant supplies: "vdda-phy" and "vdda-pll". Let's add those to the
bindings.
NOTE: from looking at the Qualcomm datasheet for sc7280, it's not
immediately clear how to figure out how to fill in these supplies. The
only two eDP related supplies are simply described as "power for eDP
0.9V circuits" and "power for eDP 1.2V circuits". From guessing and
from comparing how a similar PHY is hooked up on other similar
Qualcomm boards, I'll make the educated guess that the 1.2V supply
goes to "vdda-phy" and the 0.9V supply goes to "vdda-pll" and I'll use
that in the example here.
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Reviewed-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com >
Link: https://lore.kernel.org/r/20220425140619.2.Iae013f0ff4599294189f3a6e91376fad137bbabf@changeid
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-16 17:09:30 -07:00
Dmitry Baryshkov
e991c2ee65
phy: qcom-qmp-usb: use bulk reset_control API
...
Switch qcom-qmp-usb driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-31-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
ccac084746
phy: qcom-qmp-pcie-msm8996: use bulk reset_control API
...
Switch qcom-qmp-pcie-msm8996 driver to use reset_control_bulk_assert /
_deassert functions rather than hardcoding the loops in the driver
itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-30-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
189ac6b8dd
phy: qcom-qmp-pcie: use bulk reset_control API
...
Switch qcom-qmp-pcie driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-29-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
1de24861af
phy: qcom-qmp-combo: use bulk reset_control API
...
Switch qcom-qmp-combo driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
65753f38f5
phy: qcom-qmp-usb: drop multi-PHY support
...
Each USB QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs. Use phy->init_count to check if the
PHY was initialized rather than duplicating this count.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-27-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
1da7115efa
phy: qcom-qmp-ufs: drop multi-PHY support
...
Each UFS QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-26-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
1239fd711f
phy: qcom-qmp-pcie: drop multi-PHY support
...
Each PCIe QMP PHY device provides just a single PCIe PHY. Drop support
for handling multiple child PHYs.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-25-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
faf83af5d5
phy: qcom-qmp-usb: cleanup the driver
...
Remove the conditionals and options that are not used by any of USB PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-24-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
3e1865ba38
phy: qcom-qmp-ufs: cleanup the driver
...
Remove the conditionals and options that are not used by any of UFS PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-23-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
4856865b0d
phy: qcom-qmp-pcie-msm8996: cleanup the driver
...
Remove the conditionals and options that are not used by the MSM8996
PCIe PHY device. Hardcode has_lane_rst and has_phy_com_ctrl as this is
the case for this PHY.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-22-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
fd9269945f
phy: qcom-qmp-pcie: cleanup the driver
...
Remove the conditionals and options that are not used by any of PCIe PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-21-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
6066bac15b
phy: qcom-qmp-combo: cleanup the driver
...
Remove the conditionals and options that are not used by any of combo
USB+DP PHY devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-20-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
86f5ddddcd
phy: qcom-qmp-usb: drop support for non-USB PHY types
...
Drop remaining support for PHY types other than USB.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-19-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
bc3e83d766
phy: qcom-qmp-ufs: drop support for non-UFS PHY types
...
Drop remaining support for PHY types other than UFS.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-18-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
f575ac2d64
phy: qcom-qmp-pcie-msm8996: drop support for non-PCIe PHY types
...
Drop remaining support for PHY types other than PCIe.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-17-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
da07a06b90
phy: qcom-qmp-pcie: drop support for non-PCIe PHY types
...
Drop remaining support for PHY types other than PCIe.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-16-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
b2bac0f095
phy: qcom-qmp-combo: drop support for PCIe,UFS PHY types
...
Drop remaining support for unused PHY types (PCIe, UFS).
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-15-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
a50280ead1
phy: qcom-qmp: drop old QMP PHY driver source
...
As we have switched to the new (split) QMP PHY driver, drop the old
monolithic QMP driver source.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov
3158e39aa5
phy: qcom-qmp: switch to new split QMP PHY driver
...
Use new split QMP PHY driver and remove all monolith phy-qcom-qmp
driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org > # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20220607213203.2819885-13-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2022-06-09 23:49:41 +05:30