Judy Hsiao
fc1780dba4
arm64: dts: qcom: sc7280: add DP audio to herobrine rt5682 1-mic dtsi
...
1. Add DisplayPort sound node and lpass_cpu node.
2. Adjust the dai-link order to make the order to
be consistent with sc7280-herobrine-audio-rt5682-3mic.dtsi.
Signed-off-by: Judy Hsiao <judyhsiao@chromium.org >
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230118011853.1614566-1-judyhsiao@chromium.org
2023-01-18 16:19:47 -06:00
Johan Hovold
74d6ed033d
arm64: dts: qcom: sm8250: clean up wcd938x codec node
...
Clean up the wcd938x codec node somewhat by adding newline separators,
reordering properties and renaming it 'audio-codec'.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103103141.15807-7-johan+linaro@kernel.org
2023-01-18 16:14:10 -06:00
Johan Hovold
306380dc93
arm64: dts: qcom: sm8450-hdk: move wcd938x codec node
...
The wcd938x codec is not a memory-mapped device and does not belong
under the soc node.
Move the node to the root node to avoid DT validation failures.
While at it, clean up the node somewhat by reordering properties and
renaming it 'audio-codec'.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103103141.15807-6-johan+linaro@kernel.org
2023-01-18 16:14:10 -06:00
Johan Hovold
fdc6a0b272
arm64: dts: qcom: sc8280xp-x13s: move wcd938x codec node
...
The wcd938x codec is not a memory-mapped device and does not belong
under the soc node.
Move the node to the root node to avoid DT validation failures.
While at it, clean up the node somewhat by adding newline separators,
reordering properties and renaming it 'audio-codec'.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103103141.15807-5-johan+linaro@kernel.org
2023-01-18 16:14:10 -06:00
Johan Hovold
acf9061407
arm64: dts: qcom: sc8280xp-x13s: move vamacro node
...
Move the vamacro node to restore the alphabetical sort order.
While at it, add some newline separators to improve readability.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103103141.15807-3-johan+linaro@kernel.org
2023-01-18 16:12:20 -06:00
Johan Hovold
6ded5ed609
arm64: dts: qcom: sc8280xp: disable sound nodes
...
The sound nodes in the SoC dtsi should be disabled by default.
Note that the lpass-tlmm and macro blocks depend on having the board dts
enable the adsp and specifying an appropriate firmware to enable the
q6prm clock controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103103141.15807-2-johan+linaro@kernel.org
2023-01-18 16:12:20 -06:00
Krzysztof Kozlowski
91238d52fb
arm64: dts: qcom: sc8280xp: drop unused properties from tx-macro
...
tx-macro does not have children and does not allow address/size cells:
sc8280xp-crd.dtb: txmacro@3220000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230118094224.51704-3-krzysztof.kozlowski@linaro.org
2023-01-18 11:42:14 -06:00
Krzysztof Kozlowski
c75286fe89
arm64: dts: qcom: sc8280xp: drop bogus clock-controller property
...
There is no "clock-controller" property:
sa8295p-adp.dtb: service@2: clock-controller: 'clock-controller' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230118094224.51704-2-krzysztof.kozlowski@linaro.org
2023-01-18 11:42:14 -06:00
Krzysztof Kozlowski
30186f8573
arm64: dts: qcom: sm8250: drop unused clock-frequency from rx-macro
...
Neither qcom,sm8250-lpass-rx-macro bindings nor the driver use
"clock-frequency" property.
sm8250-mtp.dtb: rxmacro@3200000: Unevaluated properties are not allowed ('clock-frequency' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230118094224.51704-1-krzysztof.kozlowski@linaro.org
2023-01-18 11:42:14 -06:00
Yunlong Jia
c326e851ee
arm64: dts: qcom: sc7180: set ath10k output power calibration string
...
Add the string to load RF output power table for pazquel360 project.
Signed-off-by: Yunlong Jia <ecs.beijing2022@gmail.com >
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230117085212.1.If242b1cd61b2e87e312dd9cf81e20301bae2a5a4@changeid
2023-01-17 14:39:32 -06:00
Bhupesh Sharma
bbcb07d299
arm64: dts: qcom: sm6115: Add debug related nodes
...
Add dtsi nodes related to coresight debug units such
as cti, etm, etr, funnel(s), replicator(s), etc. for
Qualcomm sm6115 SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230116164032.551223-1-bhupesh.sharma@linaro.org
2023-01-17 11:23:33 -06:00
Robert Foss
d96d8f9192
arm64: dts: qcom: sm8350-hdk: Enable lt9611uxc dsi-hdmi bridge
...
The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip.
In order to toggle the board to enable the HDMI output,
switch #7 & #8 on the rightmost multi-switch package have
to be toggled to On.
Signed-off-by: Robert Foss <robert.foss@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230117120223.1055225-4-rfoss@kernel.org
2023-01-17 11:23:29 -06:00
Robert Foss
ea9df63f0f
arm64: dts: qcom: sm8350-hdk: Enable display & dsi nodes
...
Enable the display subsystem and the dsi0 output for
the sm8350-hdk board.
Signed-off-by: Robert Foss <robert.foss@linaro.org >
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230117120223.1055225-3-rfoss@kernel.org
2023-01-17 11:23:29 -06:00
Robert Foss
d4a4410583
arm64: dts: qcom: sm8350: Add display system nodes
...
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
nodes the display subsystem is configured to support
one DSI output.
Signed-off-by: Robert Foss <robert.foss@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230117120223.1055225-2-rfoss@kernel.org
2023-01-17 11:23:29 -06:00
Abel Vesa
6fa1a0f8cb
arm64: dts: qcom: sm8550-mtp: Add UFS host controller and PHY node
...
Enable UFS host controller and PHY node on SM8550 MTP board.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230116141000.1831351-2-abel.vesa@linaro.org
2023-01-17 11:23:29 -06:00
Abel Vesa
35cf1aaab1
arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes
...
Add UFS host controller and PHY nodes.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230116141000.1831351-1-abel.vesa@linaro.org
2023-01-17 11:23:29 -06:00
Konrad Dybcio
2f20f276dd
arm64: dts: qcom: sdm630-nile: Reserve simplefb memory
...
Reserve the bit of memory that simplefb uses to ensure it can always
probe.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230116141451.470158-2-konrad.dybcio@linaro.org
2023-01-17 11:23:29 -06:00
Konrad Dybcio
305db81657
arm64: dts: qcom: sdm630-nile: Don't use underscores in node names
...
Rename the reserved-memory subnodes such that they don't use
undescores.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230116141451.470158-1-konrad.dybcio@linaro.org
2023-01-17 11:23:29 -06:00
Kuogee Hsieh
26c5aa54f5
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out endpoint
...
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/1672163103-31254-2-git-send-email-quic_khsieh@quicinc.com
2023-01-16 21:12:17 -06:00
Krzysztof Kozlowski
eef26fb45b
arm64: dts: qcom: sc7180-trogdor: align DAI children names with DT schema
...
Bindings expect DAI children to be named "dai-link":
sc7180-trogdor-coachz-r1.dtb: lpass@62d87000: Unevaluated properties are not allowed ('hdmi@5', 'mi2s@0', 'mi2s@1' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221227163158.102737-2-krzysztof.kozlowski@linaro.org
2023-01-16 21:11:42 -06:00
Krzysztof Kozlowski
2aa8c53eb8
arm64: dts: qcom: sm8350: drop unused dispcc power-domain-names
...
Display clock controller bindings do not allow power-domain-names:
sm8350-hdk.dtb: clock-controller@af00000: 'power-domain-names' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221227163158.102737-1-krzysztof.kozlowski@linaro.org
2023-01-16 21:11:42 -06:00
Dmitry Baryshkov
86543bc6ee
arm64: dts: qcom: use UFS symbol clocks provided by PHY
...
Remove manually created symbol clocks and replace them with clocks
provided by PHY.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221123104443.3415267-5-dmitry.baryshkov@linaro.org
2023-01-16 21:04:32 -06:00
Dmitry Baryshkov
186b27135a
arm64: dts: qcom: sm8350-hdk: enable PCIe devices
...
Enable PCIe0 and PCIe1 hosts found on SM8350 HDK board.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221118233242.2904088-9-dmitry.baryshkov@linaro.org
2023-01-16 21:00:51 -06:00
Dmitry Baryshkov
6daee40678
arm64: dts: qcom: sm8350: add PCIe devices
...
Add PCIe0 and PCIe1 (and corresponding PHY) devices found on SM8350
platform. The PCIe0 is a 1-lane Gen3 host, PCIe1 is a 2-lane Gen3 host.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221118233242.2904088-8-dmitry.baryshkov@linaro.org
2023-01-16 21:00:51 -06:00
Bjorn Andersson
bb45bb9705
arm64: dts: qcom: sc8280xp: Use MMCX for all DP controllers
...
While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this
relationship and sometimes invokes sync_state on the rpmhpd (MMCX)
before the DisplayPort controller has had a chance to probe.
The result when this happens is that the power is lost to the multimedia
subsystem between the probe of msm_drv and the DisplayPort controller -
which results in an irrecoverable state.
While this is an implementation problem, this aligns the power domain
setting of the one DP instance with that of all the others.
Fixes: 57d6ef683a ("arm64: dts: qcom: sc8280xp: Define some of the display blocks")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Reviewed-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230112135055.3836555-1-quic_bjorande@quicinc.com
2023-01-12 10:00:38 -06:00
Johan Hovold
e15a815884
arm64: dts: qcom: sc8280xp-crd: allow vreg_l3b to be disabled
...
The vreg_l3b supply is used by the eDP, UFS and USB1 PHYs which are now
described by the devicetree so that the regulator no longer needs to be
marked always-on.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230112074503.12185-1-johan+linaro@kernel.org
2023-01-12 09:34:13 -06:00
Mukesh Ojha
1f731bbf71
arm64: dts: qcom: sm8450: Add TCSR halt register space
...
Add TCSR register space and refer it from scm node, so that
it can be used by SCM driver.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/1673513697-30173-2-git-send-email-quic_mojha@quicinc.com
2023-01-12 09:34:05 -06:00
Bjorn Andersson
fe07640280
arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers
...
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level,
not doing so results in occasional lockups. This was previously hidden
by the fact that the display stack incorrectly voted for CX (instead of
MMCX).
Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230112135117.3836655-1-quic_bjorande@quicinc.com
2023-01-12 09:32:04 -06:00
Dmitry Baryshkov
6af6827fb0
arm64: dts: qcom: sm8250: drop the virtual ipa-virt device
...
Drop the virtual ipa-virt device. The interconnects it provided are
going to be represented as <&rpmhcc RPMH_IPA_CLK> clock.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230109002935.244320-13-dmitry.baryshkov@linaro.org
2023-01-11 14:34:13 -06:00
Dmitry Baryshkov
88efcc060e
arm64: dts: qcom: sm8150: drop the virtual ipa-virt device
...
Drop the virtual ipa-virt device. The interconnects it provided are
going to be represented as <&rpmhcc RPMH_IPA_CLK> clock.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230109002935.244320-12-dmitry.baryshkov@linaro.org
2023-01-11 14:34:13 -06:00
Luca Weiss
7592ba4d3e
arm64: dts: qcom: pm7250b: Add BAT_ID vadc channel
...
Add a node describing the ADC5_BAT_ID_100K_PU channel with the
properties taken from downstream kernel.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230106-pm7250b-bat_id-v1-2-82ca8f2db741@fairphone.com
2023-01-11 13:37:38 -06:00
Stephan Gerhold
389d2c9926
arm64: dts: qcom: msm8916: Add DMA for all I2C controllers
...
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi
the DMA channels are already assigned to the SPI controllers but
missing for I2C. Add them there as well.
This also fixes confusing errors in dmesg for each I2C controller:
i2c_qup 78b6000.i2c: tx channel not available
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230107110958.5762-3-stephan@gerhold.net
2023-01-11 13:35:55 -06:00
Stephan Gerhold
0154d3594a
arm64: dts: qcom: msm8916: Enable blsp_dma by default
...
Adding the "dmas" to the I2C controllers prevents probing them if
blsp_dma is disabled (infinite probe deferral). Avoid this by enabling
blsp_dma by default - it's an integral part of the SoC that is almost
always used (even if just for UART).
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230107110958.5762-2-stephan@gerhold.net
2023-01-11 13:35:55 -06:00
Lin, Meng-Bo
599a259a4b
arm64: dts: qcom: msm8916-gplus-fl8005a: Add flash LED
...
FL8005A uses Qualcomm GPIO flash LEDs which is compatible with
SGM3140 Flash LED driver. Add it to the device tree.
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230107133235.139947-1-linmengbo0689@protonmail.com
2023-01-11 13:35:02 -06:00
Lin, Meng-Bo
143b4b845f
arm64: dts: qcom: msm8916-gplus-fl8005a: Add touchscreen
...
FL8005A uses a Focaltech FT5402 touchscreen that is connected to
blsp_i2c5. Add it to the device tree.
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230107133223.139893-1-linmengbo0689@protonmail.com
2023-01-11 13:35:02 -06:00
Lin, Meng-Bo
662a90c4e7
arm64: dts: qcom: msm8916-gplus-fl8005a: Add initial device tree
...
GPLUS FL8005A is a tablet using the MSM8916 SoC released in 2015.
Add a device tree for with initial support for:
- GPIO keys
- GPIO LEDs
- pm8916-vibrator
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- WCNSS (WiFi/BT)
- Regulators
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230107133210.139839-1-linmengbo0689@protonmail.com
2023-01-11 13:35:01 -06:00
Dmitry Baryshkov
2e3015c2d1
arm64: dts: qcom: msm8996: mark apcs as clock provider
...
Now as we added the APCS clock controller support, mark apcs device as
clock provider by adding #clock-cells property.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111191634.2509616-1-dmitry.baryshkov@linaro.org
2023-01-11 13:30:33 -06:00
Johan Hovold
aab961de74
arm64: dts: qcom: sa8540p-pmics: rename pmic labels
...
The SA8540P PMICs are named PMM8540. Rename the devicetree source labels
to reflect this.
Reviewed-by: Brian Masney <bmasney@redhat.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Reviewed-by: Eric Chanudet <echanude@redhat.com >
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111160335.7175-3-johan+linaro@kernel.org
2023-01-11 13:13:55 -06:00
Johan Hovold
32c028fccb
arm64: dts: qcom: sa8540p-pmics: add missing interrupt include
...
Add the missing interrupt-controller include which is needed by the RTC
node.
Reviewed-by: Brian Masney <bmasney@redhat.com >
Reviewed-by: Eric Chanudet <echanude@redhat.com >
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111160335.7175-2-johan+linaro@kernel.org
2023-01-11 13:13:55 -06:00
Johan Hovold
f48c70b111
arm64: dts: qcom: sc8280xp-x13s: enable eDP display
...
Enable the eDP display on MDSS0 DP3, including backlight control.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111133128.31813-1-johan+linaro@kernel.org
2023-01-11 13:10:22 -06:00
Bjorn Andersson
5715698507
arm64: dts: qcom: sa8295-adp: Enable DP instances
...
The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link them all together.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111035906.2975494-4-quic_bjorande@quicinc.com
2023-01-11 13:09:41 -06:00
Bjorn Andersson
4a883a8d80
arm64: dts: qcom: sc8280xp-crd: Enable EDP
...
The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
and link it together with the backlight control.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Reviewed-by: Johan Hovold <johan+linaro@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111035906.2975494-3-quic_bjorande@quicinc.com
2023-01-11 13:09:23 -06:00
Bjorn Andersson
57d6ef683a
arm64: dts: qcom: sc8280xp: Define some of the display blocks
...
Define the display clock controllers, the MDSS instances, the DP phys
and connect these together.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230111035906.2975494-2-quic_bjorande@quicinc.com
2023-01-11 13:08:40 -06:00
Bjorn Andersson
4df6e8fbe6
Revert "dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11"
...
This reverts commit 92ad27fb92 , as this
was applied to the wrong branch and causes merge conflicts.
2023-01-10 23:04:59 -06:00
Dmitry Baryshkov
1de4e112b9
arm64: dts: qcom: msm8996-oneplus-common: drop vdda-supply from DSI PHY
...
14nm DSI PHY has the only supply, vcca. Drop the extra vdda-supply.
Fixes: 5a134c940c ("arm64: dts: qcom: msm8996: add support for oneplus3(t)")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230109042406.312047-1-dmitry.baryshkov@linaro.org
2023-01-10 22:57:13 -06:00
Marijn Suijten
4ce03bb80f
arm64: dts: qcom: sdm845-tama: Add volume up and camera GPIO keys
...
Tama has four GPIO-wired keys: two for camera focus and shutter /
snapshot, and two more for volume up and down. As per the comment these
used to not work because the necessary pin bias was missing, which is
now set via pinctrl on pm8998_gpios.
The missing bias has also been added to the existing volume down button,
which receives a node name and label cleanup at the same time to be more
consistent with other DTS and the newly added buttons. Its deprecated
gpio-key,wakeup property has also been replaced with wakeup-source.
Note that volume up is also available through the usual PON RESIN node,
but unlike other platforms only triggers when the power button is held
down at the same time making it unsuitable to serve as KEY_VOLUMEUP.
Fixes: 30a7f99bef ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230109234133.365644-1-marijn.suijten@somainline.org
2023-01-10 22:53:44 -06:00
Dmitry Baryshkov
19e509d5ea
arm64: dts: qcom: sdm845: make DP node follow the schema
...
Drop the #clock-cells (probably a leftover from the times before the DP
PHY split)
Fixes: eaac4e55a6 ("arm64: dts: qcom: sdm845: add displayport node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230110042126.702147-1-dmitry.baryshkov@linaro.org
2023-01-10 22:53:25 -06:00
Konrad Dybcio
83fe4b9efb
arm64: dts: qcom: msm8998: Use RPM XO
...
Feed GCC and SDHC_2 with the RPM XO instead of the fixed-clock one.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230110143642.986799-1-konrad.dybcio@linaro.org
2023-01-10 22:53:11 -06:00
Manivannan Sadhasivam
ff384ab56f
arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1
...
Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs
received from endpoint devices to the CPU using GIC-ITS MSI controller.
Add support for it.
Currently, BDF (0:0.0) and BDF (1:0.0) are enabled and with the
msi-map-mask of 0xff00, all the 32 devices under these two busses can
share the same Device ID.
The GIC-ITS MSI implementation provides an advantage over internal MSI
implementation using Locality-specific Peripheral Interrupts (LPI) that
would allow MSIs to be targeted for each CPU core.
It should be noted that the MSIs for BDF (1:0.0) only works with Device
ID of 0x5980 and 0x5a00. Hence, the IDs are swapped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org > # Xperia 1 IV (WCN6855)
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230102105821.28243-4-manivannan.sadhasivam@linaro.org
2023-01-10 22:52:00 -06:00
Krzysztof Kozlowski
66b14154e2
arm64: dts: qcom: add missing space before {
...
Add missingh whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221230140133.57885-2-krzysztof.kozlowski@linaro.org
2023-01-10 22:49:18 -06:00