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Author SHA1 Message Date
Qiang Yu
f8af195bee arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 
Describe PCIe3 controller and PHY. Also add required system resources like
regulators, clocks, interrupts and registers configuration for PCIe3.

Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241105073615.3076979-1-quic_qianyu@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-11 22:01:55 -06:00
Maud Spierings
798515297c arm64: dts: qcom: x1e80100-vivobook-s15: Enable the gpu 
Enable the gpu on the snapdragon powered asus vivobook s15

Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Link: https://lore.kernel.org/r/20241110-qcom-asus-gpu-v2-1-5f774b17ced8@hotmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-10 11:34:00 -06:00
Manikanta Mylavarapu
35e0a4f0a3 arm64: dts: qcom: ipq5424: Add smem and tcsr_mutex nodes 
The smem is necessary for the socinfo driver. Additionally
smem requires the tcsr_mutex node. Therefore add both the nodes.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Link: https://lore.kernel.org/r/20241016151528.2893599-4-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:44:40 -08:00
Sricharan Ramabadhran
1a91d2a602 arm64: dts: qcom: add IPQ5424 SoC and rdp466 board support 
Add initial device tree support for the Qualcomm IPQ5424 SoC and
rdp466 board.

Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/20241028060506.246606-6-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:35:47 -08:00
Sricharan Ramabadhran
7aafdbd3f5 dt-bindings: qcom: Add ipq5424 boards 
The IPQ5424 is Qualcomm's 802.11be SoC for Routers, Gateways
and access Points. It has a quad core Cortex-a55 with a per core
L1, Unified L2 caches and a common Unified L3 cache.

Document the new ipq5424 SoC/board device tree bindings.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/20241028060506.246606-5-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:35:47 -08:00
Bjorn Andersson
362dd128c4 Merge branch '20241028060506.246606-3-quic_srichara@quicinc.com' into arm64-for-6.13 
Merge IPQ5424 global clock controller binding through topic branch to
make the constants available for both clock and DeviceTree branches.
 2024-11-05 16:35:21 -08:00
Sricharan Ramabadhran
03e525c66d dt-bindings: clock: Add Qualcomm IPQ5424 GCC binding 
Add binding for the Qualcomm IPQ5424 Global Clock Controller

Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241028060506.246606-3-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:32:44 -08:00
Dmitry Baryshkov
6339e41fa3 arm64: dts: qcom: sar2130p: add QAR2130P board file 
Add board DT file for the Qualcomm Snapdragon AR2 Gen1 Smart Viewer
Development Kit.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241102-sar2130p-dt-v4-3-60b7220fd0dd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:28:39 -08:00
Dmitry Baryshkov
be9115bfe5 arm64: dts: qcom: sar2130p: add support for SAR2130P 
Add DT file for the Qualcomm SAR2130P platform.

Co-developed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241102-sar2130p-dt-v4-2-60b7220fd0dd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:28:39 -08:00
Dmitry Baryshkov
23bb551730 dt-bindings: arm: qcom: add QAR2130P board 
Add the Qualcomm QAR2130P development board using the Qualcomm AR2 Gen1
aka SAR2130P platform.

The qcom-soc.yaml chunks use explicit 'sa|sar' instead of just 'sar?' to
be more obvious for reviewers and to ease future extensions. Overuse of
the regular expressions can easily end up with the hard-to-read and
modify schema.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241102-sar2130p-dt-v4-1-60b7220fd0dd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:28:39 -08:00
Bjorn Andersson
caf1d89001 Merge branch 'icc-sar2130p' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD 
Merge interconnect bindings for SAR2130P to make constants available in
DeviceTree source branch.
 2024-11-05 16:28:09 -08:00
Bjorn Andersson
2aedc97d9a Merge branch '20241027-sar2130p-clocks-v5-0-ecad2a1432ba@linaro.org' into arm64-for-6.13 
Merge SAR2130P clock bindings through topic branch, to allow them being
used in both clock and DeviceTree branches.
 2024-11-05 16:22:51 -08:00
Konrad Dybcio
111481020a dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles 
Expand qcom,sm8450-gpucc bindings to include SAR2130P.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-5-ecad2a1432ba@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:21:11 -08:00
Dmitry Baryshkov
adac76e7ed dt-bindings: clock: qcom,sm8550-dispcc: Add SAR2130P compatible 
Document compatible for the Display Clock Controller on SAR2130P
platform.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-4-ecad2a1432ba@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:19:40 -08:00
Dmitry Baryshkov
528e7bb0ca dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible 
Document compatible for the TCSR Clock Controller on SAR2130P platform.
It is mostly compatible with the SM8550, except that it doesn't provide
UFS clocks.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-3-ecad2a1432ba@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:19:40 -08:00
Dmitry Baryshkov
3ee315537e dt-bindings: clock: qcom: document SAR2130P Global Clock Controller 
Add bindings for the Global Clock Controller (GCC) present on the
Qualcomm SAR2130P platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-2-ecad2a1432ba@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:19:40 -08:00
Dmitry Baryshkov
133e4a44f1 dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible 
Document compatible for RPMh clock controller on SAR2130P platform.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-1-ecad2a1432ba@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 16:19:40 -08:00
Sibi Sankar
019e1ee32f arm64: dts: qcom: x1e001de-devkit: Enable external DP support 
The Qualcomm Snapdragon X Elite Devkit for Windows has the same
configuration as the CRD variant i.e. all 3 of the type C ports
support external DP altmode. Add all the nodes needed to enable
them.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20241025123551.3528206-4-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 11:57:39 -08:00
Sibi Sankar
3844a8682e arm64: dts: qcom: x1e001de-devkit: Add audio related nodes 
The x1e001de devkit devices are expected to ship without external
speaker/mic connected, so just enable headphone jack on it.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20241025123551.3528206-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 11:49:56 -08:00
Sibi Sankar
7b8a31e82b arm64: dts: qcom: Add X1E001DE Snapdragon Devkit for Windows 
Add initial support for x1e001de devkit platform. This includes:

-DSPs
-Ethernet (RTL8125BG) over the pcie 5 instance.
-NVme
-Wifi
-USB-C ports

Link: https://www.qualcomm.com/news/releases/2024/05/qualcomm-accelerates-development-for-copilot--pcs-with-snapdrago
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Acked-by: Marc Zyngier <maz@kernel.org>
Tested-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241025123227.3527720-4-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 11:49:39 -08:00
Sibi Sankar
ab14ec55a2 dt-bindings: arm: qcom: Add Snapdragon Devkit for Windows 
X1E001DE is the speed binned variant of X1E80100 that supports turbo
boost up to 4.3 GHz.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Acked-by: Marc Zyngier <maz@kernel.org>
Tested-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241025123227.3527720-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-05 11:49:39 -08:00
Bryan O'Donoghue
d40fd02c1f arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Add cma heap for libcamera softisp support 
libcamera softisp requires a linux,cma heap export in order to support
user-space debayering, 3a and export to other system components such as
pipewire, Firefox/Chromium - Hangouts, Zoom etc.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-6-cdff2f1a5792@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-01 08:59:18 -05:00
Bryan O'Donoghue
99d557cfe4 arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add cma heap for libcamera softisp support 
libcamera softisp requires a linux,cma heap export in order to support
user-space debayering, 3a and export to other system components such as
pipewire, Firefox/Chromium - Hangouts, Zoom etc.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-5-cdff2f1a5792@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-01 08:59:18 -05:00
Bryan O'Donoghue
2d444a792b arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Drop redundant clock-lanes from camera@1a 
Remove redundant clock-lanes property. The sensor doesn't require
clock-lanes at all. Remove now.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # rb5
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-4-cdff2f1a5792@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-01 08:59:18 -05:00
Bryan O'Donoghue
ec83cf7581 arm64: dts: qcom: sc8280xp-x13s: Drop redundant clock-lanes from camera@10 
clock-lanes does nothing here - the sensor doesn't care about this
property, remove it.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x13s
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-3-cdff2f1a5792@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-01 08:59:18 -05:00
Bryan O'Donoghue
30df676a31 arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Convert mezzanine riser to dtso 
Convert the navigation / camera mezzanine from its own dts to a dtso. A
small amount of additional includes / address / cell size change needs to
be applied to convert.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # rb3
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-2-cdff2f1a5792@linaro.org
[bjorn: Corrected up makefile syntax, added missing cells for cci_i2c1]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-11-01 08:59:03 -05:00
Bryan O'Donoghue
231c03c611 arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Convert mezzanine riser to dtbo 
Convert the navigation / camera mezzanine from its own dts to a dtso. A
small amount of additional includes / address / cell size change needs to
be applied to convert.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # rb5
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-1-cdff2f1a5792@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:13:43 -05:00
Bartosz Golaszewski
fe79fbce6e arm64: dts: qcom: sm8450-hdk: model the PMU of the on-board wcn6855 
Add nodes for the WCN6855 PMU, the WLAN and BT modules and relevant
regulators and pin functions to fully describe how the wifi is actually
wired on this platform.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241018-sc8280xp-pwrseq-v6-6-8da8310d9564@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:12:27 -05:00
Bartosz Golaszewski
36937845ce arm64: dts: qcom: sc8280xp-x13s: model the PMU of the on-board wcn6855 
Add a node for the PMU of the WCN6855 and rework the inputs of the wifi
and bluetooth nodes to consume the PMU's outputs.

With this we can drop the regulator-always-on properties from vreg_s11b
and vreg_s12b as they will now be enabled by the power sequencing
driver.

Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241018-sc8280xp-pwrseq-v6-5-8da8310d9564@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:12:27 -05:00
Bartosz Golaszewski
3843974162 arm64: dts: qcom: sc8280xp-crd: enable bluetooth 
Add the bluetooth node for sc8280xp-crd and make it consume the outputs
from the PMU as per the new DT bindings contract.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sc8280xp-pwrseq-v6-4-8da8310d9564@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:12:27 -05:00
Bartosz Golaszewski
e848528bdf arm64: dts: qcom: sc8280xp-crd: model the PMU of the on-board wcn6855 
Add nodes for the WCN6855 PMU, the WLAN module and relevant regulators
and pin functions to fully describe how the wifi is actually wired on
this platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Co-developed-by: Konrad Dybcio <konradybcio@kernel.org>
Signed-off-by: Konrad Dybcio <konradybcio@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sc8280xp-pwrseq-v6-3-8da8310d9564@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:12:27 -05:00
Tengfei Fan
7dcc1dfaa3 arm64: dts: qcom: qcs9100: Add support for the QCS9100 Ride and Ride Rev3 boards 
Add device tree support for the QCS9100 Ride and Ride Rev3 boards. The
QCS9100 is a variant of the SA8775p, and they are fully compatible with
each other. The QCS9100 Ride/Ride Rev3 board is essentially the same as
the SA8775p Ride/Ride Rev3 board, with the QCS9100 SoC mounted instead
of the SA8775p.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-4-e43a71ceb017@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:09:31 -05:00
Tengfei Fan
e80fd25537 dt-bindings: arm: qcom: Document qcs9100-ride and qcs9100-ride Rev3 
Document qcs9100-ride and qcs9100-ride Rev3 is based on QCS9100 SoC.

QCS9100 is a IoT version of SA8775p, hence use the latter's compatible
string as fallback.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-3-e43a71ceb017@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 15:09:31 -05:00
Konrad Dybcio
2e65616ef0 arm64: dts: qcom: x1e80100: Update C4/C5 residency/exit numbers 
Update the numbers based on the information found in the DSDT.

Fixes: af16b00578 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240716-topic-h_bits-v1-2-f6c5d3ff982c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 14:53:14 -05:00
Johan Hovold
266cb58f08 arm64: dts: qcom: x1e80100-crd: describe HID supplies 
Add the missing HID supplies to avoid relying on other consumers to keep
them on.

This also avoids the following warnings on boot:

	i2c_hid_of 0-0010: supply vdd not found, using dummy regulator
	i2c_hid_of 0-0010: supply vddl not found, using dummy regulator
	i2c_hid_of 1-0015: supply vdd not found, using dummy regulator
	i2c_hid_of 1-0015: supply vddl not found, using dummy regulator
	i2c_hid_of 1-003a: supply vdd not found, using dummy regulator
	i2c_hid_of 1-003a: supply vddl not found, using dummy regulator

Note that VREG_MISC_3P3 is also used for things like the fingerprint
reader which are not yet fully described so mark the regulator as always
on for now.

Fixes: d7e03cce04 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241029075258.19642-1-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 14:53:09 -05:00
Dmitry Baryshkov
1a24c290a5 arm64: dts: qcom: msm8998-lenovo-miix-630: add WiFi calibration variant 
As most other board Miix uses board-id = 0xff, so define calibration
variant to distinguish it from other devices with the same chip_id.

qmi chip_id 0x30214 chip_family 0x4001 board_id 0xff soc_id 0x40010002

Cc: Kalle Valo <kvalo@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20240723-miix630-support-v2-5-7d98f6047a17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 10:11:16 -05:00
Dmitry Baryshkov
ac6adde8d5 arm64: dts: qcom: msm8998-clamshell: enable resin/VolDown 
Let resin device generate the VolumeDown key.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20240723-miix630-support-v2-4-7d98f6047a17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 10:11:16 -05:00
Dmitry Baryshkov
31a31cd74d arm64: dts: qcom: msm8998-lenovo-miix-630: enable VolumeUp button 
Add gpio-keys device, responsible for a single button: Volume Up.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20240723-miix630-support-v2-3-7d98f6047a17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 10:11:16 -05:00
Dmitry Baryshkov
08cc19ba96 arm64: dts: qcom: msm8998-lenovo-miix-630: enable aDSP and SLPI 
Enable two other DSP instances on this platofm, aDSP and SLPI.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20240723-miix630-support-v2-2-7d98f6047a17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 10:11:16 -05:00
Dmitry Baryshkov
50b2a9c396 arm64: dts: qcom: msm8998-lenovo-miix-630: enable touchscreen 
There is no point in keeping touchscreen disabled, enable corresponding
i2c-hid device.

04F3:2608 Touchscreen as /devices/platform/soc@0/c179000.i2c/i2c-0/0-0010/0018:04F3:2608.0001/input/input1
04F3:2608 as /devices/platform/soc@0/c179000.i2c/i2c-0/0-0010/0018:04F3:2608.0001/input/input2
04F3:2608 as /devices/platform/soc@0/c179000.i2c/i2c-0/0-0010/0018:04F3:2608.0001/input/input3
04F3:2608 Stylus as /devices/platform/soc@0/c179000.i2c/i2c-0/0-0010/0018:04F3:2608.0001/input/input4

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20240723-miix630-support-v2-1-7d98f6047a17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-29 10:11:16 -05:00
Krishna chaitanya chundru
267643b3e3 arm64: dts: qcom: qcs6490-rb3gen2: Add PCIe nodes 
Enable PCIe1 controller and its corresponding PHY nodes on
qcs6490-rb3g2 platform.

SMMU v2 has limited SID's to assign dynamic SID's with the existing
logic. For now, use static iommu-map table assigning unique SID's for
each port as dynamic approach needs boarder community discussions.

PCIe switch connected to this board has 3 downstream ports and
to the one of the downstream an embedded ethernet is connected.
Assign unique SID for each downstream port and to embedded ethernet,
and also reserve a SID for the endpoints which are going to be
connected to the other two downstream ports.

As this PCIe switch is present in this platform only update iommu-map
in this platform only as other board variants might have different
PCIe topology and might need different mapping.

Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Link: https://lore.kernel.org/r/20241024-enable_pcie-v2-1-e5a6f5da74e4@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-24 10:40:06 -05:00
Aleksandrs Vinarskis
06d6fe987b arm64: dts: qcom: x1e80100-dell-xps13-9345: fix nvme regulator boot glitch 
The NVMe regulator has been left enabled by the boot firmware. Mark it
as such to avoid disabling the regulator temporarily during boot.

Based on https://lore.kernel.org/all/20241016145112.24785-1-johan+linaro@kernel.org/

Fixes: f5b788d0e8 ("arm64: dts: qcom: Add support for X1-based Dell XPS 13 9345")
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241016202253.9677-3-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-24 09:45:27 -05:00
Aleksandrs Vinarskis
4e9b7787f8 arm64: dts: qcom: x1e80100-dell-xps13-9345: route edp-panel enable gpio 
tlmm 74 was experimentally found to be panel enable pin, which shall be
high for panel (both low-res IPS, OLED) to work. Define it as such.

Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Link: https://lore.kernel.org/r/20241016202253.9677-2-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-24 09:45:27 -05:00
Manivannan Sadhasivam
15288649e4 arm64: dts: qcom: Use 'ufshc' as the node name for UFS controller nodes 
Devicetree binding has documented the node name for UFS controllers as
'ufshc'. So let's use it instead of 'ufs' which is for the UFS devices.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20240514-ufs-nodename-fix-v1-2-4c55483ac401@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-23 09:55:29 -05:00
Manish Pandey
5b9d9b9106 arm64: dts: qcom: qcm6490-idp: Add UFS nodes 
Add UFS host controller and Phy nodes for Qualcomm qcm6490-idp board.

Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Link: https://lore.kernel.org/r/20241019063659.6324-1-quic_mapa@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-22 23:09:43 -05:00
Krzysztof Kozlowski
6a3649903c arm64: dts: qcom: change labels to lower-case 
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-17-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-22 19:14:35 -05:00
Krzysztof Kozlowski
4c047c473f arm64: dts: qcom: sdm: change labels to lower-case 
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-16-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-22 19:14:35 -05:00
Krzysztof Kozlowski
7b52cb2018 arm64: dts: qcom: sm: change labels to lower-case 
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-15-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-22 19:14:34 -05:00
Krzysztof Kozlowski
20eb2057b3 arm64: dts: qcom: sm8650: change labels to lower-case 
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-14-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-22 19:14:34 -05:00
Krzysztof Kozlowski
c779146b50 arm64: dts: qcom: sm8550: change labels to lower-case 
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-13-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-10-22 19:14:34 -05:00