Commit Graph

996204 Commits

Author SHA1 Message Date
Kuldeep Singh
f29fa74453 arm64: dts: imx8mn: Reorder flexspi clock-names entry
Reorder flexspi clock-names entry to make it compliant with bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Kuldeep Singh
9eaf998422 arm64: dts: imx8mm: Reorder flexspi clock-names entry
Reorder flexspi clock-names entry to make it compliant with bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Vladimir Oltean
2c832fe41a arm64: dts: ls1028a: set up the real link speed for ENETC port 2
In NXP LS1028A there is a MAC-to-MAC internal link between enetc_port2
and mscc_felix_port4. This link operates at 2.5Gbps and is described as
such for the mscc_felix_port4 node.

The reason for the discrepancy is a limitation in the PHY library
support for fixed-link nodes. Due to the fact that the PHY library
registers a software PHY which emulates the clause 22 register map, the
drivers/net/phy/fixed_phy.c driver only supports speeds up to 1Gbps.

The mscc_felix_port4 node is probed by DSA, which does not use the PHY
library directly, but phylink, and phylink has a different representation
for fixed-link nodes, one that does not have the limitation of not being
able to represent speeds > 1Gbps.

Since the enetc driver was converted to phylink too as of commit
71b77a7a27 ("enetc: Migrate to PHYLINK and PCS_LYNX"), the limitation
has been practically lifted there too, and we can describe the real link
speed in the device tree now.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Adrien Grassein
4eac5e728b arm64: dts: imx8mm-nitrogen-r2: add ecspi2 support
Add the description for ecspi2 support.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
307fd14d4b arm64: dts: imx: add imx8qm mek support
The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features.
This patch adds i.MX8QuadMax MEK board support.

Note that MX8QM needs a special workaround for TLB flush due to a SoC
errata, otherwise there may be random crash if enable both clusters of
A72 and A53. As the errata workaround is still not in mainline, so we
disable A72 cluster first for MX8QM MEK.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
f2180be18a arm64: dts: imx: add imx8qm common dts file
The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features. It uses
the same architecture as MX8QXP, so many SS can be reused.
This patch adds i.MX8QuadMax SoC dtsi file.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
3ccc3515ba arm64: dts: imx8qm: add dma ss support
The DMA SS of MX8QM is mostly the same as the DMA part in MX8QXP ADMA SS
while it has one more instance for each of LPUART, ADC and LPI2C. And unlike
MX8QXP that flexcan clocks are shared between multiple CAN instances,
MX8QM has separate flexcan clock slice.

So we reuse the most part of common imx8-ss-dma.dtsi and add new things
based on it.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
35f4e9d753 arm64: dts: imx8: split adma ss into dma and audio ss
amda ss is consisted of dma and audio ss in qxp which are
also used in qm.
Let's split them into two ss for better code reuse.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
3a3e72f1ed arm64: dts: imx8qm: add conn ss support
The CONN SS of MX8QM is mostly the same as MX8QXP except it has one more
USB HSIC module support. So we can fully reuse the exist CONN SS dtsi.
Add <soc>-ss-conn.dtsi with compatible string updated according to
imx8-ss-conn.dtsi.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
d486c5b60e arm64: dts: imx8qm: add lsio ss support
The LSIO SS of MX8QM is exactly the same as MX8QXP. So we can fully
reuse the exist LSIO SS dtsi. Add <soc>-ss-lsio.dtsi with compatible
string updated according to imx8-ss-lsio.dtsi.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
16c4ea7501 arm64: dts: imx8: switch to new lpcg clock binding
switch to new lpcg clock binding

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
26de33a1e2 arm64: dts: imx8: switch to two cell scu clock binding
switch to two cell scu clock binding

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
e783b6bc89 arm64: dts: imx8: add adma lpcg clocks
Add adma lpcg clocks

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
9de8a22675 arm64: dts: imx8: add conn lpcg clocks
Add conn lpcg clocks

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
438ae46b8e arm64: dts: imx8: add lsio lpcg clocks
Add lsio lpcg clocks

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
0dcd27bda2 arm64: dts: imx8qxp: orginize dts in subsystems
MX8 SoC is comprised of a few HW subsystems while some of them can be
reused in the different SoCs. So let's re-orginize them into subsystems
in device tree as well for the possible reuse of the common part.

Note, as there's still no devices of hsio subsys, so removed it
first instead of creating a subsys headfile with no devices.
They will be added back when new devices added.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
b1484229a5 arm64: dts: imx8qxp: move scu pd node before scu clock node
SCU clock depends on SCU Power domain. Moving scu pd node before
scu clock can save a hundred of defer probes of all system devices
which depends on power domain and clocks.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Dong Aisheng
c75c6d5840 arm64: dts: imx8qxp: add fallback compatible string for scu pd
According to binding doc, add the fallback compatible string for
scu pd.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Peng Fan
36133cb5db arm64: dts: imx8mp: add wdog2/3 nodes
There is wdog[2,3] in i.MX8MP, so add them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Heiko Thiery
5dbadc8482 arm64: dts: fsl: add support for Kontron pitx-imx8m board
The Kontron pitx-imx8m board is based on an i.MX8MQ soc.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:49:57 +08:00
Marek Vasut
6f96852619 arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP
The board has both MACs routed out, enable the EQOS.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:32 +08:00
Marek Vasut
ec4d1196f1 arm64: dts: imx8mp: add eqos node and alias
Add EQOS GMAC node per Documentation/devicetree/bindings/net/imx-dwmac.txt ,
leave out the nvmem entries as that is not yet available, so the MAC has to
be passed in via DT by the bootloader.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Jagan Teki
6cecf54dfb arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.

PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once
Mainline Linux supported.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Jagan Teki
21480ffda0 arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Jagan Teki
60ac35268f arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.

General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features

i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Peng Fan
4e43cd636b arm64: dts: imx8qxp: correct usdhc clock-names sequence
Per dt-bindings, the clock-names sequence should be ipg ahb per to pass
dtbs_check.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Adrien Grassein
40ba2eda0a arm64: dts: imx8mm-nitrogen-r2: add audio
Add audio description and pin muxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Adrien Grassein
80fa5d604d arm64: dts: imx8mm-nitrogen-r2: add FlexSPI
Add FlexSPI description an pin muxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
b399c13f0b arm64: dts: imx8mm-nitrogen-r2: add PWMs
Add description for the four PWMs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
2b6e7da251 arm64: dts: imx8mm-nitrogen-r2: rework UART 2
Remove useless clocks in UART 2

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
88a151795e arm64: dts: imx8mm-nitrogen-r2: add UARTs
Add description and pin muxing for UARTs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
421f715c73 arm64: dts: imx8mm-nitrogen-r2: add USB support
Add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
f37cd7560d arm64: dts: imx8mm-nitrogen-r2: rework USDHC1
Add VMMC and VQMMC description for USDHC1 (eMMC).
There are comming directly from the alimentation
stage, so add the vref_3V3 fixed regulator.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
94b736d728 arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Add usdhc3 description which corresponds to the wifi/bt chip

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
d779f4c92a arm64: dts: librem5-devkit: Move headphone detection to sound card
This allows for automatic output source switching in userspace. Enable
the pullup on the GPIO to actually make it trigger and mark it as
active-high since detection is reversed otherwise.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
15094482fc arm64: dts: librem5-devkit: Add mux for built-in vs headset mic
Add mux so we can select either headset or built-in microphone input.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
39a346d923 arm64: dts: librem5-devkit: "Drop Line In Jack"
The SGTL500s LINEINL and LINEINR are N/C.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
6f46f7ff80 arm64: dts: librem5-devkit: Add speaker amplifier
Wire up the amplifier that drives the builtin speaker.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
5b65f39ddc arm64: dts: librem5-devkit: Use a less generic codec name
The codec is currently named after the chip but it should be named like
the device itself since otherwise it's impossible to distinguish it from
other devices using the same codec (e.g. in alsa's UCM).

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Martin Kepplinger
1cec010bbb arm64: dts: imx8mq-librem5-r2: set nearlevel to 120
On Birch I can never reach 220 and hence the display would never
turn off. Tests suggest 120 to be a good threshold value for all Birch
devices.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Angus Ainslie
3a0eac4a8c arm64: dts: librem5: protect some partitions of the nor-flash
These sections should be read only as they contain important data.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Guido Günther
e7fb3a7479 arm64: dts: librem5: Drop assigned-clocks from SAI2
IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 are setup to the same rates
right on the clock controller.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Guido Günther
28034d1b51 arm64: dts: imx8mq-librem5-devkit: Drop buck3 startup-ramp-delay
The PMIC driver now sets appropriate default delays.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Adam Ford
54c327393a arm64: dts: imx8mn-beacon: Enable SDR104 on WiFi SDIO interface
Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies
to enable SDR104 on usdhc1 connecting the WiFi chip.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Michael Walle
dfee46f17b arm64: dts: ls1028a: add interrupt to Root Complex Event Collector
The legacy interrupt INT_A is hardwired to the event collector. RCEC is
bascially supported starting with v5.11. Having a correct interrupt, will
make RCEC at least probe correctly.

There are still issues with how RCEC is implemented in the RCiEP on the
LS1028A. RCEC will report an error, but it cannot find the correct
subdevice.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:27 +08:00
Fabio Estevam
dbd3120cf0 arm64: dts: imx8mm-nitrogen-r2: Pass the i2c3 unit name
Pass the i2c3 unit name to fix the following W=1 build warning:

arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts:159.8-172.5: Warning (unit_address_vs_reg): /soc@0/bus@30800000/i2c@30a40000/i2cmux@70/i2c3: node has a reg or ranges property, but no unit name

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:27 +08:00
Linus Torvalds
a38fd87484 Linux 5.12-rc2 v5.12-rc2 2021-03-05 17:33:41 -08:00
Linus Torvalds
f3ed4de6cc Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma
Pull rdma fixes from Jason Gunthorpe:
 "Nothing special here, though Bob's regression fixes for rxe would have
  made it before the rc cycle had there not been such strong winter
  weather!

   - Fix corner cases in the rxe reference counting cleanup that are
     causing regressions in blktests for SRP

   - Two kdoc fixes so W=1 is clean

   - Missing error return in error unwind for mlx5

   - Wrong lock type nesting in IB CM"

* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma:
  RDMA/rxe: Fix errant WARN_ONCE in rxe_completer()
  RDMA/rxe: Fix extra deref in rxe_rcv_mcast_pkt()
  RDMA/rxe: Fix missed IB reference counting in loopback
  RDMA/uverbs: Fix kernel-doc warning of _uverbs_alloc
  RDMA/mlx5: Set correct kernel-doc identifier
  IB/mlx5: Add missing error code
  RDMA/rxe: Fix missing kconfig dependency on CRYPTO
  RDMA/cm: Fix IRQ restore in ib_send_cm_sidr_rep
2021-03-05 17:27:59 -08:00
Linus Torvalds
de5bd6c54b Merge tag 'gcc-plugins-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux
Pull gcc-plugins fixes from Kees Cook:
 "Tiny gcc-plugin fixes for v5.12-rc2. These issues are small but have
  been reported a couple times now by static analyzers, so best to get
  them fixed to reduce the noise. :)

   - Fix coding style issues (Jason Yan)"

* tag 'gcc-plugins-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  gcc-plugins: latent_entropy: remove unneeded semicolon
  gcc-plugins: structleak: remove unneeded variable 'ret'
2021-03-05 17:23:03 -08:00
Linus Torvalds
8b24ef4478 Merge tag 'pstore-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux
Pull pstore fixes from Kees Cook:

 - Rate-limit ECC warnings (Dmitry Osipenko)

 - Fix error path check for NULL (Tetsuo Handa)

* tag 'pstore-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  pstore/ram: Rate-limit "uncorrectable error in header" message
  pstore: Fix warning in pstore_kill_sb()
2021-03-05 17:21:25 -08:00