VA blocks are currently stored in an inconsistent way. Sometimes block
end is inclusive, sometimes exclusive. This leads to wrong size
calculations in certain cases, plus could lead to a segmentation fault
in case mapping process fails in the middle and we try to roll it back.
Need to make this consistent - start inclusive till end inclusive.
For example, the regions table may now look like this:
0x0000 - 0x1fff : allocated
0x2000 - 0x2fff : free
0x3000 - 0x3fff : allocated
Signed-off-by: Yuri Nudelman <ynudelman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Do not use a dma channel for debugfs requested transfer if it's
QM is not idle.
Signed-off-by: Guy Zadicario <gzadicario@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
The boot status flag "SRAM available" can be set by f/w Linux (in the
general case) or by f/w uboot (in some specific debug scenario) but
never by f/w preboot.
Hence, when polling the boot status flags in the preboot stage we do not
want to poll on "SRAM Avialable".
The special case in which uboot set this flag is when we are running
special debug scenario without Linux. In this case, at some point during
the boot, the uboot relocates its code to the DRAM and then set the
specified flag.
Signed-off-by: Ohad Sharabi <osharabi@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
There are rare cases where the device CPU's watchdog has expired and as
a result, the watchdog reset has happened and the CPU will now move to
running its preboot f/w.
When that happens, the driver will only know that a heartbeat failure
occurred. As a result, the driver will send a message to the CPU's main
f/w asking it to reset the device, but because the CPU is now running
preboot, it won't respond and the re-initialization process will later
fail when trying to load the f/w.
The solution is to send the request to the preboot as well, only if the
reset was caused because of HB failure.
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
In the dynamic FW load protocol the boot status is updated to
"Ready to Boot" once uboot is active.
Polling on other boot status values is a residue of code duplication
from the static protocol and should be removed.
Signed-off-by: Ohad Sharabi <osharabi@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Jonathan writes:
1st set of IIO new device support, features and cleanup for 5.17
Includes some fixes that were either late breaking, low priority or
complex enough to not be good to rush in late in the cycle.
Tree rebased today to fix up some trivial issues + pull in a fix that
was previously on the fixes-togreg branch. Vast majority have been
in linux-next for some time now.
New device support
* adi,ad7293
- New driver and bindings for this Power Amplifier drain current
controller. A complex device with various related monitoring functions.
* adi,ad75513R
- New driver and bindings for this combined ADC and DAC device.
- A few follow up fixes.
* adi,admv8818
- New driver (and type) for this 2-18GHz filter device. Includes
bindings and ABI documentation to allow clk_notifier based auto
adjustment of the filters in appropriate applications.
* liteon,ltr501
- Support for the ltr303. ID and chip specific info table.
* xilinx,ams
- New generic firmware function fwnode_iomap() as used in this driver.
- New driver and bindings for this ADC and on-chip sensors as found
in various Xilinx devices.
Core
* Introduced IIO_VAL_INT_64 which uses val and val2 in IIO callbacks to
form a 64 bit integer when higher precision needed.
* Allow IIO_ENUM_AVAILABLE to be used with different shared values.
* Fix a long term issue with scheduling whilst atomic when iio_trig_poll()
is called but no trigger consumers are actually enabled and hence the
trigger may be reenabled from the interrupt handler. Seen in the wild
on the tsc2046.
* Mark iio_device_type const.
* buffer: Use a separate index variable to simplify code.
* buffer-dma: Clear out unused struct iio_buffer_block
* buffer-dmaengine: Switch to cheaper round_down() as power of 2 values.
Tests/tools
* format_value
- Check against NULL returns from allocations in tests.
- Add IIO_VAL_INT_64 test case.
* event_monitor
- Flush the output after event to given more consistent latency
when tool output piped to other programs.
Driver Features
* axp20x
- Add support for NTC thermistor channel and document TS pin binding.
* arm,scmi
- Add reading of raw channel values (using IIO_VAL_INT_64)
* liteon,ltr501
- Add proximity-near-level support and dt-binding.
Tree wide cleanup
* Remove no-op trigger ops from multiple drivers.
* Stop using dev_get_drvdata() on the iio_dev->dev in various drivers
and then stop assigning it to allow this to be used for other purposes.
We can always get to the indio_dev using dev_to_iio_dev() which is
a container_of() based approach. Also cleanup up some related unnecessary
convoluted cases.
- atmel,at91-sam5d2
- nxp,imx7d
- meas,ms5611
- st,st_sensors
* Where available (or easy to introduce) use the scan_type.* values
in place of a second copy for read_raw and similar paths.
- adi,ad7266
- bosch,bma220
- fsl,mac3110
- fsl,mma7455
- fsl,mpl3115
- kionix,kcjk-1013
- sensortek,stk8ba50
- sensortek,stk8312
- ti,adc12138
- ti,ads1015
- vti,sca3000
- xilinx,xadc-core
* Switch drives over to generic firmware properties including appropriate
header changes to avoid including of.h
- Various DACs had false CONFIG_OF dependencies.
- dpot-dac
- envelope-detector
- adi,ad5755
- adi,ad5758
- capella,cm3605
- maxim,max9611
- microchip,mcp41010
- microchip,mcp3911
- ti,adc12138
* Trivial clang warning fixes for W=1 warnings.
Driver specific cleanup and minor fixes
* adi,ad7606
- Comment fixes.
* ams,ad3935
- Drop pointless cast to the same type.
* atmel,at91-sama5d2
- Fix wrong cast of iio_dev->dev to platform_device that happened to
be harmless.
* fsl,mma7660
- Stop i2c remove() function returning an error code. Part of a rework
to eventually stop returning anything from these.
* fsl,mma8452
- Use correct type for local irqreturn_t.
* nxp,imx8mq
- Maintainer email address update.
* nxp,lpc18xx_adc
- Ensure clk_prepare_enable() called before clk_get_rate().
- Switch of.h for mod_devicetable.h to reflect no of specific functions,
just the id table.
* renesas,rzg2l
- Drop a dev_err() that just duplicates error printed in platform_get_irq()
* sgx,vz89x
- Drop pointless cast.
* st,lsm6dsx
- Make it possible to disable the sensorhub from DT to avoid a corner
case where the address of a slave device many be accidentally modified.
* st,stm32-adc
- Stop leaking an of_node in an error path.
* st,stmp2
- Avoid wrong sized type for bit field which could result in
over-reading (harmless). Precursor to enabling -Warray-bounds.
* ti,adc081c
- Put back some ACPI support for non standards compliant ADC081C
ID because it is known to be in the wild on some Aaeon boards.
* ti,ads8688
- Cleanup redundant local ret variable assignment.
* ti,ina2xx-adc
- Use helper macro kthread_run() to replace some boilerplate.
- Avoid double reference counting.
- Drop pointless cast.
* xilinx,xadc
- Make the IRQ optional as not always wired to the host system.
* tag 'iio-for-5.17a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (103 commits)
iio: adc: ti-adc081c: Partial revert of removal of ACPI IDs
iio:addac:ad74413r: Fix uninitialized ret in a path that won't be hit.
MAINTAINERS: Add maintainer for xilinx-ams
dt-bindings: iio: adc: Add Xilinx AMS binding documentation
iio: adc: Add Xilinx AMS driver
device property: Add fwnode_iomap()
iio:accel:kxcjk-1013: Mark struct __maybe_unused to avoid warning.
iio:accel:bmc150: Mark structure __maybe_unused as only needed with for pm ops.
iio:dummy: Drop set but unused variable len.
iio:magn:ak8975: Suppress clang W=1 warning about pointer to enum conversion.
iio:imu:inv_mpu6050: Suppress clang W=1 warning about pointer to enum conversion.
iio:imu:inv_icm42600: Suppress clang W=1 warning about pointer to enum conversion.
iio:dac:mcp4725: Suppress clang W=1 warning about pointer to enum conversion.
iio:amplifiers:hmc425a: Suppress clang W=1 warning about pointer to enum conversion.
iio:adc:ti-ads1015: Suppress clang W=1 warning about pointer to enum conversion.
iio:adc:rcar: Suppress clang W=1 warning about pointer to enum conversion.
iio:adc:ina2xx-adc: Suppress clang W=1 warning about pointer to enum conversion.
iio:accel:bma180: Suppress clang W=1 warning about pointer to enum conversion.
drivers:iio:dac: Add AD3552R driver support
dt-bindings: iio: dac: Add adi,ad3552r.yaml
...
I don't believe it's possible to hit this, because we drop
out of __iio_update_buffers() earlier in the event of an empty
list. However, that is not visible to the compiler so lets
return an error if we do hit the loop with an empty bitmask.
Fixes: 5d97d9e9a7 ("iio: addac: ad74413r: fix off by one in ad74413r_parse_channel_config()")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Cosmin Tanislav <cosmin.tanislav@analog.com>
Link: https://lore.kernel.org/r/20211220164726.3136307-1-jic23@kernel.org
The AMS includes an ADC as well as on-chip sensors that can be used to
sample external voltages and monitor on-die operating conditions, such
as temperature and supply voltage levels. The AMS has two SYSMON blocks.
PL-SYSMON block is capable of monitoring off chip voltage and
temperature.
PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
from an external master. Out of these interfaces currently only DRP is
supported. Other block PS-SYSMON is memory mapped to PS.
The AMS can use internal channels to monitor voltage and temperature as
well as one primary and up to 16 auxiliary channels for measuring
external voltages.
The voltage and temperature monitoring channels also have event capability
which allows to generate an interrupt when their value falls below or
raises above a set threshold.
Co-developed-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
Link: https://lore.kernel.org/r/20211203212358.31444-4-anand.ashok.dumbre@xilinx.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
A bug exists if the user executes a COUNTER_ADD_WATCH_IOCTL ioctl call,
and then executes a COUNTER_DISABLE_EVENTS_IOCTL ioctl call. Disabling
the events should disable the 104-QUAD-8 interrupts, but because of this
bug the interrupts are not disabling.
The reason this bug is occurring is because quad8_events_configure() is
called when COUNTER_DISABLE_EVENTS_IOCTL is handled, but the
next_irq_trigger[] array has not been cleared before it is checked in
the loop.
This patch fixes the bug by removing the next_irq_trigger array and
instead utilizing a different algorithm of walking the events_list list
for the current requested events. When a COUNTER_DISABLE_EVENTS_IOCTL is
handled, events_list will be empty and thus all device channels end up
with interrupts disabled.
Fixes: 7aa2ba0df6 ("counter: 104-quad-8: Add IRQ support for the ACCES 104-QUAD-8")
Cc: Syed Nayyar Waris <syednwaris@gmail.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Link: https://lore.kernel.org/r/5fd5731cec1c251acee30eefb7c19160d03c9d39.1640072891.git.vilhelm.gray@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Using counter->priv is a memory read and so more expensive than
container_of which is only an addition. (In this case even a noop
because the offset is 0.)
So container_of is expected to be a tad faster, it's type-safe, and
produces smaller code (ARCH=arm allmodconfig):
$ source/scripts/bloat-o-meter drivers/counter/ti-eqep.o-pre drivers/counter/ti-eqep.o
add/remove: 0/0 grow/shrink: 0/9 up/down: 0/-108 (-108)
Function old new delta
ti_eqep_position_enable_write 132 120 -12
ti_eqep_position_enable_read 260 248 -12
ti_eqep_position_ceiling_write 132 120 -12
ti_eqep_position_ceiling_read 236 224 -12
ti_eqep_function_write 220 208 -12
ti_eqep_function_read 372 360 -12
ti_eqep_count_write 312 300 -12
ti_eqep_count_read 236 224 -12
ti_eqep_action_read 664 652 -12
Total: Before=4598, After=4490, chg -2.35%
Acked-by: David Lechner <david@lechnology.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Link: https://lore.kernel.org/r/4bde7cbd9e43a5909208102094444219d3154466.1640072891.git.vilhelm.gray@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
An initialised kobject must be freed using kobject_put() to avoid
leaking associated resources (e.g. the object name).
Commit fe3c606843 ("firmware: Fix a reference count leak.") "fixed"
the leak in the first error path of the file registration helper but
left the second one unchanged. This "fix" would however result in a NULL
pointer dereference due to the release function also removing the never
added entry from the fw_cfg_entry_cache list. This has now been
addressed.
Fix the remaining kobject leak by restoring the common error path and
adding the missing kobject_put().
Fixes: 75f3e8e47f ("firmware: introduce sysfs driver for QEMU's fw_cfg device")
Cc: stable@vger.kernel.org # 4.6
Cc: Gabriel Somlo <somlo@cmu.edu>
Signed-off-by: Johan Hovold <johan@kernel.org>
Link: https://lore.kernel.org/r/20211201132528.30025-3-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The help text for GOOGLE_FIRMWARE states that it should only be
enabled when building a kernel for Google's own servers. However,
many of the drivers dependent on it are also useful on Chromebooks or
on any platform using coreboot.
Update the help text to reflect this double duty.
Fixes: d384d6f43d ("firmware: google memconsole: Add coreboot support")
Reviewed-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Link: https://lore.kernel.org/r/20180618225540.GD14131@decadent.org.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Mathieu writes:
Coresight changes for v5.17
This pull request includes:
- A patch that uses devm_bitmap_zalloc() instead of the open-coded
equivalent.
- Work to make coresight complex configuration loadable via modules.
- Some coresight documentation updates.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
* tag 'coresight-next-v5.17' of gitolite.kernel.org:pub/scm/linux/kernel/git/coresight/linux:
coresight: core: Fix typo in a comment
Documentation: coresight: Update coresight configuration docs
coresight: configfs: Allow configfs to activate configuration
coresight: syscfg: Example CoreSight configuration loadable module
coresight: syscfg: Update load API for config loadable modules
coresight: configuration: Update API to permit dynamic load/unload
coresight: configuration: Update API to introduce load owner concept
Documentation: coresight: Fix documentation issue
coresight: Use devm_bitmap_zalloc when applicable
Moritz writes:
FPGA Manager changes for 5.17-rc1
Russ' patches rework the way we register FPGA managers, regions and
bridges by simplifying the functions into a single register call.
Nathan's patch addresses an unused variable warning that was introduced
by Russ' patches.
Yang's patch addresses a kernel doc warning.
All patches have been reviewed on the mailing list, and have been in the
last few linux-next releases (as part of our for-next branch) without issues.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
* tag 'fpga-for-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
fpga: region: fix kernel-doc
fpga: stratix10-soc: Do not use ret uninitialized in s10_probe()
fpga: region: Use standard dev_release for class driver
fpga: bridge: Use standard dev_release for class driver
fpga: mgr: Use standard dev_release for class driver
The qpnpint_irq_set_type() callback function configures the type
(edge vs level) and polarity (high, low, or both) of a particular
PMIC interrupt within a given peripheral. To do this, it reads
the three consecutive IRQ configuration registers, modifies the
specified IRQ bit within the register values, and finally writes
the three modified register values back to the PMIC. While a
spinlock is used to provide mutual exclusion on the SPMI bus
during the register read and write calls, there is no locking
around the overall read, modify, write sequence. This opens up
the possibility of a race condition if two tasks set the type of
a PMIC IRQ within the same peripheral simultaneously.
When the race condition is encountered, both tasks will read the
old value of the registers and IRQ bits set by one of the tasks
will be dropped upon the register write of the other task. This
then leads to PMIC IRQs being enabled with an incorrect type and
polarity configured. Such misconfiguration can lead to an IRQ
storm that overwhelms the system and causes it to crash.
This race condition and IRQ storm have been observed when using
a pair of pm8941-pwrkey devices to handle PMK8350 pwrkey and
resin interrupts. The independent devices probe asynchronously
in parallel and can simultaneously request and configure PMIC
IRQs in the same PMIC peripheral.
For a good case, the IRQ configuration calls end up serialized
due to timing deltas and the register read/write sequence looks
like this:
1. pwrkey probe: SPMI read(0x1311): 0x00, 0x00, 0x00
2. pwrkey probe: SPMI write(0x1311): 0x80, 0x80, 0x80
3. resin probe: SPMI read(0x1311): 0x80, 0x80, 0x80
4. resin probe: SPMI write(0x1311): 0xC0, 0xC0, 0xC0
The final register states after both devices have requested and
enabled their respective IRQs is thus:
0x1311: 0xC0
0x1312: 0xC0
0x1313: 0xC0
0x1314: 0x00
0x1315: 0xC0
For a bad case, the IRQ configuration calls end up occurring
simultaneously and the race condition is encountered. The
register read/write sequence then looks like this:
1. pwrkey probe: SPMI read(0x1311): 0x00, 0x00, 0x00
2. resin probe: SPMI read(0x1311): 0x00, 0x00, 0x00
3. pwrkey probe: SPMI write(0x1311): 0x80, 0x80, 0x80
4. resin probe: SPMI write(0x1311): 0x40, 0x40, 0x40
In this case, the final register states after both devices have
requested and enabled their respective IRQs is thus:
0x1311: 0x40
0x1312: 0x40
0x1313: 0x40
0x1314: 0x00
0x1315: 0xC0
This corresponds to the resin IRQ being configured for both
rising and falling edges, as expected. However, the pwrkey IRQ
is misconfigured as level type with both polarity high and low
set to disabled. The PMIC IRQ triggering hardware treats this
particular register configuration as if level low triggering is
enabled.
The raw pwrkey IRQ signal is low when the power key is not being
pressed. Thus, the pwrkey IRQ begins firing continuously in an
IRQ storm.
Fix the race condition by holding the spmi-pmic-arb spinlock for
the duration of the read, modify, write sequence performed in the
qpnpint_irq_set_type() function. Split the pmic_arb_read_cmd()
and pmic_arb_write_cmd() functions each into three parts so that
hardware register IO is decoupled from spinlock locking. This
allows a new function pmic_arb_masked_write() to be added which
locks the spinlock and then calls register IO functions to
perform SPMI read and write commands in a single atomic
operation.
Link: https://lore.kernel.org/r/20211118034719.28971-1-quic_collinsd@quicinc.com
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20211216190812.1574801-7-sboyd@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
