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Author SHA1 Message Date
Dmitry Baryshkov
ef3308cf52 arm64: dts: qcom: ipq9574: drop #power-domain-cells property of GCC 
On IPQ9574 the Global Clock Controller (GCC) doesn't provide power
domains. Drop the #power-domain-cells property from the controller
device node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-12-69c63d0ae1e7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 18:00:17 -05:00
Dmitry Baryshkov
2ad7dd5479 arm64: dts: qcom: ipq5332: drop #power-domain-cells property of GCC 
On IPQ5332 the Global Clock Controller (GCC) doesn't provide power
domains. Drop the #power-domain-cells property from the controller
device node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-11-69c63d0ae1e7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 18:00:17 -05:00
Dmitry Baryshkov
d1caecddf9 arm64: dts: qcom: ipq5018: drop #power-domain-cells property of GCC 
On IPQ5018 the Global Clock Controller (GCC) doesn't provide power
domains. Drop the #power-domain-cells property from the controller
device node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-10-69c63d0ae1e7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 18:00:17 -05:00
Dmitry Baryshkov
cf2a08e149 arm64: dts: qcom: sm8650-hdk: remove redundant properties 
The commit 65931e59e0 ("arm64: dts: qcom: sm8650: move USB graph to
the SoC dtsi") and commit fbb22a1822 ("arm64: dts: qcom: sm8650: move
PHY's orientation-switch to SoC dtsi") have moved some of the properties
from the board DT files to the sm8650.dtsi. As the patch for sm8650 HDK
predates those commits, it still had those properties inside.

Drop these duplicate proerties from the sm8650-hdk.dts.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240530-sm8650-hdk-redundant-v1-1-c39c2ae65f3b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:59:52 -05:00
Luca Weiss
6814d454c2 arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching 
Configure the Type-C and VBUS regulator on PM7250B and wire it up to the
USB PHY, so that USB role and orientation switching works.

For now USB Power Delivery properties are skipped / disabled, so that
the (presumably) bootloader-configured charger doesn't get messed with
and we can charge the phone with at least some amount of power.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240530-fp4-tcpm-v3-3-612d4bbd5e09@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:58:30 -05:00
Luca Weiss
6b5b15a1d7 arm64: dts: qcom: pm7250b: Add a TCPM description 
Type-C port management functionality lives inside of the PMIC block on
pm7250b.

The Type-C port management logic controls orientation detection,
vbus/vconn sense and to send/receive Type-C Power Domain messages.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240530-fp4-tcpm-v3-2-612d4bbd5e09@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:58:29 -05:00
Luca Weiss
37ff5d0d75 arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster 
Add the required DTS node for the USB VBUS output regulator, which is
available on PM7250B. This will provide the VBUS source to connected
peripherals.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240530-fp4-tcpm-v3-1-612d4bbd5e09@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:58:29 -05:00
Abel Vesa
eb57cbe730 arm64: dts: qcom: x1e80100: Describe the PCIe 6a resources 
On both the CRD and QCP, on PCIe 6a sits the NVMe. Add the 3.3V
gpio-controlled regulator and the clkreq, perst and wake gpios as
resources for the PCIe 6a.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-pcie6a-v1-3-ee17a9939ba5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:58:28 -05:00
Abel Vesa
87042003f6 arm64: dts: qcom: x1e80100-qcp: Fix the PHY regulator for PCIe 6a 
The actual PHY regulator is L1d instead of L3j, so fix it accordingly.

Fixes: f9a9c11471 ("arm64: dts: qcom: x1e80100-qcp: Enable more support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: stable@vger.kernel.org      # 6.9
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-pcie6a-v1-2-ee17a9939ba5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:58:27 -05:00
Abel Vesa
cf7d2157aa arm64: dts: qcom: x1e80100-crd: Fix the PHY regulator for PCIe 6a 
The actual PHY regulator is L1d instead of L3j, so fix it accordingly.

Fixes: d7e03cce04 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: stable@vger.kernel.org      # 6.9
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-pcie6a-v1-1-ee17a9939ba5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:58:27 -05:00
Abel Vesa
20676f7819 arm64: dts: qcom: x1e80100-qcp: Fix USB PHYs regulators 
The 1.2v HS PHY shared regulator is actually LDO2 from PM8550ve id J.
Also add the missing supplies to QMP PHYs.

Fixes: f9a9c11471 ("arm64: dts: qcom: x1e80100-qcp: Enable more support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: stable@vger.kernel.org      # 6.9
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-fix-usb-phy-supplies-v1-2-6eb72a546227@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-06-01 17:56:05 -05:00
Abel Vesa
ae5cee8e73 arm64: dts: qcom: x1e80100-crd: Fix USB PHYs regulators 
The 1.2v HS PHY shared regulator is actually LDO2 from PM8550ve id J.
Also add the missing supplies to QMP PHYs.

Fixes: d7e03cce04 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: stable@vger.kernel.org      # 6.9
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-fix-usb-phy-supplies-v1-1-6eb72a546227@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:57:11 -05:00
Tengfei Fan
54bbf0a8ef arm64: dts: qcom: sm8550: Remove usb default dr_mode 
OTG is default usb dr_mode, so this property can be removed.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240531090422.158813-3-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:53:18 -05:00
Tengfei Fan
32a7b1d7c7 arm64: dts: qcom: sm8550: Move usb-role-switch to SoC dtsi 
The usb-role-switch is SM8550 SoC property, so move it from board dts
to SM8550 SoC dtsi.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240531090422.158813-2-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:53:18 -05:00
Tengfei Fan
93f340084d arm64: dts: qcom: sa8775p: Add IMEM and PIL info region 
Add a simple-mfd representing IMEM on SA8775p and define the PIL
relocation info region, so that post mortem tools will be able
to locate the loaded remoteprocs.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20240531093531.238075-3-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:53:02 -05:00
Tengfei Fan
9ca6eaf133 dt-bindings: soc: qcom: add qcom,sa8775p-imem compatible 
Add qcom,sa8775p-imem compatible name support.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240531093531.238075-2-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:53:02 -05:00
David Wronek
a5c84d2dde arm64: dts: qcom: sm8550-samsung-q5q: fix typo 
It looks like "cdsp_mem" was pasted in the license header by accident.
Fix the typo by removing it.

Signed-off-by: David Wronek <david@mainlining.org>
Fixes: ba2c082a40 ("arm64: dts: qcom: sm8550: Add support for Samsung Galaxy Z Fold5")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240531-fix-typo-q5q-v1-1-95f10a8eff9b@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:46:26 -05:00
Unnathi Chalicheemala
a7823576f7 arm64: dts: qcom: sm8650: Add Broadcast_AND register in LLCC block 
Chipsets before SM8450 have only one broadcast register (Broadcast_OR)
which is used to broadcast writes and check for status bit 0 only in
all channels.
>From SM8450 onwards, a new Broadcast_AND region was added which checks
for status bit 1. This hasn't been updated and Broadcast_OR region
was wrongly being used to check for status bit 1 all along.
Hence mapping Broadcast_AND region's address space to LLCC in SM8650.

Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Link: https://lore.kernel.org/r/3a8804b35f44485637398faa9c0bda76813fe4d7.1717014052.git.quic_uchalich@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:44:09 -05:00
Unnathi Chalicheemala
2a71a2eb1f arm64: dts: qcom: sm8550: Add Broadcast_AND register in LLCC block 
Chipsets before SM8450 have only one broadcast register (Broadcast_OR)
which is used to broadcast writes and check for status bit 0 only in
all channels.
>From SM8450 onwards, a new Broadcast_AND region was added
which checks for status bit 1. This hasn't been updated and Broadcast_OR
region was wrongly being used to check for status bit 1 all along.
Hence mapping Broadcast_AND region's address space to LLCC in SM8550.

Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Link: https://lore.kernel.org/r/9bb6e086adec4d3b2134462d504822fb79b009e7.1717014052.git.quic_uchalich@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:44:09 -05:00
Unnathi Chalicheemala
c566143137 arm64: dts: qcom: sm8450: Add Broadcast_AND register in LLCC block 
Chipsets before SM8450 have only one broadcast register (Broadcast_OR)
which is used to broadcast writes and check for status bit 0 only in
all channels.
>From SM8450 onwards, a new Broadcast_AND region was added which checks
for status bit 1. This hasn't been updated and Broadcast_OR region
was wrongly being used to check for status bit 1 all along.
Hence mapping Broadcast_AND region's address space to LLCC in SM8450.

Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Link: https://lore.kernel.org/r/bfc817da4188abdf5b543bedafb9cb0eb82806c2.1717014052.git.quic_uchalich@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-31 17:44:09 -05:00
Tengfei Fan
809c20b1ff arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform 
Add llcc support for the SA8775p platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240529101534.3166507-4-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-29 22:23:28 -05:00
Caleb Connolly
249666e34c arm64: dts: qcom: add QCM6490 SHIFTphone 8 
The SHIFTphone 8 is an upcoming QCM6490 smartphone, it has the following
features:

* 12GB of RAM, 512GB UFS storage
* 1080p display.
* Hardware kill switches for cameras and microphones
* UART access via type-c SBU pins (enabled by an internal switch)

Initial support includes:

* Framebuffer display
* UFS and sdcard storage
* Battery monitoring and USB role switching via pmic glink
* Bluetooth
* Thermals
* Wifi

Signed-off-by: Caleb Connolly <caleb@postmarketos.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240530-otter-bringup-v3-2-79e7a28c1b08@linaro.org
[bjorn: Fixed indent of block comments]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-29 22:23:21 -05:00
Caleb Connolly
f51df82d98 dt-bindings: arm: qcom: Add QCM6490 SHIFTphone 8 
The SHIFTphone 8 (codename otter) is a smartphone based on the QCM6490
SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Caleb Connolly <caleb@postmarketos.org>
Link: https://lore.kernel.org/r/20240530-otter-bringup-v3-1-79e7a28c1b08@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-29 20:50:17 -05:00
Konrad Dybcio
2559e61e7e arm64: dts: qcom: x1e80100-pmics: Add the missing PMICs 
During the initial bringup, all of the peripherals on non-SMB PMICs
were either not used, or were not necessary to accomplish certain
goals. This however, left a hole in the hardware description.

Add the missing ones.

Note that the PM8010 errors out on reads on the CRD (works fine on the
QCP) for reasons unknown, but that shall be ironed out in the future..

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240529-topic-x1e_pmic-v1-2-9de0506179eb@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-29 08:02:55 -05:00
Alexandru Marc Serdeliuc
ba2c082a40 arm64: dts: qcom: sm8550: Add support for Samsung Galaxy Z Fold5 
Add support for Samsung Galaxy Z Fold5 (q5q) foldable phone based on sm8550

Currently working features:
- Framebuffer
- UFS
- i2c
- Buttons

Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
Link: https://lore.kernel.org/r/20240411-samsung-galaxy-zfold5-q5q-v6-2-8142297515aa@yahoo.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 17:07:11 -05:00
Alexandru Marc Serdeliuc
d328da7f07 dt-bindings: arm: qcom: Add Samsung Galaxy Z Fold5 
This documents Samsung Galaxy Z Fold5 (samsung,q5q)
which is a foldable phone by Samsung based on the sm8550 SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
Link: https://lore.kernel.org/r/20240411-samsung-galaxy-zfold5-q5q-v6-1-8142297515aa@yahoo.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 17:06:19 -05:00
Georgi Djakov
d1f2b41e96 arm64: dts: qcom: sc7280: Add DT nodes for the TBUs 
Add the device-tree nodes for the TBUs (translation buffer units) that
are present on the sc7280 platforms. The TBUs can be used debug the
kernel and provide additional information when a context faults occur.

Describe all the registers, clocks, interconnects and power-domain
resources that are needed for each of the TBUs.

Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Link: https://lore.kernel.org/r/20240417133731.2055383-8-quic_c_gdjako@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 17:02:00 -05:00
Georgi Djakov
7bb38c20f2 arm64: dts: qcom: sdm845: Add DT nodes for the TBUs 
Add the device-tree nodes for the TBUs (translation buffer units) that
are present on the sdm845 platforms. The TBUs can be used debug the
kernel and provide additional information when a context faults occur.

Describe the all registers, clocks, interconnects and power-domain
resources that are needed for each of the TBUs.

Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Link: https://lore.kernel.org/r/20240417133731.2055383-6-quic_c_gdjako@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 17:02:00 -05:00
Krishna chaitanya chundru
628388982c arm64: dts: qcom: sm8450: Add OPP table support to PCIe 
PCIe host controller driver needs to choose the appropriate performance
state of RPMh power domain and interconnect bandwidth based on the PCIe
data rate.

Hence, add the OPP table support to specify RPMh performance states and
interconnect peak bandwidth.

It should be noted that the different link configurations may share the
same aggregate bandwidth, e.g., a 2.5 GT/s x2 link and a 5.0 GT/s x1
link have the same bandwidth and share the same OPP entry.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Link: https://lore.kernel.org/r/20240518-opp_support-v13-4-78c73edf50de@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:42:59 -05:00
Krishna chaitanya chundru
42870599f9 arm64: dts: qcom: sm8450: Add interconnect path to PCIe node 
Add PCIe-MEM & CPU-PCIe interconnect path to the PCIe nodes.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Link: https://lore.kernel.org/r/20240518-opp_support-v13-1-78c73edf50de@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:39:42 -05:00
Sagar Cheluvegowda
49cc31f8ab arm64: dts: qcom: sa8775p: mark ethernet devices as DMA-coherent 
Ethernet devices are cache coherent, mark it as such in the dtsi.

Fixes: ff499a0fbb ("arm64: dts: qcom: sa8775p: add the first 1Gb ethernet interface")
Fixes: e952348a7c ("arm64: dts: qcom: sa8775p: add a node for EMAC1")
Signed-off-by: Sagar Cheluvegowda <quic_scheluve@quicinc.com>
Link: https://lore.kernel.org/r/20240514-mark_ethernet_devices_dma_coherent-v4-1-04e1198858c5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:37:41 -05:00
Marc Gonzalez
737abcabe9 arm64: dts: qcom: msm8998: set qcom,no-msa-ready-indicator for wifi 
The ath10k driver waits for an "MSA_READY" indicator
to complete initialization. If the indicator is not
received, then the device remains unusable.

cf. ath10k_qmi_driver_event_work()

Several msm8998-based devices are affected by this issue.
Oddly, it seems safe to NOT wait for the indicator, and
proceed immediately when QMI_EVENT_SERVER_ARRIVE.

Jeff Johnson wrote:

  The feedback I received was "it might be ok to change all ath10k qmi
  to skip waiting for msa_ready", and it was pointed out that ath11k
  (and ath12k) do not wait for it.

  However with so many deployed devices, "might be ok" isn't a strong
  argument for changing the default behavior.

cf. also
https://wiki.postmarketos.org/wiki/Qualcomm_Snapdragon_835_(MSM8998)#WLAN

Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/0914f96e-fcfd-4088-924a-fc1991bce75f@freebox.fr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:13:18 -05:00
Luca Weiss
ffaa4b5d5d arm64: dts: qcom: sdm632-fairphone-fp3: Enable vibrator 
Enable the vibrator on the PMI632 which is used on this phone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240418-fp3-vibra-v1-2-b636b8b3ff32@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:08:13 -05:00
Luca Weiss
bbb1dd6402 arm64: dts: qcom: pmi632: Add vibrator 
Add a node for the vibrator module found inside the PMI632.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240418-fp3-vibra-v1-1-b636b8b3ff32@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:08:13 -05:00
Rob Herring (Arm)
c8a346e408 arm64: dts: qcom: Split PMU nodes for heterogeneous CPUs 
Arm heterogeneous configurations should have separate PMU nodes for each
CPU uarch as the uarch specific events can be different. The
"arm,armv8-pmuv3" compatible is also intended for s/w models rather than
specific uarch implementations.

All the kryo CPUs are missing PMU compatibles, so they can't be fixed.

Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20240417204247.3216703-1-robh@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 16:07:35 -05:00
Luca Weiss
839936d967 arm64: dts: qcom: qcs404: Use qcs404-hfpll compatible for hfpll 
Follow the updated bindings and use a QCS404-specific compatible for the
HFPLL on this SoC.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240218-hfpll-yaml-v2-3-31543e0d6261@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:32:06 -05:00
Martijn Braam
8308670116 arm64: dts: qcom: Add Motorola Moto G 2015 (osprey) 
Motorola Moto G 2015 is an msm8916 based smartphone.

Supported features:

- eMMC and SD;
- Buttons;
- Touchscreen;
- USB;
- Fuel Gauge;
- Sound.

Signed-off-by: Martijn Braam <martijn@brixit.nl>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
[Nikita: Use common dtsi]
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240405-msm8916-moto-init-v1-4-502b58176d34@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:29:42 -05:00
Wiktor Strzębała
24773481ae arm64: dts: qcom: Add Motorola Moto E 2015 LTE (surnia) 
Motorola Moto E 2015 LTE is an msm8916 based smartphone.

Supported features:

- eMMC and SD;
- Buttons;
- Touchscreen;
- USB;
- Fuel Gauge;
- Sound.

Signed-off-by: Wiktor Strzębała <wiktorek140@gmail.com>
[Valérie: Sound and modem]
Co-developed-by: Valérie Roux <undev@unixgirl.xyz>
Signed-off-by: Valérie Roux <undev@unixgirl.xyz>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
[Nikita: Use common dtsi]
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240405-msm8916-moto-init-v1-3-502b58176d34@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:29:42 -05:00
Ruby Iris Juric
65321d09e3 arm64: dts: qcom: Add device tree for Motorola Moto G4 Play (harpia) 
Motorola Moto G4 Play is an msm8916 based smartphone.

Supported features:

- eMMC and SD;
- Buttons;
- Touchscreen;
- USB;
- Fuel Gauge;
- Sound;
- Accelerometer.

msm8916 Moto devices share significant portion of the design so the
common parts are separated into a common dtsi.

Signed-off-by: Ruby Iris Juric <ruby@srxl.me>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
[Nikita: Split up to common dtsi]
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240405-msm8916-moto-init-v1-2-502b58176d34@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:29:41 -05:00
Raymond Hackley
e4558fcfbe arm64: dts: qcom: msm8916-samsung-rossa: Add LIS2HH12 accelerometer 
Core Prime LTE uses ST LIS2HH12 accelerometer. Add support for it.

[Stephen: Use common &st_accel definition from common dtsi]

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Link: https://lore.kernel.org/r/20240406111348.14358-4-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:15:07 -05:00
Siddharth Manthan
7f433e1e3c arm64: dts: qcom: msm8916-samsung-fortuna: Add LSM303C accelerometer/magnetometer 
Some Grand Prime use a ST LSM303C accelerometer/magnetometer combo.
Add support for it.

Signed-off-by: Siddharth Manthan <siddharth.manthan@gmail.com>
[Stephan: Move sensors to common dtsi (disabled by default)]
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
[Raymond: Use interrupts-extended]
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Link: https://lore.kernel.org/r/20240406111348.14358-3-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:15:07 -05:00
Joe Mason
a204bf3fb7 arm64: dts: qcom: msm8916-samsung-fortuna: Add BMC150 accelerometer/magnetometer 
Some Grand Prime use a Bosch BMC150 accelerometer/magnetometer combo.
The chip provides two separate I2C devices for the accelerometer
and magnetometer that are already supported by the bmc150-accel
and bmc150-magn driver.

Signed-off-by: Joe Mason <buddyjojo06@outlook.com>
[Stephan: Move sensors to common dtsi, disabled by default]
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
[Raymond: Add it to grandprimelte. Use interrupts-extended]
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Link: https://lore.kernel.org/r/20240406111348.14358-2-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:15:07 -05:00
Nikita Travkin
0ae1bf2e09 dt-bindings: arm: qcom: Add msm8916 based Motorola devices 
Add compatible values for the msm8916 based Motorola smartphones.

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405-msm8916-moto-init-v1-1-502b58176d34@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:12:20 -05:00
Gianluca Boiano
62aad66b57 arm64: dts: qcom: pmi8950: add pwm node 
This node is actually found on some msm8953 devices (xiaomi-mido) and
allows irled enablement

Signed-off-by: Gianluca Boiano <morf3089@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240402-pmi8950-pwm-support-v1-2-1a66899eeeb3@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 10:11:33 -05:00
Neil Armstrong
5f2fd4aefa dt-bindings: arm: qcom: Add Lenovo Smart Tab M10 (WiFi) 
This documents Lenovo Smart Tab M10 (WiFi) (model tbx605f)
which is a 10.1" tablet by Lenovo based on the SDM450 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240523-topic-sdm450-upstream-tbx605f-v1-1-e52b89133226@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 09:05:16 -05:00
Sumit Garg
cceb16d201 arm64: dts: qcom: apq8016: Add Schneider HMIBSC board DTS 
Add Schneider Electric HMIBSC board DTS. The HMIBSC board is an IIoT Edge
Box Core board based on the Qualcomm APQ8016E SoC.

Support for Schneider Electric HMIBSC. Features:
- Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306)
- 1GiB RAM
- 8GiB eMMC, SD slot
- WiFi and Bluetooth
- 2x Host, 1x Device USB port
- HDMI
- Discrete TPM2 chip over SPI
- USB ethernet adaptors (soldered)

Co-developed-by: Jagdish Gediya <jagdish.gediya@linaro.org>
Signed-off-by: Jagdish Gediya <jagdish.gediya@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Link: https://lore.kernel.org/r/20240527053826.294526-4-sumit.garg@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 08:49:18 -05:00
Sumit Garg
6cf67a2b51 dt-bindings: arm: qcom: Add Schneider Electric HMIBSC board 
Document the compatible for the Schneider Electric HMIBSC IIoT edge box
core board based on the Qualcomm APQ8016E SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Link: https://lore.kernel.org/r/20240527053826.294526-3-sumit.garg@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 08:49:18 -05:00
Sumit Garg
1fabbb0888 dt-bindings: vendor-prefixes: Add Schneider Electric 
Add vendor prefix for Schneider Electric (https://www.se.com/).

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Link: https://lore.kernel.org/r/20240527053826.294526-2-sumit.garg@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 08:49:18 -05:00
Dmitry Baryshkov
d3d8b80845 arm64: dts: qcom: msm8996: drop source clock entries from the UFS node 
There is no need to mention and/or to touch in any way the intermediate
(source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow
the example lead by all other platforms.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240408-msm8996-fix-ufs-v4-4-ee1a28bf8579@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 08:26:43 -05:00
Dmitry Baryshkov
7e35767cb7 arm64: dts: qcom: msm8996: set GCC_UFS_ICE_CORE_CLK freq directly 
Instead of setting the frequency of the interim UFS_ICE_CORE_CLK_SRC
clock, set the frequency of the leaf GCC_UFS_ICE_CORE_CLK clock directly.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240408-msm8996-fix-ufs-v4-2-ee1a28bf8579@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-05-28 08:26:43 -05:00