Jie Zhang
ed5ee207bc
arm64: dts: qcom: qcs615-ride: Enable Adreno 612 GPU
...
Enable GPU for qcs615-ride platform and provide path for zap
shader.
Signed-off-by: Jie Zhang <quic_jiezh@quicinc.com >
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260312-qcs615-spin-2-v8-4-fca38edcd6e6@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-02 16:01:43 -05:00
Gaurav Kohli
a74c7b347d
arm64: dts: qcom: talos: Add GPU cooling
...
Unlike the CPU, the GPU does not throttle its speed automatically when it
reaches high temperatures.
Set up GPU cooling by throttling the GPU speed when it reaches 105°C.
Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260312-qcs615-spin-2-v8-3-fca38edcd6e6@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-02 16:01:43 -05:00
Jie Zhang
8de397a561
arm64: dts: qcom: talos: Add gpu and rgmu nodes
...
Add gpu and rgmu nodes for Talos chipset.
Signed-off-by: Jie Zhang <quic_jiezh@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260312-qcs615-spin-2-v8-2-fca38edcd6e6@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-02 16:01:43 -05:00
Qingqing Zhou
1d5c82f19b
arm64: dts: qcom: talos: add the GPU SMMU node
...
Add the Adreno GPU SMMU node for Talos chipset.
Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com >
Signed-off-by: Jie Zhang <jie.zhang@oss.qualcomm.com >
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260312-qcs615-spin-2-v8-1-fca38edcd6e6@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-02 16:01:43 -05:00
Paul Sajna
a5a5ad9848
arm64: dts: qcom: sdm845-lg-common: Add chassis-type
...
The sdm845-lg devices are all phones, therefore handset chassis
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-12-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:48 -05:00
Paul Sajna
eb8fa32085
arm64: dts: qcom: sdm845-lg: Add wifi nodes
...
Wi-Fi now works with this patch, relevant firmware and
qcom,snoc-host-cap-skip-quirk
qcom,snoc-host-cap-skip-quirk has not been approved/merged in mainline,
so it is not included here.
ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0xff soc_id 0x40030001
ath10k_snoc 18800000.wifi: qmi fw_version 0x20060285 fw_build_timestamp 2020-10-12 23:35 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.2.0.c4-00645-QCAHLSWMTPLZ-1.336037.2
ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000
ath10k_snoc 18800000.wifi: kconfig debug 1 debugfs 1 tracing 0 dfs 0 testmode 0
ath10k_snoc 18800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790
ath10k_snoc 18800000.wifi: htt-ver 3.83 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1
ath10k_snoc 18800000.wifi: invalid MAC address; choosing random
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-11-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:48 -05:00
Paul Sajna
c6c66aa3ef
arm64: dts: qcom: sdm845-lg-judyln: Add display panel
...
Also include other supporting msm drm nodes, gpio and backlight
Co-developed-by: Amir Dahan <system64fumo@tuta.io >
Signed-off-by: Amir Dahan <system64fumo@tuta.io >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-10-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:48 -05:00
Paul Sajna
2e7cdd400b
arm64: dts: qcom: sdm845-lg-judyln: Add lab/ibb
...
These regulators are required for the LCD
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-9-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:48 -05:00
Amir Dahan
b49722c8a1
arm64: dts: qcom: sdm845-lg-common: Add LEDs
...
Add the multicolor status LED in the phone's notch.
Signed-off-by: Amir Dahan <system64fumo@tuta.io >
Reviewed-by: Pavel Machek <pavel@ucw.cz >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-8-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:48 -05:00
Christopher Brown
995c258982
arm64: dts: qcom: sdm845-lg-judyln: Add battery and charger
...
Values based on lineageos kernel
https://github.com/LineageOS/android_kernel_lge_sdm845/blob/lineage-22.2/arch/arm64/boot/dts/lge/sdm845-battery/LGE_BLT39_LGC_3000mAh.dtsi
Signed-off-by: Christopher Brown <crispybrown@gmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-7-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:48 -05:00
Paul Sajna
e746ed5af3
arm64: dts: qcom: sdm845-lg: Add uarts and Bluetooth
...
uart9 is debug serial on USB SBU1/2
UART RX is SBU1 and UART TX is SBU2 of the USB-C port).
1.8V Logic Level
Tested using pololu usb07a https://www.pololu.com/product/2585
and CH340 USB-UART
uart6 is bluetooth
Bluetooth: hci0: setting up wcn399x
Bluetooth: hci0: QCA Product ID :0x0000000a
Bluetooth: hci0: QCA SOC Version :0x40010214
Bluetooth: hci0: QCA ROM Version :0x00000201
Bluetooth: hci0: QCA Patch Version:0x00000001
Bluetooth: hci0: QCA controller version 0x02140201
Bluetooth: hci0: QCA Downloading qca/crbtfw21.tlv
Bluetooth: hci0: QCA Downloading qca/judyln/crnv21.bin
Bluetooth: hci0: QCA setup on UART is completed
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-6-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:47 -05:00
Paul Sajna
4ec3045c96
arm64: dts: qcom: sdm845-lg-common: Enable qups and their dma controllers
...
Qualcomm serial communicators required for i2c, serial, and spi
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-5-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:47 -05:00
Paul Sajna
e9f611de7a
arm64: dts: qcom: sdm845-lg-common: Enable venus
...
Qualcomm video en/de-coder
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-4-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:47 -05:00
Paul Sajna
8f4c53ae28
arm64: dts: qcom: sdm845-lg-judyp: Define firmware paths for judyp
...
For consistency with judyln and new naming scheme for firmware
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-3-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:47 -05:00
Paul Sajna
b9afe8581c
arm64: dts: qcom: sdm845-lg-judyln: Add firmware nodes, change path
...
Add paths for Qualcomm firmware, including:
ipa, modem, venus, gpu
GPU and bluetooth are confirmed working, others may need more
testing/fixes
But regardless they will need the firmware paths specified here
and firmware added upstream before they will work, so might as well
get started on it now.
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-2-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:47 -05:00
Paul Sajna
6a9e8df732
arm64: dts: qcom: sdm845-lg-common: Sort nodes and properties
...
Improve adherance to style guidelines below:
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Paul Sajna <sajattack@postmarketos.org >
Link: https://lore.kernel.org/r/20260331-judyln-dts-v7-1-87217b15fefb@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:41:47 -05:00
Abel Vesa
b4cfbee0df
arm64: dts: qcom: glymur-crd: Enable DisplayPort support
...
The two Type-C ports found on Glymur CRD are DisplayPort alternate mode
capable. Everything is in place already for the USB, but for DisplayPort
the controllers need to be enabled.
So enable the related DisplayPort controller for each of these two
ports. Also define the supported link frequencies for each output.
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260330-glymur-enable-displayport-v1-1-1543ad6dac3a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-04-01 09:40:16 -05:00
Alexander Koskovich
b683730e27
arm64: dts: qcom: sm8250: Add missing CPU7 3.09GHz OPP
...
This resolves the following error seen on the ASUS ROG Phone 3:
cpu cpu7: Voltage update failed freq=3091200
cpu cpu7: failed to update OPP for freq=3091200
Fixes: 8e0e8016cb ("arm64: dts: qcom: sm8250: Add CPU opp tables")
Signed-off-by: Alexander Koskovich <akoskovich@pm.me >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260307-sm8250-cpu7-opp-v1-1-435f5f6628a1@pm.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:35:01 -05:00
Vladimir Zapolskiy
40c15162c8
arm64: dts: qcom: sm8550-hdk: add support for the Display Card overlay
...
The SM8550-HDK board may be connected to a Display Card external PCB,
which is identical to the already supported SM8650-HDK Display Card,
it provides a VTDR6130 display with Goodix Berlin Touch controller, see
also commit bc90f56a16 ("arm64: dts: sm8650-hdk: add support for the
Display Card overlay") for additional details.
Two overlays are added to support SM8550-HDK plus Display Card and
SM8550-HDK plus Display Card plus Rear Camera Card setups.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260311001238.4191034-1-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:34:57 -05:00
Max McNamee
2ce450f77f
arm64: dts: qcom: msm8916-samsung-coreprimeltevzw: add device tree
...
Samsung Galaxy Core Prime Verizon Wireless is a phone based on MSM8916.
They are similar to the other Samsung devices based on MSM8916 with only a
few minor differences.
The device trees contain initial support with:
- GPIO keys
- Regulator haptic
- SDHCI (internal and external storage)
- USB Device Mode
- UART (on USB connector via the SM5502 MUIC)
- WCNSS (WiFi/BT)
- Regulators
- QDSP6 audio
- Speaker/earpiece/headphones/microphones via digital/analog codec in
MSM8916/PM8916
- WWAN Internet via BAM-DMUX
- PMIC and charger
- Touchscreen
There are different variants of Core Prime, with some differences in
NFC and MUIC.
The common parts are shared in
msm8916-samsung-fortuna-common.dtsi and msm8916-samsung-rossa-common.dtsi
to reduce duplication.
Signed-off-by: Max McNamee <maxmcnamee@proton.me >
[Raymond: Refactor touchscreen and MUIC. Add commit messages.]
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260223220514.2556033-4-wonderfulshrinemaidenofparadise@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:04:22 -05:00
Raymond Hackley
bb0a09a4fa
dt-bindings: qcom: Document samsung,coreprimeltevzw
...
Document the new samsung,coreprimeltevzw device tree bindings used in
msm8916-samsung-coreprimeltevzw.
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com >
Acked-by: Rob Herring (Arm) <robh@kernel.org >
Link: https://lore.kernel.org/r/20260223220514.2556033-3-wonderfulshrinemaidenofparadise@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:04:22 -05:00
Raymond Hackley
2145054750
arm64: dts: qcom: msm8916-samsung-fortuna: Move SM5504 from rossa and refactor MUIC
...
MUIC varies on fortuna/rossa devices, which could be either SM5502 or
SM5504. Move SM5504 from msm8916-samsung-rossa-common to
msm8916-samsung-fortuna-common and refactor MUIC.
Disable MUIC by default in msm8916-samsung-fortuna-common, and explicitly
specify them in each fortuna/rossa board.
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260223220514.2556033-2-wonderfulshrinemaidenofparadise@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:04:21 -05:00
Richard Acayan
3aa9971299
arm64: dts: qcom: sdm670: add llcc
...
Add the Last Level Cache Controller (LLCC) for the SDM670.
Signed-off-by: Richard Acayan <mailingradian@gmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260210021957.13357-4-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:01:46 -05:00
Luca Weiss
1d44de258d
arm64: dts: qcom: qcm6490-fairphone-fp5: Add front camera support
...
Add and configure the necessary nodes to enable the front camera
(Samsung S5KJN1), connected to CSIPHY 3.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org >
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com >
Reviewed-by: David Heidelberg <david@ixit.cz >
Link: https://lore.kernel.org/r/20260319-fp5-s5kjn1-v3-2-9cf4b8c09567@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:00:18 -05:00
Luca Weiss
e7fc3c46dc
arm64: dts: qcom: qcm6490-fairphone-fp5: Sort pinctrl nodes by pins
...
As per DTS Coding Style, sort pinctrl subnodes by the "pins" property,
in preparation to add more pinctrl states.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260319-fp5-s5kjn1-v3-1-9cf4b8c09567@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 09:00:18 -05:00
Luca Weiss
924d734960
arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on CCI busses
...
Enable the CCI I2C busses and add nodes for the EEPROMs found on the
camera that are connected there.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com >
Link: https://lore.kernel.org/r/20260320-milos-cci-v2-3-1947fc83f756@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:59:19 -05:00
Luca Weiss
e9e75b3e62
arm64: dts: qcom: milos: Add CCI busses
...
Add the nodes and the pinctrl for the CCI I2C busses on the Milos SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com >
Link: https://lore.kernel.org/r/20260320-milos-cci-v2-2-1947fc83f756@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:59:19 -05:00
Pradeep P V K
7658e9b948
arm64: dts: qcom: purwa-iot-evk: Enable UFS
...
Enable UFS for purwa-iot-evk board.
Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260323-purwa-ufs-v2-1-58fb2c168786@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:58:03 -05:00
Krzysztof Kozlowski
7f390d6ccb
arm64: dts: qcom: eliza: Add thermal sensors
...
Add TSENS thermal sensors to Qualcomm Eliza SoC among with thermal
zones. The TSENS is compatible with previous generations.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260327101225.382493-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:43:42 -05:00
Pengyu Luo
2f4c5dea9a
arm64: dts: qcom: sc8280xp: Add dsi nodes on SC8280XP
...
The DT configuration follows other Samsung 5nm-based Qualcomm SOCs,
utilizing the same register layouts and clock structures.
However, DSI won't work properly for now until we submit dispcc fixes.
And some DSC enabled panels require DPU timing calculation fixes too.
(hdisplay / width timing round errors cause the fifo error)
Co-developed-by: Tianyu Gao <gty0622@gmail.com >
Signed-off-by: Tianyu Gao <gty0622@gmail.com >
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Tested-by: White Lewis <liu224806@gmail.com > # HUAWEI Gaokun3
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260308064835.479356-5-mitltlatltl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:41:00 -05:00
David Heidelberg
7a4790b1a2
arm64: dts: qcom: sdm845-oneplus: Describe Wi-Fi/BT properly
...
The onboard Wi-Fi / BT device, WCN3990, has a simple on-chip PMU, which
further spreads generated voltage. Describe the PMU in the device tree
and rewire Bluetooth and WiFi supply properties to use the PMU LDO
outputs instead of referencing the SoC regulators directly.
Verified against the datasheet.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: David Heidelberg <david@ixit.cz >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260327-wcn3990-pwrctl-sdm845-v1-2-3f5c34e3fdd0@ixit.cz
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:37:01 -05:00
David Heidelberg
0a9c871566
arm64: dts: qcom: sdm845-google: Describe Wi-Fi/BT properly
...
The onboard Wi-Fi / BT device, WCN3990, has a simple on-chip PMU, which
further spreads generated voltage. Describe the PMU in the device tree
and rewire Bluetooth and Wi-Fi supply properties to use the PMU LDO
outputs instead of referencing the SoC regulators directly.
Couldn't verify the swctrl GPIO thus omitted.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: David Heidelberg <david@ixit.cz >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260327-wcn3990-pwrctl-sdm845-v1-1-3f5c34e3fdd0@ixit.cz
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:37:01 -05:00
Tobias Heider
c7c8ed27b7
arm64: dts: qcom: drop redundant zap-shader memory-region
...
This is already defined in the gpu_zap_shader node in hamoa.dtsi,
there is no need to redefine it.
Signed-off-by: Tobias Heider <tobias.heider@canonical.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260328-zap-v1-2-f6810b9b4930@canonical.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:34:34 -05:00
Tobias Heider
79772ce80e
arm64: dts: qcom: fix remaining gpu_zap_shader labels
...
Most qcom DTs were converted to use the gpu_zap_shader label instead
of patching the gpu node in commit 2377626fd2 ("arm64: dts: qcom:
add gpu_zap_shader label"). This fixes the remaining ones.
Signed-off-by: Tobias Heider <tobias.heider@canonical.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260328-zap-v1-1-f6810b9b4930@canonical.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:34:34 -05:00
Christopher Obbard
25e7cc37cf
arm64: dts: qcom: msm8996: fix indentation in sdhc2 node
...
Drop stray leading whitespace from sdhc2 node.
No functional change.
Signed-off-by: Christopher Obbard <christopher.obbard@linaro.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260329-wip-obbardc-msm8996-whitespace-v1-1-ba3a278f043c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:32:08 -05:00
Canfeng Zhuang
74620bf0c3
arm64: dts: qcom: monaco-evk: enable UART6 for robot expansion board
...
The monaco-evk mezzanine connector supports a robot expansion board that
requires UART6, which is currently disabled. This prevents the expansion
board from exchanging data and control commands.
Enable UART6 and assign the serial2 alias to provide stable device
enumeration for the expansion board.
Signed-off-by: Canfeng Zhuang <canfeng.zhuang@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260327083101.1343613-3-canfeng.zhuang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:31:45 -05:00
Canfeng Zhuang
0be638f326
arm64: dts: qcom: lemans-evk: enable UART0 for robot expansion board
...
The lemans-evk mezzanine connector supports a robot expansion board that
requires UART0, which is currently disabled. This prevents the expansion
board from exchanging data and control commands.
Enable UART0 and assign the serial2 alias to provide stable device
enumeration for the expansion board.
Signed-off-by: Canfeng Zhuang <canfeng.zhuang@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260327083101.1343613-2-canfeng.zhuang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:31:45 -05:00
Abel Vesa
e46b48b853
arm64: dts: qcom: milos: Add missing CX power domain to GCC
...
Unless CX is declared as the power-domain of GCC, votes (power and
performance) on the GDSCs it provides will not propagate to the CX,
which might result in under-voltage conditions.
Add the missing power-domains property to associate GCC with RPMHPD_CX.
Fixes: d9d59d105f ("arm64: dts: qcom: Add initial Milos dtsi")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260327-dt-fix-milos-eliza-gcc-power-domains-v1-2-f14a22c73fe9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:27:40 -05:00
Erikas Bitovtas
f757451504
arm64: dts: qcom: msm8939-asus-z00t: add regulators for ambient light and proximity sensor
...
VCNL4000 includes support for regulators. Add regulators listed in the
downstream device tree so they can be powered in during initialization.
VLED supply is missing downstream, so it will be powered on by a dummy.
Signed-off-by: Erikas Bitovtas <xerikasxx@gmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260330-z00t-cm36686-regulators-v1-1-03e23b03bd70@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:26:41 -05:00
Jingyi Wang
45ac3ced1b
arm64: dts: qcom: kaanapali: Duplicate whitespace cleanup
...
Exactly one space is expected before '{' characters, clean
up duplicate whitespaces.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260330-knp-space-cleanup-v1-1-0995302f7557@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:23:54 -05:00
Srinivas Kandagatla
af0d19ea5a
arm64: dts: monaco: extend fastrpc compute cb
...
For some reason we ended up adding only 4 out of 11 compute cb's for
CDSP, add the missing compute cb. This will also improve the end
user-experience by enabling running multiple AI usecases in parallel.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260326154111.2781802-1-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:22:46 -05:00
Bjorn Andersson
cde64269ee
arm64: dts: qcom: qcs6490-rb3gen2: Enable uPD720201 and GL3590
...
The QCS6490 Rb3Gen2 has a Renesas μPD720201 XHCI controller hanging off
the TC9563 PCIe switch, on this a Genesys Logic GL3590 USB hub provides
two USB Type-A ports and an ASIX AX88179 USB 3.0 Gigabit Ethernet
interface.
The Renesas chip is powered by two regulators controlled through PM7250B
GPIOs 1 and 4, and the power/reset pin is pulled down by PM8350C GPIO 4.
The Genesys chip power is always-on, but the reset pin is controlled
through TLMM GPIO 162.
Describe the Renesas chip on the PCIe bus, with supplies and reset, to
allow it to be brought out of reset and discovered. Then describe the
two peers of the USB hub, with its reset GPIO, to allow this to be
brought out of reset.
The USB Type-A connectors are not described, as they are in no regard
controlled by the operating system.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260323-rb3gen2-upd-gl3590-v2-1-073514bf9ed5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-30 08:10:43 -05:00
Le Qi
20eb0aa76f
arm64: dts: qcom: hamoa-evk: Add DP0/DP1 audio playback support
...
The hamoa-evk DTS currently lacks DAI links for DP0 and DP1, preventing
the sound card from exposing these playback paths. Add the missing links
to enable audio output on both DP interfaces.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Signed-off-by: Le Qi <le.qi@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260210024037.3719191-1-le.qi@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 10:21:13 -05:00
Geert Uytterhoeven
ec6944df7b
arm64: dts: qcom: Drop CPU masks from GICv3 PPI interrupts
...
Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers. Drop the masks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Link: https://lore.kernel.org/r/226c5d1005a6e295e0581b2c89e5510dbb7aa9d1.1772643434.git.geert+renesas@glider.be
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:59 -05:00
Abel Vesa
6b25a72aba
arm64: dts: qcom: eliza: Add missing msi-parent for UFS
...
Wire up the UFS controller to the GIC ITS by specifying the
msi-parent property. The UFS host uses MSI and requires a valid
ITS mapping in order to allocate and receive interrupts.
Add the ITS reference along with the device ID to match the SMMU
stream ID.
Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-3-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:59 -05:00
Abel Vesa
13aadeca9e
arm64: dts: qcom: eliza: Add missing CX power domain to GCC
...
Unless CX is declared the power-domain of GCC votes (power and
performance) on the GDSCs provided by GCC will not propagate to the CX,
which might result in under-voltage conditions.
Add the missing power-domains property to associate GCC with RPMHPD_CX.
Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-2-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:59 -05:00
Abel Vesa
fa095e0b69
arm64: dts: qcom: eliza: Coding style clean-ups
...
Some coding style issues were raised during review but the devicetree
was merged meanwhile. Address them here.
These changes are non-functional.
Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-1-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:58 -05:00
Dmitry Baryshkov
fee828abbd
arm64: dts: qcom: patch mahua thermal zones by label
...
Updating DT nodes by the full path is fragile and frowned upon, it's
easy to miss the rename of the node in the main tree. Add necessary
labels and patch thermal zones for Mahua using those labels.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260320-mahua-fix-thermals-v1-1-8957bf976c90@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:58 -05:00
Dmitry Baryshkov
2c098c2bae
arm64: dts: qcom: purwa: deduplicate thermal sensors with Hamoa
...
Hamoa and Purwa have pretty close thermal zones definitions. The major
difference is that several zones are absent (because of the lack of the
CPU cluster) and several zones use tsens2 instead of tsens3.
Instead of completely duplicating thermal zones for Purwa, reuse themal
zones from Hamoa, patching them where required.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260320-purwa-drop-thermals-v1-1-2c9fe046cd02@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:58 -05:00
Abel Vesa
eb5fa758f7
arm64: dts: qcom: glymur-crd: Enable WLAN and Bluetooth
...
Both Glymur and Mahua CRDs feature a WCN7850 M.2 WLAN and Bluetooth
combo card.
So describe both the 0.9V and the 3.3V regulators, then WCN7850 PMU and
the PCIe WLAN and the UART Bluetooth nodes.
Do this in the Glymur CRD generic dtsi so that both Glymur and Mahua CRDs
benefit from it towards enabling WLAN and Bluetooth functionality.
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com >
Reviewed-by: Zijun Hu <zijun.hu@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20260324-glymur-dts-crd-enable-bt-wlan-v2-1-6afcf1ac277a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2026-03-26 09:40:58 -05:00