Commit Graph

1352789 Commits

Author SHA1 Message Date
Arnd Bergmann
ebe6d8f00d Merge tag 'mvebu-dt64-6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt64 for 6.16 (part 1)

Clean up unused pinctrl-names in pca9555 nodes

* tag 'mvebu-dt64-6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: Drop unused "pinctrl-names"

Link: https://lore.kernel.org/r/87tt5kpqy9.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22 00:07:27 +02:00
Arnd Bergmann
591ad24c6c Merge tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16 (take four)

  - Fix White Hawk ARD Audio breakage.

* tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups

Link: https://lore.kernel.org/r/cover.1747817851.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22 00:02:03 +02:00
Arnd Bergmann
17e6320b0d Merge tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16 (take three)

  - Silence a DTC warning,
  - Add an extra compatible value to avoid future issues.

* tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  riscv: dts: renesas: Add specific RZ/Five cache compatible
  arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check

Link: https://lore.kernel.org/r/cover.1747399860.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:59:56 +02:00
Arnd Bergmann
00000994fe Merge tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.16

Starfive:
All Starfive this time (again), enabling the usb3 port on the framework
laptop mainboard, and a few cleanup patches that are syncing things with
the dts used by U-Boot.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
  riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
  riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
  riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
  riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
  riscv: dts: starfive: fml13v01: enable USB 3.0 port

Link: https://lore.kernel.org/r/20250516-gap-exploring-f8f516ab4e1c@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:57:49 +02:00
Arnd Bergmann
ced334a21c Merge tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
Microchip ARM64 device tree updates for v6.16

This update includes:
- fix CPU node "enable-method" property dependencies

* tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies

Link: https://lore.kernel.org/r/20250516055607.11248-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:57:20 +02:00
Arnd Bergmann
ea15963b26 Merge tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
Microchip AT91 device tree updates for v6.16

This update includes:
- more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms,
  SRAM, DRAM, RTC, RTT, GBPR)
- cleanups and fixes for Calao boards

* tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
  ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
  ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
  ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
  ARM: dts: microchip: sama7d65_curiosity: add EEPROM
  ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
  ARM: dts: microchip: sama7d65: Enable GMAC interface
  ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
  ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
  ARM: dts: at91: at91sam9263: fix NAND chip selects
  ARM: dts: at91: usb_a9g20: move wrong RTC node
  ARM: dts: at91: calao_usb: simplify chosen node
  ARM: dts: at91: usb_a9260: use 'stdout-path'
  ARM: dts: at91: calao_usb: simplify memory node
  ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select
  ARM: dts: at91: usb_a9g20: add SPI EEPROM

Link: https://lore.kernel.org/r/20250516055330.10852-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:55:13 +02:00
Arnd Bergmann
0feaf3c056 Merge tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner device tree changes for 6.16

Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
- Radxa Cubie A5E
- X96Q-Pro+
- Avaota-A1

Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
Note: the SoC has two different ethernet controllers.

Changes to existing SoCs:
- Enable GPU on H616 with all boards enabled
- Set maximum MMC frequency for the A100

Changes to existing boards:
- Add WiFi/BT header on PINE64 A64 boards
- Add hp-det-gpios for Anbernic RG35XX
- Add support for PHY LEDs on Bananapi (the original one)

Add new devices for existing SoCs:
- YuzukiHD Chameleon based on H6
- Liontron H-A133L based on A133 (compatible with A100)

Tree wide cleanups:
- Use preferred node names for cooling maps
- Align wifi node name with bindings
- Drop spurious 'clock-latency-ns' properties for H5 & H6

* tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits)
  arm64: dts: allwinner: a100: add Liontron H-A133L board support
  dt-bindings: arm: sunxi: Add Liontron H-A133L board name
  dt-bindings: vendor-prefixes: Add Liontron name
  ARM: dts: bananapi: add support for PHY LEDs
  arm64: dts: allwinner: a100: set maximum MMC frequency
  arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board
  arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board
  arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC
  dt-bindings: sram: sunxi-sram: Add A523 compatible
  arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard
  arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64
  arm64: dts: allwinner: correct the model name for Radxa Cubie A5E
  ARM: dts: allwinner: Align wifi node name with bindings
  arm64: dts: allwinner: Align wifi node name with bindings
  arm64: dts: allwinner: h616: enable Mali GPU for all boards
  arm64: dts: allwinner: h616: Add Mali GPU node
  arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX
  arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties
  arm/arm64: dts: allwinner: Use preferred node names for cooling maps
  arm64: dts: allwinner: h616: add YuzukiHD Chameleon support
  ...

Link: https://lore.kernel.org/r/aCaeZJ2t4S_xhgjp@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:52:48 +02:00
Arnd Bergmann
38181494e4 Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.16, round 1

Highlights:
----------

- MCU:
  - Add low power timer on STM32F746
  - Add STM32H747 High end MCU support. It embeds:
    - dual-core (Cortex-M7 + Cortex-M4)
    - up to 2 Mbytes flash
    - 1 Mbyte of internal RAM
  - Add STM32H747i-disco board support. Detailed information can be
    found at:
    https://www.st.com/en/evaluation-tools/stm32h747i-disco.html

- MPU:
  - STM32MP13:
    - Add VREFINT calibration support based on ADC.

  - STMP32MP15:
    - Add new Ultratronik Fly board support:
      - based on STM32MP157C SoC
      - 1GB of DDR3
      - Several connections are available on this boards:
        2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
	SDcard, RJ45, ...

  - STM32MP25:
    - Add OCTOSPI support on STM32MP25 SoCs
    - Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
    - Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
      LPTIM3 as low power broadcast timer on STM32MP257F-EV1.

* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
  ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
  MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
  dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
  dt-bindings: vendor-prefixes: Add Ultratronik
  arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
  arm64: dts: st: add low-power timer nodes on stm32mp251
  arm64: defconfig: enable STM32 LP timer clockevent driver
  arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
  arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
  arm64: dts: st: Add OMM node on stm32mp251
  ARM: dts: stm32: support STM32h747i-disco board
  ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
  ARM: dts: stm32: add pin map for UART8 controller on stm32h743
  ARM: dts: stm32: add uart8 node for stm32h743 MCU
  dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
  ARM: stm32: add a new SoC - STM32H747
  dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
  ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
  ARM: dts: st: stm32: Align wifi node name with bindings
  ARM: dts: stm32: add low power timer on STM32F746
  ...

Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:51:19 +02:00
Arnd Bergmann
ba32d96e90 Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt
RISC-V SpacemiT DT changes for 6.16

- Add clock driver, fix for pinctrl/uart
- Add gpio support, enable LED heartbeat

* tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux:
  riscv: dts: spacemit: add gpio LED for system heartbeat
  riscv: dts: spacemit: add gpio support for K1 SoC
  riscv: dts: spacemit: Acquire clocks for UART
  riscv: dts: spacemit: Acquire clocks for pinctrl
  riscv: dts: spacemit: Add clock tree for SpacemiT K1
  dt-bindings: clock: spacemit: Add spacemit,k1-pll
  dt-bindings: soc: spacemit: Add spacemit,k1-syscon

Link: https://lore.kernel.org/r/20250514044841-GYA524674@gentoo
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:48:03 +02:00
Arnd Bergmann
759dd3fea1 Merge tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.16

Introduce support for the AP8064-based LG Nexus 4. MSM8226 is extended
with modem-related features, the LTE-capable variant MSM8926 is
introduced, and modem support is enabled on Samsung Galaxy Tab 4.

Display-related clocks and power-domains are defined for the simple
framebuffer of Motorola Moto G, to allow booting without
clk_ignore_unused and pd_ignore_unused.

On MSM8960 SDCC BAM and thermal sensor (tsens) is introduced.

* tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: apq8064: move replicator out of soc node
  ARM: dts: qcom: apq8064: use new compatible for SPS SIC device
  ARM: dts: qcom: apq8064: use new compatible for SFPB device
  ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device
  ARM: dts: qcom: apq8064: add missing clocks to the timer node
  ARM: dts: qcom: apq8064-lg-nexus4-mako: Enable WiFi
  ARM: dts: qcom: msm8226-motorola-falcon: specify vddio_disp output voltage
  ARM: dts: qcom: msm8226-motorola-falcon: limit TPS65132 to 5.4V
  ARM: dts: qcom: msm8226-motorola-falcon: add I2C clock frequencies
  ARM: dts: qcom: msm8226-motorola-falcon: add clocks, power-domain to simpleFB
  ARM: dts: qcom: ipq4019: Drop redundant CPU "clock-latency"
  ARM: dts: qcom: sdx55/sdx65: Fix CPU power-domain-names
  ARM: dts: qcom: msm8974: Use the header with DSI phy clock IDs
  ARM: dts: qcom: msm8226: Use the header with DSI phy clock IDs

Link: https://lore.kernel.org/r/20250513214111.43401-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:47:21 +02:00
Arnd Bergmann
2b183108bc Merge tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
VT8500 DTS ARM changes for v6.16

1. New board: VIA APC Rock/Paper.
2. Add SCC ID register/socinfo node.
3. List all timer interrupts.

* tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: vt8500: list all four timer interrupts
  ARM: dts: vt8500: add DT nodes for the system config ID register
  ARM: dts: vt8500: Add VIA APC Rock/Paper board
  dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards

Link: https://lore.kernel.org/r/20250513104216.25803-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:46:02 +02:00
Arnd Bergmann
12a75f2d9f Merge tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.16

The Snapdragon X Plus platform and related reference device is
introduced. Devicetree for the Xiaomi Redmi Note 8 is added.

Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
support.

IPQ6018 SMEM is transitioned to be described directly in the
reserved-memory node.

Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
QCS6490 Rb3Gen2 and the vision mezzanine is described.
The Fairphone FP5 gains touchscreen and USB Type-C display support, and
the QCM6490 IDP board gains a required listed of protected clocks.

The camera subsystem in SC7280 is described and UFS is transitioned to
use operating points.

On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
UART pinctrl state is cleaned up.

The MSM8953 platform gains another UART and interconnects.

On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
interrupts are added.

Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
charging, fuel gauge, haptic, and LED, as well as the PMIC used for
display and touchscreen, which then is used to enable the touchscreen.

The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
backlight control.

Display and GPU are enabled for the Nothing Phone (1).

QCS615 platform gains command DB definition.

The QCS8300 platform gains description of more QUP instances, CPUfreq,
PCIe SMMU and the SPMI controller.

On SAR2130P PCIe EP device nodes are added.

On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
is enabled, and firmware-path are defined on ADSP and WCNSS.

The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
enabled, and the vision mezzanine on both gets their CMA configuration
cleaned up. Xiaomi Pocophone F1 gains touchscreen support.

On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
described.

On SM8450 the PCIe endpoint controller is described.

For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
sleep stats.

SM8650 gians OSM L3 scaling and variety of OPP tables and missing
interconnect definitions. The thermal trip points for CPU cores and GPU
are raised in reliance on hardware throttling.
SM8650 is also transitioned to per-CPU interrupt partitions, in order to
properly describe the PMU interrupts. Missing Coresight ETE instances
are added.

On SM8750 the cluster idle states are corrected, then audio and compute
DSPs are introduced, together with the crypto and rng blocks. Modem
support is added and enabled on MTP and QRD devices.

On SC8280XP overlays are introduced for those running Linux at EL2 on
these devices. A few more temp-alarm instances are added for the PMICs.

On the X Elite platform GPU cooling and watchdog is introduced, together
with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
display, the QCP gains WiFi/BT power sequence, and a few devices learns
about HBR3. The RTC support is enabled and regulators that are feeding
resources that should be always on is marked as such on a variety of
boards.
The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
describe the LCD and OLED variants.

Missing properties for the crypto BAM is introduced on a variety of
platforms, taking care of a long standing error message in the kernel
log during boot.

DSI phy clock ids are transitioned to use identifiers from the PHY
header file and VBIF region size is corrected, across a large number of
platforms.

A couple of DWC3 quirks are added across a lot of platforms.

The arm32-for-6.15 pull request was accidentally merged into the
arm64-for-6.16 branch and this wasn't discovered until a significant
number of commits would have to be rebased. As such this is kept here as
well.

* tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (308 commits)
  arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support
  arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support
  arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes
  arm64: dts: qcom: qcs8300: add the pcie smmu node
  arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override
  arm64: dts: qcom: msm8953: Add interconnects
  arm64: dts: qcom: msm8953: Add uart_5
  arm64: dts: qcom: sm8350: Use q6asm defines for reg
  arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg
  arm64: dts: qcom: sdm850*: Use q6asm defines for reg
  arm64: dts: qcom: sdm845*: Use q6asm defines for reg
  arm64: dts: qcom: sc7280: Use q6asm defines for reg
  arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg
  arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg
  arm64: dts: qcom: msm8996*: Use q6asm defines for reg
  arm64: dts: qcom: msm8953: Use q6asm defines for reg
  arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg
  arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg
  arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C
  arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch
  ...

Link: https://lore.kernel.org/r/20250511235241.15192-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:42:13 +02:00
Arnd Bergmann
c307e9c1a4 Merge tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt
Nuvoton ARM devicetree updates for v6.16

- MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI
- Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms

* tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  ARM: dts: nuvoton: Add MMC Nodes
  ARM: dts: nuvoton: Add OHCI node
  ARM: dts: nuvoton: Add UDC nodes
  ARM: dts: nuvoton: Add EDAC node
  ARM: dts: nuvoton: Align GPIO hog name with bindings

Link: https://lore.kernel.org/r/CACPK8Xe=f_hNNWUGL670x4-OeKgDB+2P+mxp5BaTLW==T5jE_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:29:44 +02:00
William A. Kennington III
7e1a0dfb3f arm64: dts: nuvoton: Add pinctrl
This is critical to support multifunction pins shared between devices as
well as generic GPIOs.

Signed-off-by: William A. Kennington III <william@wkennington.com>
Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:10:24 +02:00
Arnd Bergmann
816a748bee Merge tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.16

Two cleanups which were missed on mailing lists - align GPIO node names
with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894.

* tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred style
  arm64: dts: mediatek: mt7622: Align GPIO hog name with bindings

Link: https://lore.kernel.org/r/20250513104216.25803-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 19:13:59 +02:00
Arnd Bergmann
53c3712fd5 Merge tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT for v6.16:
- Amlogic A4 Pinctrl support
- UART RX/TX pull-up pinconf properties for all SoCs
- SARADC support for the S905L SoC variant
- Drop clock-latency in CPU node
- Amlogic clk measure support for S4 & C3 Socs
- Amlogic S6/S7/S7D initial support
- I2C default pull-up bias pinconf property on Amlogic GXL based boards
- Amlogic A4 & A5 Reset Controller support
- New Boards:
  - Amlogic S6 BL209 Reference Board
  - Amlogic S7 BP201 Reference Board
  - Amlogic S7D BM202 Reference Board
  - Amlogic S805Y xiaomi-aquaman/Mi TV Stick

* tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (21 commits)
  arm64: dts: amlogic: Add A5 Reset Controller
  arm64: dts: amlogic: Add A4 Reset Controller
  arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV Stick
  dt-bindings: arm: amlogic: add S805Y and Mi TV Stick
  arm64: dts: amlogic: gxl: set i2c bias to pull-up
  arm64: dts: add support for S7D based Amlogic BM202
  arm64: dts: add support for S7 based Amlogic BP201
  arm64: dts: add support for S6 based Amlogic BL209
  dt-bindings: arm: amlogic: add S7D support
  dt-bindings: arm: amlogic: add S7 support
  dt-bindings: arm: amlogic: add S6 support
  arm64: dts: amlogic: S4: Add clk-measure controller node
  arm64: dts: amlogic: C3: Add clk-measure controller node
  arm64: dts: amlogic: Drop redundant CPU "clock-latency"
  arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatible
  arm64: dts: amlogic: a1: enable UART RX and TX pull up by default
  arm64: dts: amlogic: axg: enable UART RX and TX pull up by default
  arm64: dts: amlogic: g12: enable UART RX and TX pull up by default
  arm64: dts: amlogic: gxl: enable UART RX and TX pull up by default
  arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by default
  ...

Link: https://lore.kernel.org/r/5f7d3fa4-2d9d-450b-b384-abdd903284dc@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 19:12:41 +02:00
Arnd Bergmann
709c8afa15 Merge tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM DT for v6.16:
- UART RX/TX pull-up pinconf properties for all SoCs
- New Boards:
  - Meson8 TCU Fernsehfee 3.0

* tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: dts: amlogic: meson8-fernsehfee3: Describe regulators
  ARM: dts: amlogic: Add TCU Fernsehfee 3.0
  dt-bindings: arm: amlogic: Add TCU Fernsehfee 3.0 board
  dt-bindings: vendor-prefixes: Add TC Unterhaltungselektronik AG
  ARM: dts: amlogic: meson8b: enable UART RX and TX pull up by default
  ARM: dts: amlogic: meson8: enable UART RX and TX pull up by default

Link: https://lore.kernel.org/r/838c5305-5c5b-4232-b7fe-86598dc50ace@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 19:09:47 +02:00
Arnd Bergmann
e04381e7b7 Merge tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.16

1. Tesla FSD: Add Ethernet.
2. ExynosAutov920: Add more serial nodes, clock controllers for CPU
   cluster CL0, CL1 and CL2.
3. New Exynos7870 SoC with pretty decent coverage: pin controllers,
   clock controllers, I2C, MMC, serial and USB.  New boards using
   Exynos7870: Samsung Galaxy J7 Prime, Samsung Galaxy A2 Core and
   Samsung Galaxy J6.
4. Google GS101: Add pmu-intr-gen syscon node for proper CPU hotplug.
5. Switch USI (serial engines) nodes to new samsung,mode constant coming
   with DT bindings v6.15-rc1.

* tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: gs101: add pmu-intr-gen syscon node
  arm64: dts: exynos: add initial support for Samsung Galaxy J6
  arm64: dts: exynos: add initial support for Samsung Galaxy A2 Core
  arm64: dts: exynos: add initial support for Samsung Galaxy J7 Prime
  arm64: dts: exynos: add initial devicetree support for exynos7870
  dt-bindings: arm: samsung: add compatibles for exynos7870 devices
  arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes
  arm64: dts: exynosautov920: add cpucl0 clock DT nodes
  arm64: dts: exynos: Add DT node for all UART ports
  arm64: dts: exynos: update all samsung,mode constants
  arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC
  arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC

Link: https://lore.kernel.org/r/20250513101023.21552-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 19:08:29 +02:00
Krzysztof Kozlowski
87901f6940 ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
Recently DT bindings expect 'wifi' as node name:

  s5pv210-fascinate4g.dtb: wlan@1: $nodename:0: 'wlan@1' does not match '^wifi(@.*)?$'

Link: https://lore.kernel.org/r/20250424084655.105011-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250513101023.21552-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 19:01:39 +02:00
Arnd Bergmann
179fa6e8c2 Merge tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.16

Generic Fixups/Cleanups:
* am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot

SoC Specific features and Fixes:
AM62Ax:
* C7x and R5F support added
* Bug fix for emmc clock to point to default
* CPUFreq thermal throttling on thermal alert

AM62P5:
* Add RNG Node (common to J722s)
* Bug fix for emmc clock to point to default (common to J722S)

AM625:
* Wakeup R5 node
* Bug fix for emmc clock to point to default
* PRUSS-M support
* New GPU bindings

AM64:
* Switch to 64-bit address space for PCIe0
* Add PCIe control nodes for main_conf region
* Reserve timer nodes used by MCU F/w.

AM65:
* MMC: Add missing delay timing values for SDR and legacy modes
* Add compatible for AM65x syscon and PCIe control properties
  (dtbs_check fixes)

J7200:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.

J721E:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1.

J721S2:
* GPU node for Imagination Tech Rouge BXS GPU.
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.

J722s/AM67A:
* Switch serdes status to be enabled by board file than at SoC level.
* Switch to 64-bit address space for PCIe0.

J784S4/J742S2/AM69:
* Add ASPCIE0 and enable output for PCIe1
* Fix length of serdes_ln_ctrl.
* Switch to 64-bit address space for PCIe0,1.

Board Specific:
AM62Ax:
* SK: co-processors C7x, R5, PWM support added
* phycore-som: co-processors C7x, R5

AM62P5:
* Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support.
* SK: Add remote processor support, PWM

AM625:
* Add BeagleBoard.org PocketBeagle-2 support
* phycore-som: Enable R5F support
* Verdin: Add eeprom compatible fallback
* SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays
  (dtbs_check fixes)
* BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes)
* phyboard-lyra: Add cooling maps for fan
* emmc bug fixes: add non-removable flag for eMMC.

AM65:
* EVM: Add missing power supply description ofr Rocktech panel
  (dtbs_check fixes)

J721E:
* EVM: Enable OSPI1
* EVM/SK: Dt nodes description for mandatory power suplpies for panel and
  sensors (dtbs_check fixes)

J721S2/AM68:
* Add phyBOARD-Izar-AM68x
* am68-SK: Fix regulator hierarchy

J722s/AM67A:
* EVM: Add mux controls for CSI2, power regulator nodes and add overlays for
  quad IMX219 and TEVI OV5640.
* BeagleY-AI: Add bootph for main_gpio1

J784S4/J742S2/AM69:
* usxgmii expansion board: Drop un-necessary pinctrl-names
* evm: Add overlay for USB0 Type-A option

* tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits)
  arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
  arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
  arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX
  arm64: dts: ti: j722s-evm: Add DT nodes for power regulators
  arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP
  arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP
  arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors
  arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors
  arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps
  arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert
  arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E
  arm64: dts: ti: k3-j721s2: Add GPU node
  arm64: dts: ti: k3-am62: New GPU binding details
  arm64: dts: ti: k3-am62-main: Add PRUSS-M node
  arm64: dts: ti: k3-am64: Reserve timers used by MCU FW
  arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP
  arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP
  arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors
  arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
  arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors
  ...

Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 18:54:53 +02:00
Nikolaos Pasaloukos
c07da6de0e arm64: dts: blaize-blzp1600: Enable GPIO support
Blaize BLZP1600 uses the custom silicon provided from
VeriSilicon to add GPIO support.
This interface is used to control signals on many other
peripherals, such as Ethernet, USB, SD and eMMC.

Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
Link: https://lore.kernel.org/r/20250512133302.151621-1-nikolaos.pasaloukos@blaize.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 18:54:02 +02:00
Arnd Bergmann
7e358b8cc1 Merge tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux into soc/dt
T-HEAD Devicetrees for v6.16

There are several additions for the T-Head TH1520 SoC:

 - AON (Always-On) node which serves as a power-domain controller
 - Reset controller node
 - VO (Video Output) clock controller node

These changes have all been tested in linux-next with the corresponding
driver patches.

Signed-off-by: Drew Fustini <drew@pdp7.com>

* tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux:
  riscv: dts: thead: Add device tree VO clock controller
  riscv: dts: thead: Introduce reset controller node
  riscv: dts: thead: Introduce power domain nodes with aon firmware
2025-05-21 18:50:08 +02:00
Matthew Gerlach
24822c4b47 dt-bindings: clock: socfpga: convert to yaml
Convert the clock device tree bindings to yaml for the Altera SoCFPGA
Cyclone5, Arria5, and Arria10 chip families. Since the clock nodes are
subnodes to Altera SOCFPGA Clock Manager, the yaml was added to
socfpga-clk-manager.yaml.

Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-05-21 18:49:56 +02:00
Thuan Nguyen
652eea251d arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups
White Hawk ARD audio uses a clock generated by the TPU, but commit
3d144ef10a ("pinctrl: renesas: r8a779g0: Fix TPU suffixes") renamed
pin group "tpu_to0_a" to "tpu_to0_b".  Update DTS accordingly otherwise
the sound driver does not receive a clock signal.

Fixes: 3d144ef10a ("pinctrl: renesas: r8a779g0: Fix TPU suffixes")
Signed-off-by: Thuan Nguyen <thuan.nguyen-hong@banvien.com.vn>
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/TYCPR01MB8740608B675365215ADB0374B49CA@TYCPR01MB8740.jpnprd01.prod.outlook.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-20 09:31:11 +02:00
Mihai Sain
36e9e1ab59 ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
Add fixed-partitions for spi-nor flash to match the at91 boot flow
and layout of the nand flash.
Partitions can be listed from /proc/mtd:

[root@sama7g54 ~]$ cat /proc/mtd | grep qspi
mtd6: 00040000 00001000 "qspi1: at91bootstrap"
mtd7: 00100000 00001000 "qspi1: u-boot"
mtd8: 00040000 00001000 "qspi1: u-boot env"
mtd9: 00080000 00001000 "qspi1: device tree"
mtd10: 00600000 00001000 "qspi1: kernel"

[root@sama7g54 ~]$ mtdinfo /dev/mtd10
mtd10
Name:                           qspi1: kernel
Type:                           nor
Eraseblock size:                4096 bytes, 4.0 KiB
Amount of eraseblocks:          1536 (6291456 bytes, 6.0 MiB)
Minimum input/output unit size: 1 byte
Sub-page size:                  1 byte
Character device major/minor:   90:20
Bad blocks are allowed:         false
Device is writable:             true

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250429064547.5807-1-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:29 +03:00
Ryan Wanner
e634fd7166 ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
Add RTT timer with backup register for SAMA7D65_Curiosity board.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/463581224a07bf122c6907d34a0c5c71b1cc73e1.1744666011.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:29 +03:00
Ryan Wanner
4b3d951f28 ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
Add RTT support for SAMA7D65 SoC. The GPBR is added so the SoC is able
to store the RTT time data.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/e8868ef06102241b47883ba10edaed751831be6d.1744666011.git.Ryan.Wanner@microchip.com
[claudiu.beznea: keep nodes sorted by their address]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:29 +03:00
Ryan Wanner
f5b56abe58 ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com
[claudiu.beznea: keep nodes sorted by their address]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:28 +03:00
Ryan Wanner
0bbc54da32 ARM: dts: microchip: sama7d65_curiosity: add EEPROM
If the MAC address is not fetched and loaded by U-boot then Linux will
have to load the address. The EEPROM and nvmem-layout to describe
EUI48 MAC address regions.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/96ee6832d9b55acfae8d3560f625798025dfd89c.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: added nvmem properties in gmac0 node before the status
 one]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:28 +03:00
Ryan Wanner
e65a13a290 ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
Add MCP16502 to the sama7d65_curiosity board to control voltages in the
MPU. The device is connected to twi 10 interface

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/60f6b7764227bb42c74404e8ca1388477183b7b5.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: drop regulator-suspend-voltage for ldo2 as it is not
 needed]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:28 +03:00
Ryan Wanner
7116fb2f15 ARM: dts: microchip: sama7d65: Enable GMAC interface
Enable GMAC0 interface for sama7d65_curiosity board.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/fca0c1deb74006cdedbdd71061dec9dabf1e9b9a.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: move gmac0 node to keep the nodes alphanumerically
 sorted, dropped status property on the PHY node, added missing blank
 line]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:28 +03:00
Ryan Wanner
b51e4aea3e ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
Add FLEXCOMs to the SAMA7D65 SoC device tree.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: use vendor specific properties at the end of the node,
 align DMA entries, add missing spaces]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:27 +03:00
Ryan Wanner
37aa981a33 ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
Add support for GMAC interfaces on SAMA7D65 SoC.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/05b107796b6f3a173d0dd0a5b2107b675cfd994e.1743523114.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-05-16 08:31:26 +03:00
E Shattow
d50108706a riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
Add bootph-pre-ram hinting to jh7110-common.dtsi:
  - i2c5_pins and i2c-pins subnode for connection to eeprom
  - eeprom node
  - qspi flash configuration subnode
  - memory node
  - mmc0 for eMMC
  - mmc1 for SD Card
  - uart0 for serial console

  With this the U-Boot SPL secondary program loader may drop such overrides.

Signed-off-by: E Shattow <e@freeshell.de>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-15 21:08:27 +01:00
E Shattow
6359181114 riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
StarFive VisionFive2 and similar JH7110 boards have an eeprom compatible
with Atmel 24c04. Add the node so this may be used with the at24 driver.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-15 21:08:27 +01:00
E Shattow
59404dceb3 riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
Use qspi flash read-delay and spi-max-frequency settings compatible with
U-Boot bootloader.

Observations from testing on Pine64 Star64 hardware within U-Boot bootloader
and read-delay=2 are spi-max-frequency less than 49.8MHz fails to write,
corrupt data writes at 25MHz to 49.799999MHz, and valid data writes at
49.8MHz to 100MHz (not tested above 100MHz). No valid spi-max-frequency
was found for 1<read-delay<=3 and corrupt data with read-delay=3.

Looking around the Linux codebase it is common to see read-delay 2 cycles
with spi-max-frequency 100MHz and testing confirms this to work in both
U-Boot and Linux.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-15 21:08:27 +01:00
E Shattow
724a6718ce riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
Add syscrg clock assignments for CPU, BUS, PERH, and QSPI as required by
boot loader before kernel.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-15 21:08:27 +01:00
Icenowy Zheng
71385a893c riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
The pin names of MMC0 pinmux is defined in the pinctrl dt binding header
associated with starfive,jh7110-pinctrl .

Include the header file and use these names instead of raw numbers for
defining MMC0 pinmux.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-15 21:06:04 +01:00
Sandie Cao
a2e7f6c487 riscv: dts: starfive: fml13v01: enable USB 3.0 port
Add usb_cdns3 and usb0_pins configuration to support super speed USB
device on the FML13V01 board.

Signed-off-by: Sandie Cao <sandie.cao@deepcomputing.io>
Tested-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-15 21:05:45 +01:00
Andre Przywara
a3cd12acb7 arm64: dts: allwinner: a100: add Liontron H-A133L board support
The H-A133L board is an industrial development board made by Liontron.
It contains a number of dedicated JST connectors, to connect external
peripherals. It features:

- Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz)
- 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM
- between 16 and 128 GiB eMMC flash
- AXP707 PMIC (compatible to AXP803)
- 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY
- XR829 WIFI+Bluetooth chip
- 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors
  (connected via a USB hub connected to USB1 on the SoC)
- microSD card slot
- 3.5mm A/V port
- 12V power supply
- connectors for an LVDS or MIPI-DSI panel

Add the devicetree describing the board's peripherals and their
connections.

Despite being a devboard, the manufacturer does not publish a schematic
(I asked), so the PMIC rail assignments were bases on BSP dumps,
educated guesses and some experimentation. Dropping the always-on
property from any of the rails carrying it will make the board hang as
soon as the kernel turns off unused regulators.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com
[wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-14 22:14:07 +08:00
Conor Dooley
1064013303 riscv: dts: renesas: Add specific RZ/Five cache compatible
When the binding was originally written, it was assumed that all
ax45mp-caches had the same properties etc. This has turned out to be
incorrect, as the QiLai SoC has a different number of cache-sets.

Add a specific compatible for the RZ/Five for property enforcement and
in case there turns out to be additional differences between these
implementations of the cache controller.

Acked-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20250512-sphere-plenty-8ce4cd772745@spud
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-14 13:30:06 +02:00
Geert Uytterhoeven
fb30a7c596 arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check
make dtbs:

    arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@e6ea0000: incorrect #address-cells for SPI bus
      also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
    arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@e6ea0000: incorrect #size-cells for SPI bus
      also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
    arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'

The Sparrow Hawk uses the MSIOF module in I2S mode instead of SPI mode,
triggering a conflict between the SPI bus bindings and dtc:
  - Serial engines that can be SPI controllers must use "spi" as their
    node names,
  - Dtc assumes nodes named "spi" are always SPI controllers.

Fix this by disabling this specific warning for this board.

Fixes: ca764d5321 ("arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/20250506192033.77338015@canb.auug.org.au
Suggested-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/fbad3581f297d5b95a3b2813bbae7dba25a523fd.1747039399.git.geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-14 13:29:50 +02:00
Goran Rađenović
518e8ffa00 ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
Add support for Ultratronik's stm32mp157c fly board. This board embeds
a STM32MP157c SOC and 1GB of DDR3. Several connections are available on
this boards: 2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...

This patch enables basic support for a kernel boot - SD-card or eMMC.

Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Link: https://lore.kernel.org/r/20250508143818.2574558-5-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:16 +02:00
Goran Rađenović
6c9bb5f361 MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
Add a new MAINTAINERS section for the ULTRATRONIK BOARD SUPPORT, covering
the stm32mp157c-ultra-fly-sbc.dts board support file.

This ensures that maintainers of this board are properly listed and can be
notified for any relevant changes.

Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Signed-off-by: Börge Strümpfel <boerge.struempfel@gmail.com>
Link: https://lore.kernel.org/r/20250508143818.2574558-4-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:16 +02:00
Goran Rađenović
21dc0aa4e7 dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
This commit documents ultra-fly-sbc devicetree binding based on
STM32MP157 SoC.

Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250508143818.2574558-3-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:16 +02:00
Goran Rađenović
8605b4d36f dt-bindings: vendor-prefixes: Add Ultratronik
Ultratronik GmbH is a German electronics company:
https://www.ultratronik-ems.de/

Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250508143818.2574558-2-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:16 +02:00
Fabrice Gasnier
5e281c436e arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
During the low power modes the generic ARM timer is deactivated, so the
the tick broadcast is used, based on LPTIMER3 which is clocked by LSE on
STMicroelectronics boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:16 +02:00
Fabrice Gasnier
e0919bca1a arm64: dts: st: add low-power timer nodes on stm32mp251
Add low-power timer (LPTimer) support on STM32MP25 SoC.
The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 supports a
smaller set of features (no capture/compare) channel. Still, LPTIM5 can
be used as single PWM, counter, trigger or timer.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250429125133.1574167-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:15 +02:00
Fabrice Gasnier
3cd55c7295 arm64: defconfig: enable STM32 LP timer clockevent driver
Enable the STM32 LP timer MFD core and clockevent drivers used on
STM32MP257F-EV1 board, for PSCI OSI.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250429125133.1574167-6-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:15 +02:00
Patrice Chotard
cad2492de9 arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
Add SPI NOR flash nor support on stm32mp257f-ev1 board.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-3-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-05-14 10:36:15 +02:00