Duplicated and rename mes ip version name to v12_1_0.
Fix to access correct ring pipe by xcc_id.
Fix to access correct instance registers by xcc_id.
Fix to access correct index registers by grbm/xcc_id.
v2: rebase (Alex)
v3: fix sw_fini (Alex)
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit enlarges the hashtable size of
kfd_process to 256, because of the multiple
contexts feature allowing each application
create multiple kfd_processes
Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add SDMA ip block for SDMA v7_1_0.
v2: squash in queue reset changes (Alex)
v3: squash in version fix (Hawking)
v4: squash in various fixes
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Acked-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
v1_0 is a new generation ip block
v2: squash in doorbell changes (Alex)
v3: squash in xclk, reset placeholders, pcie r|wreg ext callbacks
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
function "devm_memremap_pages" in function "kgd2kfd_init_zone_device",
sometimes cost too much time.
[How]
move the function "kgd2kfd_init_zone_device"
after release full gpu access(amdgpu_virt_release_full_gpu).
v2:
improve the coding style.
Signed-off-by: chong li <chongli2@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This version brings along the following updates:
- Add additional checks for PSP footer size
- Correct DSC padding accounting
- Check ATOM_DEVICE_CRT2_SUPPORT in dc_load_detection
- Drop FPU flags from dml21_wrapper.c
- Permit DC_FP_START/END only in non-FP compilation units
- Add cursor offload abort to the new HWSS path
- Move dml2_create and init to the non-FPU dml2_wrapper
- Move dml2_validate to the non-FPU dml2_wrapper
- Rename dml2_wrapper.c to dml2_wrapper_fpu.c
- Increase EDID read retries
- Correct comment style
- Move CONNECTOR_ID_PCIE into switch/case
- Drop needless check for link->link_id.id
- Improve readability of link_detect_sink_signal_type
- Don't change brightness for disabled connectors
- Write default Vesa Aux backlight control in dmub
- Refactor panel replay dc libs
- Revise VSC SDP header for Panel Replay
- Fix sending redundant enable command to dmub
- Parse debug flag to PR FW
- Add AS-SDP v2 support for eDP feature
- Refactor panel replay set dmub cmd flow
- Improve HDMI info retrieval
- Check NULL before accessing
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY & HOW]
Newer ASICs have different PSP footer sizes which lead to driver
failing to locate the DMCUB FW meta info, which in turn causes
improper DMCUB FW loading and causes DMCUB to crash.
Add support for custom PSP footer sizes and check 512B by default
as well.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
- After the addition of all OVT patches, DSC padding was being accounted
for multiple times, effectively doubling the padding
- This caused compliance failures or corruption
[HOW]
- Add padding to DSC pic width when required by HW, and do not re-add
when calculating reg values
- Do not add padding when computing PPS values, and instead track padding
separately to add when calculating slice width values
Reviewed-by: Chris Park <chris.park@amd.com>
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Relja Vojvodic <rvojvodi@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
The existing CFLAGS_ lines were pointing to a wrong location
for dml21_wrapper.c and were thereby ineffective. This means
dml21_wrapper.c is not an FPU compilation unit. Remove the
(erroneous) CFLAGS_ entries.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
This function is an FPU compilation unit. Therefore it's not
allowed to call DC_FP_START/END functions. It currently does
so and we'll need to move those functions out. Therefore
rename the existing compilation unit so we can introduce a
non-FPU dml2_wrapper.c.
Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
There is already a switch/case looking at link->link_id.id.
[How]
Move the case of `CONNECTOR_ID_PCIE` into switch case.
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Some OLED panels require driver to write Aux BL before link training or
turning on backlight; otherwise monitor brightness will change.
[HOW]
Write the default Vesa Aux backlight control in dmub.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Derek Lai <Derek.Lai@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This error message was emitted without a newline during bring-up on
FreeBSD. Presumably the error doesn't occur on Linux so was not noticed
before.
Signed-off-by: Ed Maste <emaste@FreeBSD.org>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
During migration from VRAM to RAM, when PTE is cleared, reset
the PTE to always ensure that PTE.P=1 is set on GFX 12.1. If
PTE.P is not set, it can lead to TF faults.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
On GFX 12.1, PDE.C is ignored if (PDE|PTE)_REQUEST_PHYSICAL
is not setup in the GCVM control register. Always set this
field to enable PDE.C usage.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
On GFX12.1, default PTE setup needs an additional bit to be
set. Add PTE initialization flags to handle setup default PTE
on a per-ASIC basis.
While at it, fixup the coding style too.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add header files for osssys v7_1_0 register offsets
and shift masks
v2: Update osssys v7_1_0 ip headers to the latest version
v3: Clean up registers (Alex)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
