mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-01 07:14:19 -04:00
Code Issues Packages Projects Releases Wiki Activity
1,136,021 Commits 1 Branch 928 Tags
e04f0761325a1d9abbf5b91ae7fd5decac489d5f
Commit Graph

1136021 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Krzysztof Kozlowski
e04f076132 dt-bindings: pinctrl: qcom,mdm9607: drop ref to pinctrl.yaml 
The binding references common Qualcomm TLMM pin controller schema, which
references pinctrl.yaml.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221017230012.47878-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 12:17:16 -04:00
Krzysztof Kozlowski
6ec9217347 dt-bindings: pinctrl: qcom,ipq6018: replace maintainer 
Emails to codeaurora.org bounce ("Recipient address rejected:
undeliverable address: No such user here.").

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220924081312.15068-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 12:05:33 -04:00
Krzysztof Kozlowski
b4997c1cb7 dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema 
The common Qualcomm TLMM pin controller schema for pin mux and config
already brings requirement of function for gpio pins and the definition
of drive-strength.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-18-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:47:40 -04:00
Krzysztof Kozlowski
a92ffc9073 dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable 
The SC7280 pinctrl driver supports bias-bus-hold and input-enable, and
DTS already use it (sc7280-idp).

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-17-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:47:36 -04:00
Krzysztof Kozlowski
06311aa3ad dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs 
SC7280 has 175 GPIOs (gpio0-174), so correct size of gpio-line-names and
narrow the pattern for matching pin names.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-16-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:47:35 -04:00
Krzysztof Kozlowski
23e14d2624 dt-bindings: pinctrl: qcom,sm8250: add input-enable 
The SM8250 pinctrl driver supports input-enable and DTS already use it
(sm8250-sony-xperia-edo-pdx203).

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-15-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:47:23 -04:00
Krzysztof Kozlowski
a327e870af dt-bindings: pinctrl: qcom,sm8250: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

The change causes indentation decrement, so the diff-hunk looks big, but
there are no functional changes in the subnode "properties" section.
The only difference there is removal of blank lines between common GPIO
pinconf properties.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-14-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:47:16 -04:00
Krzysztof Kozlowski
fd69e8befa dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema 
The common Qualcomm TLMM pin controller schema for pin mux and config
already brings requirement of function for gpio pins and the definition
of drive-strength.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-13-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:47:10 -04:00
Krzysztof Kozlowski
a094b8d879 dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names 
Document common GPIO properties (gpio-reserved-ranges and
gpio-line-names), already used on qrb5165-rb5 board.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172212.49105-12-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-18 11:46:50 -04:00
Krzysztof Kozlowski
5c97a94cc3 dt-bindings: pinctrl: qcom,sdm630: convert to dtschema 
Convert Qualcomm SDM630 and SDM660 pin controller bindings to DT schema.
Keep the parsing of pin configuration subnodes consistent with other
Qualcomm schemas (children named with '-state' suffix, their children
with '-pins').

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221011190231.76784-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 18:57:22 -04:00
Krzysztof Kozlowski
dba79c3460 dt-bindings: pinctrl: qcom,sdm845: convert to dtschema 
Convert Qualcomm SDM845 pin controller bindings to DT schema.  Keep
the parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220930200529.331223-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 18:40:57 -04:00
Neil Armstrong
19f7ad36ab dt-bindings: pinctrl: convert qcom,mdm9615-pinctrl.txt to dt-schema 
Convert the MDM9515 pinctrl bindings to dt-schema.
Keep the parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, optional children with '-pins').

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org
[krzk: drop function from required]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 17:40:09 -04:00
Krzysztof Kozlowski
0eaaf138ff dt-bindings: pinctrl: qcom,sc8280xp: fix indentation in example (remaining piece) 
Bindings example should be indented with 4-spaces.  Previous adjustment
missefd one spot.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-35-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:08:04 -04:00
Krzysztof Kozlowski
bb65ee4a3c dt-bindings: pinctrl: qcom,sc7280: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-34-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:08:03 -04:00
Krzysztof Kozlowski
7947f01598 dt-bindings: pinctrl: qcom,sdx65: use common TLMM schema 
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-33-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:59 -04:00
Krzysztof Kozlowski
c535fe66f4 dt-bindings: pinctrl: qcom,sdx65: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-32-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:58 -04:00
Krzysztof Kozlowski
4e0434d478 dt-bindings: pinctrl: qcom,sdx55: fix indentation in example 
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-31-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:56 -04:00
Krzysztof Kozlowski
fd583a4f6d dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema 
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-30-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:55 -04:00
Krzysztof Kozlowski
8cd7d9e14f dt-bindings: pinctrl: qcom,sdx55: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.

  qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'

This method also unifies the bindings with other Qualcomm TLMM and LPASS
pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-29-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:54 -04:00
Krzysztof Kozlowski
7e300b5a1f dt-bindings: pinctrl: qcom,qcm2290: use common TLMM schema 
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-28-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:47 -04:00
Krzysztof Kozlowski
7d3da666f2 dt-bindings: pinctrl: qcom,qcm2290: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-27-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:46 -04:00
Krzysztof Kozlowski
9fb8c097b9 dt-bindings: pinctrl: qcom,mdm9607: fix indentation in example 
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-26-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:45 -04:00
Krzysztof Kozlowski
590d1b93bf dt-bindings: pinctrl: qcom,mdm9607: do not require function on non-GPIOs 
Certain pins, like SDcard related, do not have functions and such should
not be required.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-25-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:42 -04:00
Krzysztof Kozlowski
479cc0adcd dt-bindings: pinctrl: qcom,msm8953: fix indentation in example 
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-24-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:39 -04:00
Krzysztof Kozlowski
f695e8d8c8 dt-bindings: pinctrl: qcom,msm8953: use common TLMM schema 
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-23-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:37 -04:00
Krzysztof Kozlowski
ce4762ae02 dt-bindings: pinctrl: qcom,msm8953: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-22-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:36 -04:00
Krzysztof Kozlowski
6471d94807 dt-bindings: pinctrl: qcom,msm8909-tlmm: fix indentation in example 
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-21-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:35 -04:00
Krzysztof Kozlowski
0ec9c96fda dt-bindings: pinctrl: qcom,msm8909-tlmm: do not require function on non-GPIOs 
Certain pins, like SDcard related, do not have functions and such should
not be required.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-20-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:30 -04:00
Krzysztof Kozlowski
07741416a0 dt-bindings: pinctrl: qcom,msm8909-tlmm: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-19-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:29 -04:00
Krzysztof Kozlowski
1780bac7c1 dt-bindings: pinctrl: qcom,msm8226: fix indentation in example 
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-18-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:26 -04:00
Krzysztof Kozlowski
ca3a311c3a dt-bindings: pinctrl: qcom,msm8226: add functions and input-enable 
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4
and sdc3 functions and DTS already uses it:

  qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ...
  qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed:
    'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+'

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-17-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:25 -04:00
Krzysztof Kozlowski
4799452e18 dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema 
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-16-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:23 -04:00
Krzysztof Kozlowski
43dc3f2bc1 dt-bindings: pinctrl: qcom,msm8226: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-15-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:21 -04:00
Krzysztof Kozlowski
4c05adcaa6 dt-bindings: pinctrl: qcom,ipq6018: fix indentation in example 
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-14-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:18 -04:00
Krzysztof Kozlowski
0a1879f298 dt-bindings: pinctrl: qcom,ipq6018: use common TLMM schema 
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-13-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:16 -04:00
Krzysztof Kozlowski
1379f6750e dt-bindings: pinctrl: qcom,ipq6018: fix matching pin config 
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-12-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:14 -04:00
Krzysztof Kozlowski
5cf95fcd6d dt-bindings: pinctrl: qcom,ipq6018: increase number of pins in pinmux 
One pinxmux node can have more than 4 pins to configure:

  ['gpio1', 'gpio3', 'gpio4', 'gpio5', 'gpio6', 'gpio7', 'gpio8', 'gpio10', 'gpio11', 'gpio12', 'gpio13', 'gpio14', 'gpio15', 'gpio17'] is too long

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-11-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:10 -04:00
Krzysztof Kozlowski
5d6f7ee5f7 dt-bindings: pinctrl: qcom,ipq6018: correct BLSP6->BLSP0 functions 
The pin controller driver has BLSP functions from 0 to 5, not 1 to 6.
Add missing blsp0_i2c, blsp0_spi (already used in ipq6018-cp01-c1) and
blsp0_uart.  Drop blsp6_i2c and blsp6_spi.

This fixes dtbs_check warning:

  ipq6018-cp01-c1.dtb: pinctrl@1000000: spi-0-state: 'oneOf' conditional failed, one must be fixed:
    'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
    'blsp0_spi' is not one of ['adsp_ext', 'alsp_int', .....

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-10-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:07:05 -04:00
Krzysztof Kozlowski
6664924176 dt-bindings: pinctrl: qcom,ipq6018: add qpic_pad function 
The IPQ6018 pinctrl driver supports qpic_pad and DTS already uses it:

  'qpic_pad' is not one of ['adsp_ext', 'alsp_int', 'atest_bbrx0', ...

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-9-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:06:19 -04:00
Krzysztof Kozlowski
1b88672e7f dt-bindings: pinctrl: qcom,tlmm-common: add common check for function 
Certain pins, like SDcard related, do not have functions and such should
not be required.  Add a check for this in common Qualcomm TLMM pin
controller schema.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-8-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 13:06:05 -04:00
Krzysztof Kozlowski
a76a13c89a dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable 
The existing SC7280 LPASS pin controller nodes use bias-bus-hold and
input-enable, so allow them.  Squash also blank lines for readability.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-13-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:48:25 -04:00
Krzysztof Kozlowski
13e4319b57 dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold 
The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so
allow it.  Squash also blank lines for readability.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-12-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:47:51 -04:00
Krzysztof Kozlowski
a849cbd18a dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix matching pin config 
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-11-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:47:39 -04:00
Krzysztof Kozlowski
351123e62b dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: fix matching pin config 
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.

  qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a required property

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-10-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:47:16 -04:00
Krzysztof Kozlowski
b47a6c8b77 dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix matching pin config 
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-9-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:47:11 -04:00
Krzysztof Kozlowski
cb70c0d8b5 dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config 
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-8-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:47:09 -04:00
Krzysztof Kozlowski
2f1aad93a1 dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix gpio pattern 
Fix double ']' in GPIO pattern to properly match "pins" property.
Otherwise schema for pins state fails.

Fixes: 4faa4e7301 ("dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings")
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:46:50 -04:00
Krzysztof Kozlowski
793b96bf48 dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern 
Fix double ']' in GPIO pattern to properly match "pins" property.
Otherwise schema for pins state fails.

Fixes: 958bb025f5 ("dt-bindings: pinctrl: qcom: Add sc8280xp lpass lpi pinctrl bindings")
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-10-17 12:46:34 -04:00
Linus Torvalds
9abf2313ad Linux 6.1-rc1 v6.1-rc1 2022-10-16 15:36:24 -07:00
Linus Torvalds
f1947d7c8a Merge tag 'random-6.1-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random 
Pull more random number generator updates from Jason Donenfeld:
 "This time with some large scale treewide cleanups.

  The intent of this pull is to clean up the way callers fetch random
  integers. The current rules for doing this right are:

   - If you want a secure or an insecure random u64, use get_random_u64()

   - If you want a secure or an insecure random u32, use get_random_u32()

     The old function prandom_u32() has been deprecated for a while
     now and is just a wrapper around get_random_u32(). Same for
     get_random_int().

   - If you want a secure or an insecure random u16, use get_random_u16()

   - If you want a secure or an insecure random u8, use get_random_u8()

   - If you want secure or insecure random bytes, use get_random_bytes().

     The old function prandom_bytes() has been deprecated for a while
     now and has long been a wrapper around get_random_bytes()

   - If you want a non-uniform random u32, u16, or u8 bounded by a
     certain open interval maximum, use prandom_u32_max()

     I say "non-uniform", because it doesn't do any rejection sampling
     or divisions. Hence, it stays within the prandom_*() namespace, not
     the get_random_*() namespace.

     I'm currently investigating a "uniform" function for 6.2. We'll see
     what comes of that.

  By applying these rules uniformly, we get several benefits:

   - By using prandom_u32_max() with an upper-bound that the compiler
     can prove at compile-time is ≤65536 or ≤256, internally
     get_random_u16() or get_random_u8() is used, which wastes fewer
     batched random bytes, and hence has higher throughput.

   - By using prandom_u32_max() instead of %, when the upper-bound is
     not a constant, division is still avoided, because
     prandom_u32_max() uses a faster multiplication-based trick instead.

   - By using get_random_u16() or get_random_u8() in cases where the
     return value is intended to indeed be a u16 or a u8, we waste fewer
     batched random bytes, and hence have higher throughput.

  This series was originally done by hand while I was on an airplane
  without Internet. Later, Kees and I worked on retroactively figuring
  out what could be done with Coccinelle and what had to be done
  manually, and then we split things up based on that.

  So while this touches a lot of files, the actual amount of code that's
  hand fiddled is comfortably small"

* tag 'random-6.1-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random:
  prandom: remove unused functions
  treewide: use get_random_bytes() when possible
  treewide: use get_random_u32() when possible
  treewide: use get_random_{u8,u16}() when possible, part 2
  treewide: use get_random_{u8,u16}() when possible, part 1
  treewide: use prandom_u32_max() when possible, part 2
  treewide: use prandom_u32_max() when possible, part 1
 2022-10-16 15:27:07 -07:00