Tengfei Fan
df54dcb34f
arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodes
...
Add nodes for remoteprocs: ADSP, CDSP0, CDSP1, GPDSP0 and GPDSP1 for
SA8775p SoCs.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com >
[Ling: added the fastrcp nodes]
Co-developed-by: Ling Xu <quic_lxu5@quicinc.com >
Signed-off-by: Ling Xu <quic_lxu5@quicinc.com >
[Bartosz: ported to mainline]
Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org >
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org >
Link: https://lore.kernel.org/r/20240805-topic-sa8775p-iot-remoteproc-v4-5-86affdc72c04@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:55:24 -05:00
Tengfei Fan
89817522b1
dt-bindings: mailbox: qcom-ipcc: Add GPDSP0 and GPDSP1 clients
...
Add GPDSP0 and GPDSP1 clients for SA8775p platform.
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org >
Link: https://lore.kernel.org/r/20240805-topic-sa8775p-iot-remoteproc-v4-2-86affdc72c04@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:55:24 -05:00
Lin, Meng-Bo
469fc2e7a9
arm64: dts: qcom: msm8916-samsung-j3ltetw: Add initial device tree
...
The dts and dtsi add support for msm8916 variant of Samsung Galaxy J3
SM-J320YZ smartphone released in 2016.
Add a device tree for SM-J320YZ with initial support for:
- GPIO keys
- SDHCI (internal and external storage)
- USB Device Mode
- UART (on USB connector via the SM5703 MUIC)
- WCNSS (WiFi/BT)
- Regulators
- QDSP6 audio
- Speaker/earpiece/headphones/microphones via digital/analog codec in
MSM8916/PM8916
- WWAN Internet via BAM-DMUX
- Touchscreen
- Accelerometer
There are different variants of J3, with some differences in MUIC, sensor,
NFC and touch key I2C buses.
The common parts are shared in msm8916-samsung-j3-common.dtsi to reduce
duplication.
Signed-off-by: Lin, Meng-Bo <linmengbo06890@proton.me >
Link: https://lore.kernel.org/r/20240804065854.42437-3-linmengbo06890@proton.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:51:50 -05:00
Lin, Meng-Bo
c17427c6ca
dt-bindings: qcom: Document samsung,j3ltetw
...
Document samsung,j3ltetw bindings used in its device tree.
Signed-off-by: Lin, Meng-Bo <linmengbo06890@proton.me >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20240804065854.42437-2-linmengbo06890@proton.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:51:50 -05:00
Dmitry Baryshkov
08822cf3de
arm64: dts: qcom: sm8350: add refgen regulator
...
On SM8350 platform the DSI internally is using the refgen regulator. Add
corresponding device node and link it as a supply to the DSI node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240804-sm8350-fixes-v1-10-1149dd8399fe@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:50:48 -05:00
Dmitry Baryshkov
5e1cf9f1f3
arm64: dts: qcom: sm8350: add MDSS registers interconnect
...
Aside from the MDSS<->MEM interconnect, display devices have separate
interconnect for register access. Add this interconnect to the display
node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240804-sm8350-fixes-v1-9-1149dd8399fe@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:50:48 -05:00
Danila Tikhonov
0bdadbf5c6
arm64: dts: qcom: sm7125-xiaomi-common: Add reset-gpios for ufs_mem_hc
...
The SC7180/SM7125 SoCs have a special pin for UFS reset. Generally, this
pin is the same for all devices on the same SoC because it is hardcoded
in the pinctrl driver. Therefore, it might seem appropriate to add this
pin configuration in sc7180.dtsi. However, this pin is defined in the
device-specific DTS files instead of the SoC-level DTS files in all
Qualcomm DTS. To maintain consistency with this approach, we will follow
the same style.
Add reset-gpios to ufs_mem_hc.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com >
Link: https://lore.kernel.org/r/20240731182412.27966-1-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:48:17 -05:00
Tengfei Fan
1dd1a6d2b1
arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMON
...
Add CPU and LLCC BWMON nodes and their corresponding opp tables for
SA8775p SoC.
SA8775p has two cpu clusters, with each cluster having a set of
CPU-to-LLCC BWMON registers. Consequently, there are two sets of
CPU-to-LLCC registers.
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com >
Link: https://lore.kernel.org/r/20240730-add_sa8775p_bwmon-v1-2-f4f878da29ae@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:44:52 -05:00
André Apitzsch
04b2f8d5ae
arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash
...
The phone has a Silergy SY7802 flash LED controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: André Apitzsch <git@apitzsch.eu >
Link: https://lore.kernel.org/r/20240729-sy7802-v6-1-86bb9083e40b@apitzsch.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:43:11 -05:00
Dmitry Baryshkov
0b7d94e9d1
arm64: dts: qcom: add generic compat string to RPM glink channels
...
Add the generic qcom,smd-rpm / qcom,glink-smd-rpm compatible to RPM
nodes to follow the schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org >
Link: https://lore.kernel.org/r/20240729-fix-smd-rpm-v2-5-0776408a94c5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:41:50 -05:00
Naina Mehta
42a7b7ca4d
arm64: dts: qcom: sdx75-idp: enable MPSS remoteproc node
...
Enable MPSS remoteproc node on sdx75-idp platform.
Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240709064924.325478-6-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:30:08 -05:00
Naina Mehta
41c72f36b2
arm64: dts: qcom: sdx75: Add remoteproc node
...
Add MPSS remoteproc node for SDX75 SoC.
Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240709064924.325478-5-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:30:08 -05:00
Naina Mehta
7a7d98fca6
arm64: dts: qcom: sdx75: update reserved memory regions for mpss
...
Rename qdss@88800000 memory region as qlink_logging memory region
and add qdss_mem memory region at address of 0x88500000,
qlink_logging is being added at the memory region at the address
of 0x88800000 as the region is being used by modem firmware.
Since different DSM region size is required for different modem
firmware, split mpss_dsmharq_mem region into 2 separate regions.
This would provide the flexibility to remove the region which is
not required for a particular platform. Based on the modem firmware
either both the regions have to be used or only mpss_dsm_mem has
to be used. Also, reduce the size of mpssadsp_mem region.
Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240709064924.325478-4-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:30:08 -05:00
Krishna Kurapati
b5cbd179f4
arm64: dts: qcom: sa8295p-adp: Enable the four USB Type-A ports
...
The multiport USB controller in the SA8295P ADP is connected to four USB
Type-A ports. VBUS for each of these ports are provided by a
TPS2559QWDRCTQ1 regulator, controlled from PMIC GPIOs.
Add the necessary regulators and GPIO configuration to power these.
It seems reasonable that these regulators should be referenced as vbus
supply of usb-a-connector nodes and controlled by e.g. dwc3, but as this
is not supported in Linux today the regulators are left always-on for
now.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240707085624.3411961-1-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:22:14 -05:00
Srinivas Kandagatla
6e229f9118
arm64: dts: x1e80100-qcp: fix wsa soundwire port mapping
...
Existing way of allocating ports dynamically is linear starting from 1 to
MAX_PORTS. This will not work for x1e80100 as the master ports are
are not mapped in the same order.
Without this fix only one speaker in a pair of speakers will function.
After this fix along with WSA codec changes both the speakers starts
working.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Tested-by: Neil Armstrong <neil.armstrong@linaro.org > # on SM8650-HDK
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Link: https://lore.kernel.org/r/20240626-port-map-v2-6-6cc1c5608cdd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:19:25 -05:00
Srinivas Kandagatla
d374fafd89
arm64: dts: x1e80100-crd: fix wsa soundwire port mapping
...
Existing way of allocating ports dynamically is linear starting from 1 to
MAX_PORTS. This will not work for x1e80100 as the master ports are
are not mapped in the same order.
Without this fix only one speaker in a pair of speakers will function.
After this fix along with WSA codec changes both the speakers starts
working.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Tested-by: Neil Armstrong <neil.armstrong@linaro.org > # on SM8650-HDK
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Link: https://lore.kernel.org/r/20240626-port-map-v2-5-6cc1c5608cdd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:19:25 -05:00
Srinivas Kandagatla
8c7dbbed27
arm64: dts: qcom: x1e80100: add soundwire controller resets
...
Soundwire controllers (WSA, WSA2, RX, TX) require reset lines to enable
switching clock control from hardware to software.
Add them along with the reset control providers.
Without this reset we might hit fifo under/over run when we try to write to
soundwire device registers.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240624-x1e-swr-reset-v2-3-8bc677fcfa64@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:17:55 -05:00
Vladimir Zapolskiy
9e2ebc5817
arm64: dts: qcom: sm8650: add description of CCI controllers
...
Qualcomm SM8650 SoC has three CCI controllers with two I2C busses
connected to each of them.
The CCI controllers on SM8650 are compatible with the ones found on
many other older generations of Qualcomm SoCs.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org >
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org >
Link: https://lore.kernel.org/r/20240612215835.1149199-5-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:10:14 -05:00
Vladimir Zapolskiy
4f33e6432f
arm64: dts: qcom: sm8550: add description of CCI controllers
...
Qualcomm SM8550 SoC contains 3 Camera Control Interface controllers
very similar to the ones found on other Qualcomm SoCs.
One noticeable difference is that cci@ac16000 controller provides only
one I2C bus and has an additional control over AON CCI pins gpio208
and gpio209, but this feature is not yet supported in the CCI driver.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org >
Link: https://lore.kernel.org/r/20240612215835.1149199-4-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:10:14 -05:00
Ajit Pandey
b87b8df9c0
arm64: dts: qcom: sm4450: add camera, display and gpu clock controller
...
Add device node for camera, display and graphics clock controller on
Qualcomm SM4450 platform.
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240611133752.2192401-9-quic_ajipan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:07:04 -05:00
Bjorn Andersson
b40c6fe821
Merge branch '20240611133752.2192401-1-quic_ajipan@quicinc.com' into arm64-for-6.12
...
Merge the SM4450 display, camera and GPU bindings from a topic branch,
to gain access to the clock defines.
2024-08-14 21:06:25 -05:00
Ajit Pandey
47bad234ee
dt-bindings: clock: qcom: add GPUCC clocks on SM4450
...
Add device tree bindings for the graphics clock controller on
Qualcomm SM4450 platform.
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org >
Link: https://lore.kernel.org/r/20240611133752.2192401-7-quic_ajipan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:05:15 -05:00
Ajit Pandey
9bf45e4f31
dt-bindings: clock: qcom: add CAMCC clocks on SM4450
...
Add device tree bindings for the camera clock controller on
Qualcomm SM4450 platform.
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com >
Reviewed-by: Rob Herring (Arm) <robh@kernel.org >
Link: https://lore.kernel.org/r/20240611133752.2192401-5-quic_ajipan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:05:15 -05:00
Ajit Pandey
5115bcaf68
dt-bindings: clock: qcom: add DISPCC clocks on SM4450
...
Add device tree bindings for the display clock controller on
Qualcomm SM4450 platform.
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20240611133752.2192401-3-quic_ajipan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-14 21:05:15 -05:00
Bjorn Andersson
3706bcfbdb
arm64: dts: qcom: sc8180x: Enable the power key
...
No input events are generated from the pressing of the power key on
either Primus or Flex 5G, because the device node isn't enabled.
Give the power key node a label and enable this for the two devices.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Tested-by: Steev Klimaszewski <steev@kali.org >
Link: https://lore.kernel.org/r/20240812-sc8180x-pwrkey-enable-v1-1-2bcc22133774@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-08-13 06:12:39 -07:00
Bartosz Golaszewski
4e71c38244
arm64: dts: qcom: sm8650-qrd: use the PMU to power up bluetooth
...
Change the HW model in sm8650-qrd.dts to a one closer to reality - where
the WLAN and Bluetooth modules of the WCN7850 are powered by the PMU
inside the package.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org >
Tested-by: Neil Armstrong <neil.armstrong@linaro.org > # on SM8550-QRD
Link: https://lore.kernel.org/r/20240709-hci_qca_refactor-v3-6-5f48ca001fed@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 22:21:42 -05:00
Bjorn Andersson
bb80185cde
Merge branch '20240717-dispcc-sm8550-fixes-v2-7-5c4a3128c40b@linaro.org' into arm64-for-6.12
...
Merge the SM8550/SM8650 display clock controller binding header file
merge through a topic branch, to ensure the bindings are kept in sync
between clock and DeviceTree source branches.
2024-07-31 22:07:40 -05:00
Dmitry Baryshkov
99447ef003
dt-bindings: clock: qcom,sm8650-dispcc: replace with symlink
...
The display clock controller indices for SM8650 and SM8550 are
completely equal. Replace the header file for qcom,sm8650-dispcc with
the symlink to the qcom,sm8550-dispcc header file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20240717-dispcc-sm8550-fixes-v2-7-5c4a3128c40b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 22:05:25 -05:00
Raymond Hackley
ccf683fa0c
arm64: dts: qcom: msm8916-samsung-fortuna: Add touch keys
...
Touch keys feature on fortuna phones are provided by Zinitix touchscreen.
Add property linux,keycodes to enable touch keys.
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240724143230.3804-1-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 22:02:10 -05:00
Ankit Sharma
717ca334af
arm64: dts: qcom: sa8775p: Add capacity and DPC properties
...
The "capacity-dmips-mhz" and "dynamic-power-coefficient" are
used to build Energy Model which in turn is used by EAS to take
placement decisions.
Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com >
Link: https://lore.kernel.org/r/20240731111951.6999-1-quic_anshar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 22:01:29 -05:00
Barnabás Czémán
359c8c8491
arm64: dts: qcom: pm8950: Add resin node
...
Add pm8950 resin node as a feature of the PMIC it should be declared
in pm8950.dtsi, disabled by default. Like all other optional components
it can then by enabled and configured in the board-specific device tree
part.
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org >
Link: https://lore.kernel.org/r/20240730-pm8950_resin-v1-1-26de4d933f95@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 22:00:33 -05:00
Satya Priya Kakitapalli
f75537a42a
arm64: dts: qcom: Add camera clock controller for sm8150
...
Add device node for camera clock controller on Qualcomm
SM8150 platform.
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20240731062916.2680823-9-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:59:41 -05:00
Bjorn Andersson
0e1b56c060
Merge branch '20240731062916.2680823-7-quic_skakitap@quicinc.com' into arm64-for-6.12
...
Merge SM8150 camera clock controller binding from topic branch, to gain
access to constants introduced by this.
2024-07-31 21:57:22 -05:00
Satya Priya Kakitapalli
44933cd06e
dt-bindings: clock: qcom: Add SM8150 camera clock controller
...
Add device tree bindings for the camera clock controller on
Qualcomm SM8150 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com >
Link: https://lore.kernel.org/r/20240731062916.2680823-7-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:53:47 -05:00
Bjorn Andersson
c1ece392ed
arm64: dts: qcom: sc8180x-lenovo-flex-5g: Enable USB multiport controller
...
The Lenovo Flex 5G has a camera attached to the multiport USB
controller, enable the controller and the four phys to enable this.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-7-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:52:31 -05:00
Bjorn Andersson
e12953d3b1
arm64: dts: qcom: sc8180x-primus: Enable the two MP USB ports
...
The SC8180X Primus comes with an AUX card with two USB ports, fed by the
two multiport ports.
Enable the involved nodes and define two always-on regulators to enable
VBUS for these ports.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-6-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:52:31 -05:00
Bjorn Andersson
96aab8ff59
arm64: dts: qcom: sc8180x: Add USB MP controller and phys
...
The SC8180X platform comes with a multiport DWC3 controller with two
ports, each connected to a pair of HighSpeed and QMP SuperSpeed PHYs.
Describe these blocks.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-5-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:52:31 -05:00
Bjorn Andersson
82a40c7b06
arm64: dts: qcom: sc8180x: Align USB nodes with binding
...
Add the pwr_event interrupt and rearrange the order of the other
interrupts to match the binding.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-4-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:52:30 -05:00
Bjorn Andersson
c8d8e936bc
arm64: dts: qcom: sc8180x-pmics: Add second PMC8180 GPIO
...
The SC8180X comes with two PMC8180 PMICs, with the GPIO block being used
to control VBUS supply of the second USB multiport port.
Rename the GPIO controller in the first PMC8180 to match the schematics
and define this second controller.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-3-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:52:30 -05:00
Bjorn Andersson
9ed1dd650d
Merge branch '20240730-sc8180x-usb-mp-v2-1-a7dc4265b553@quicinc.com' into arm64-for-6.12
...
Merge the sc8180x Global Clock Controller binding from a topic branch,
to gain access to the introduced USB multiport reset constants.
2024-07-31 21:51:29 -05:00
Bjorn Andersson
39b5ffc955
dt-bindings: clock: qcom: Add missing USB MP resets
...
The USB multiport controller needs a few missing resets, describe them
in the binding.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org >
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com >
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-1-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:48:16 -05:00
Dang Huynh
84c1711f27
arm64: dts: qcom: sm6115-pro1x: Enable ATH10K WLAN
...
Enable onboard Wi-Fi on the F(x)tec Pro1X.
For reference, HW/SW identifies as:
qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000
qmi fw_version 0x324103d6 fw_build_timestamp 2021-12-02 08:20
fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.4-00982-QCAHLSWMTPLZ-1
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-11-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
e055924159
arm64: dts: qcom: sm6115-pro1x: Enable remoteprocs
...
Enable [A,C]DSP and MPSS remote processor on this device.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-10-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
b5c63330a7
arm64: dts: qcom: sm6115-pro1x: Enable RGB LED
...
This device has an RGB LED. It is used for notifications.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-9-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
79f8d127c4
arm64: dts: qcom: sm6115-pro1x: Add PMI632 Type-C property
...
The USB-C port is used for powering external devices and transfer
data from/to them.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-8-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
e0674d85c8
arm64: dts: qcom: sm6115-pro1x: Hook up USB3 SS
...
The F(x)tec Pro1X supports USB 3.0 through it's USB-C port.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-7-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
8b9f76a6f8
arm64: dts: qcom: sm6115-pro1x: Enable MDSS and GPU
...
Fxtec Pro1x uses the same display (BOE BF060Y8M-AJ0) as Pro1.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-6-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
95b19afd73
arm64: dts: qcom: sm6115-pro1x: Enable SD card slot
...
Fxtec Pro1X has two card slots and allow either 2xSIM cards or
1xSIM, 1xSD Card configuration.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-5-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
17c9858115
arm64: dts: qcom: sm6115-pro1x: Add Caps Lock LED
...
The Pro1X has a caps lock LED on the keyboard.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-4-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:42:00 -05:00
Dang Huynh
e46b455e67
arm64: dts: qcom: sm6115-pro1x: Add Goodix Touchscreen
...
The Fxtec Pro1X touchscreen uses Goodix GT9286 chip.
Signed-off-by: Dang Huynh <danct12@riseup.net >
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-3-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-07-31 21:41:59 -05:00