Merge "mvebu dt for 4.5 (part 2)" from Gregory CLEMENT:
- Fix Armada 388 GP dts
- Add clock related to PMU for Dove
- Add SolidRun Armada 388 Clearfog A1 dts
* tag 'mvebu-dt-4.5-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: Add SolidRun Armada 388 Clearfog A1 DT file
dt-bindings: add Marvell PMU documentation
ARM: dts: dove: add Dove divider clocks
dt-bindings: add Marvell core PLL and clock divider PMU documentation
ARM: mvebu: remove duplicated regulator definition in Armada 388 GP
Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner:
First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.
* tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add gpio-ir-receiver to the R89 board
ARM: dts: rockchip: add touchscreen node to veyron minnie
ARM: dts: rockchip: add veyron-mickey board
ARM: dts: rockchip: add veyron-brain board
ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron
ARM: dts: rockchip: override thermal settings on veyron-speedy
ARM: dts: rockchip: update the thermal management on rk3288
ARM: dts: rockchip: Add Crypto node for rk3288
ARM: dts: rockchip: add rk3036-evb board
ARM: dts: rockchip: add core rk3036 dtsi
clk: rockchip: add dt-binding header for rk3036
clk: rockchip: add an id for rk3288 crypto clk
ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square
ARM: dts: rockchip: add channels properties for i2s
ARM: dts: rockchip: set system-power-controller property on rk3288-rock2
ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi. This improves the code
maintainability.
PH1-sLD3 is so old that it has more or less different register maps
than the others. So, it cannot be included in this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The UART3 is assigned with IRQ 29 for old SoCs, IRQ 177 for new ones,
and PH1-Pro4 is on the boundary.
PH1-sLD3: UART3 is unavailable
PH1-LD4, PH1-sLD8: only IRQ 29 is supported
PH1-Pro4: both IRQ 29 and 177 are supported
PH1-Pro5, ProXstream2, PH1-LD6b: only IRQ 177 is supported
This SoC can choose either IRQ 29 or IRQ 177, but the former is shared
with another hardware (low speed serial0). The latter is dedicated
for this hardware and more recommended.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Device Tree changes for Ux500" from Linus Walleij:
- Push the Rohm touchscreen to the STUIB, as the TVK UIB has
a Synaptics RMI4 touchscreen.
- Set up the right sensor IRQs for the Snowball, so that
periodic data ready-IRQ capture starts working.
- Use wakeup-source consequently.
- Remove legacy regulator-compatible strings.
- Define the sensors on the HREFP TVK board properly.
* tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: configure the sensors on the TVK board correctly
ARM: u300: remove regulator-compatible usage
ARM: ux500: remove regulator-compatible usage
ARM: ux500: replace legacy *,wakeup property with wakeup-source
ARM: ux500: Assign proper sensor IRQs for Snowball
ARM: ux500: push down Rohm TS to STUIB
Merge "Renesas ARM Based SoC DT Updates for v4.5" from Simon Horman:
* henninger: Remove as it is now replaced by silk
* koelsch: Move SPI partitions to subnode
* porter: Add CAN0 and HS-USB support
* r8a7793/gose: Add QSPI, PFC support
* r8a7793: Add GPIO, DMAC, theral, IPMMU support
* r8a7794/alt: Add DU support
* r8a7794: Disable all IPMMU nodes by default
* r8a779[0134]: Use Use SoC specific binding for rcar-dmac
* r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
wakeup-source property
* r8a779[14]: Correct "gpio-ranges" properties
* r8a779[14]: Remove bogus imp_clk node
* silk: Add SDHI1 support
* tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: alt: add VIN0, ADV7180 DT support
ARM: shmobile: alt: add I2C1 DT support
ARM: shmobile: alt: Add pfc pins to DT
ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7793: Add GPIO nodes to device tree
ARM: shmobile: r8a7794: alt: Enable VGA port
ARM: shmobile: r8a7794: Add DU node to device tree
ARM: shmobile: r8a7794: Add DU0 clock
ARM: shmobile: gose: Add QSPI device to DT
ARM: shmobile: r8a7793: Add QSPI device to DT
ARM: shmobile: r8a7793: Add DMAC devices to DT
ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode
ARM: shmobile: gose: Configure PFC in DT
ARM: shmobile: r8a7793: Add PFC to DT
ARM: shmobile: r8a7793: Add thermal device to DT
ARM: shmobile: henninger: remove board DT
ARM: shmobile: porter: add CAN0 DT support
...
Merge LPC32xx DTS changes for v4.5 from Vladimir Zapolskiy:
Main changes in the series:
- Added description of the second PWM controller device
- Added External Memory Controller device tree node (Primecell PL175)
- Added device tree nodes for standard timer controllers
- USB controllers are grouped
- Various minor clean-ups needed for further development of LPC32xx
* 'lpc32xx-dts' of https://github.com/vzapolskiy/linux:
arm: dts: lpc32xx: move USB controller subdevices into own device node
arm: dts: lpc32xx: add device nodes for standard timers
arm: dts: lpc32xx: add external memory controller device node
arm: dts: ea3250/phy3250: specify phys memory offset for lpc32xx boards
arm: dts: lpc32xx: add device node for the second pwm controller
arm: dts: lpc32xx: add reg property to cpu device node
arm: dts: lpc32xx: add labels to all defined peripheral nodes
arm: dts: lpc32xx: change include syntax to be C preprocessor friendly
Add support for the SolidRun Armada 388 Clearfog A1 board. This board
has an Armada 388 microsom, dedicated gigabit ethernet, six switched
gigabit ethernet ports, SFP cage, two Mini-PCIe/mSATA slots, a m.2 SATA
slot, and a MikroBUS connector to allow MikroBUS modules to be added.
This DT file adds support for all board facilities with the exception
of full SFP support.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 388 GP Device Tree file describes two times a regulator
named 'reg_usb2_1_vbus', with the exact same description. This has
been wrong since Armada 388 GP support was introduced.
Fixes: 928413bd85 ("ARM: mvebu: Add Armada 388 General Purpose Development Board support")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v4.0+
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
have gpios for card detection, write-protect, vqmmc and vmmc.
This patch adds pinmux for this sdcard interface, then adds regulators
for vmmc and vqmmc, lastly adds cd-gpios, wp-gpios properties.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Minnie provides an elan,ekth3500 touchscreen over the display,
so add the necessary node to enable it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Similar to pinky, brain is a development model and probably also
nearing extinction. But to keep pinky from being lonely I'll keep
the two brain boards around as well, especially as they as well
have easily accessible dut-connectors.
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
For the license change:
Acked-by: Brian Norris <briannorris@chromium.org>
The edp-24m clock has two possible sources: the 24MHz oscillator as well
as an external 27MHz input. The power-on-default is the 27MHz clock which
is not supplied on all Rockchip boards. While on all current boards and
also all Veyron Chromebooks the bootloader seems to adapt the muxing to
the internal source, this doesn't seem to be the case on headless veyron
devices like brain and mickey making the edp-24m clock an orphan.
On the hardware side the 27m input also is not connected at all.
With the upcoming deferral of orphan-clocks this results in the power-
domain code deferring, as it cannot request the needed clock and if the
synchronous reset is sucessfullat all in this case is also unknown.
So fix that by making sure, the edp-24m clock is muxed to the internal
24MHz oscillator at all times.
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
The U8500 HREF TVK board actually has a large set of sensors, with
their interrupt lines connected using open drain electronics.
Configure the two accelerometers and two magnetometers so we get
all sensors to actually probe on boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
According to a commit on the ChromeOS kernel, the temperature of the Speedy
surface is over skin temperature spec. So adjust the thermal settings
to mimic the ChromeOS tree to stay within these spec limits.
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
In some cases the machine radiating is very poor,sometime the temperature
is rising very quickly on heavy loading.So we need have more frequent
polling and better granularity.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Prefix all partition reg properties to 32-bit to ease readability.
While at it, also remove a stale x in front of boot partition
offset and make some upper-case hex numbers lower-case.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
NAND flash partitions should be part of a partitions sub-node
not the flash node itself. Move the partitions which will also
allow different bootloaders get rid of the stock partitions
easily by removing the partitions node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Current NAND node has an additional flash partition for the whole
flash overlapping with real partitions. Remove this partition as
the whole flash is already represented by the NAND device itself.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Pull nouveau and radeon fixes from Dave Airlie:
"Just some nouveau and radeon/amdgpu fixes.
The nouveau fixes look large as the firmware context files are
regenerated, but the actual change is quite small"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: make some dpm errors debug only
drm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set
drm/nouveau/nvif: allow userspace access to its own client object
drm/nouveau/gr/gf100-: fix oops when calling zbc methods
drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero
drm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC
drm/nouveau/gr/gf100-: split out per-gpc address calculation macro
drm/nouveau/bios: return actual size of the buffer retrieved via _ROM
drm/nouveau/instmem: protect instobj list with a spinlock
drm/nouveau/pci: enable c800 magic for some unknown Samsung laptop
drm/nouveau/pci: enable c800 magic for Clevo P157SM
drm/radeon: make rv770_set_sw_state failures non-fatal
drm/amdgpu: move dependency handling out of atomic section v2
drm/amdgpu: optimize scheduler fence handling
drm/amdgpu: remove vm->mutex
drm/amdgpu: add mutex for ba_va->valids/invalids
drm/amdgpu: adapt vce session create interface changes
drm/amdgpu: vce use multiple cache surface starting from stoney
drm/amdgpu: reset vce trap interrupt flag
Pull RTC fixes from Alexandre Belloni:
"Two fixes for the ds1307 alarm and wakeup"
* tag 'rtc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
rtc: ds1307: fix alarm reading at probe time
rtc: ds1307: fix kernel splat due to wakeup irq handling
Pull MIPS fix from Ralf Baechle:
"Just a fix for empty loops that may be removed by non-antique GCC"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: Fix delay loops which may be removed by GCC.
Pull m68k fixes from Geert Uytterhoeven:
"Summary:
- Add missing initialization of max_pfn, which is needed to make
selftests/vm/mlock2-tests succeed,
- Wire up new mlock2 syscall"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k: Wire up mlock2
m68knommu: Add missing initialization of max_pfn and {min,max}_low_pfn
m68k/mm: sun3 - Add missing initialization of max_pfn and {min,max}_low_pfn
m68k/mm: m54xx - Add missing initialization of max_pfn
m68k/mm: motorola - Add missing initialization of max_pfn
Pull ARM fixes from Russell King:
"Just two changes this time around:
- wire up the new mlock2 syscall added during the last merge window
- fix a build problem with certain configurations provoked by making
CONFIG_OF user selectable"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8454/1: OF implies OF_FLATTREE
ARM: wire up mlock2 syscall
Pull SCSI target fixes from Nicholas Bellinger:
- fix tcm-user backend driver expired cmd time processing (agrover)
- eliminate kref_put_spinlock_irqsave() for I/O completion (bart)
- fix iscsi login kthread failure case hung task regression (nab)
- fix COMPARE_AND_WRITE completion use-after-free race (nab)
- fix COMPARE_AND_WRITE with SCF_PASSTHROUGH_SG_TO_MEM_NOALLOC non zero
SGL offset data corruption. (Jan + Doug)
- fix >= v4.4-rc1 regression for tcm_qla2xxx enable configfs attribute
(Himanshu + HCH)
* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
target/stat: print full t10_wwn.model buffer
target: fix COMPARE_AND_WRITE non zero SGL offset data corruption
qla2xxx: Fix regression introduced by target configFS changes
kref: Remove kref_put_spinlock_irqsave()
target: Invoke release_cmd() callback without holding a spinlock
target: Fix race for SCF_COMPARE_AND_WRITE_POST checking
iscsi-target: Fix rx_login_comp hang after login failure
iscsi-target: return -ENOMEM instead of -1 in case of failed kmalloc()
target/user: Do not set unused fields in tcmu_ops
target/user: Fix time calc in expired cmd processing
Pull thermal management fixes from Zhang Rui:
"Specifics:
- several fixes and cleanups on Rockchip thermal drivers.
- add the missing support of RK3368 SoCs in Rockchip driver.
- small fixes on of-thermal, power_allocator, rcar driver, IMX, and
QCOM drivers, and also compilation fixes, on thermal.h, when thermal
is not selected"
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux:
imx: thermal: use CPU temperature grade info for thresholds
thermal: fix thermal_zone_bind_cooling_device prototype
Revert "thermal: qcom_spmi: allow compile test"
thermal: rcar_thermal: remove redundant operation
thermal: of-thermal: Reduce log level for message when can't fine thermal zone
thermal: power_allocator: Use temperature reading from tz
thermal: rockchip: Support the RK3368 SoCs in thermal driver
thermal: rockchip: consistently use int for temperatures
thermal: rockchip: Add the sort mode for adc value increment or decrement
thermal: rockchip: improve the conversion function
thermal: rockchip: trivial: fix typo in commit
thermal: rockchip: better to compatible the driver for different SoCs
dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible
Cut 'n paste error saw it only process sizeof(t10_wwn.vendor) characters.
Signed-off-by: David Disseldorp <ddiss@suse.de>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
target_core_sbc's compare_and_write functionality suffers from taking
data at the wrong memory location when writing a CAW request to disk
when a SGL offset is non-zero.
This can happen with loopback and vhost-scsi fabric drivers when
SCF_PASSTHROUGH_SG_TO_MEM_NOALLOC is used to map existing user-space
SGL memory into COMPARE_AND_WRITE READ/WRITE payload buffers.
Given the following sample LIO subtopology,
% targetcli ls /loopback/
o- loopback ................................. [1 Target]
o- naa.6001405ebb8df14a ....... [naa.60014059143ed2b3]
o- luns ................................... [2 LUNs]
o- lun0 ................ [iblock/ram0 (/dev/ram0)]
o- lun1 ................ [iblock/ram1 (/dev/ram1)]
% lsscsi -g
[3:0:1:0] disk LIO-ORG IBLOCK 4.0 /dev/sdc /dev/sg3
[3:0:1:1] disk LIO-ORG IBLOCK 4.0 /dev/sdd /dev/sg4
the following bug can be observed in Linux 4.3 and 4.4~rc1:
% perl -e 'print chr$_ for 0..255,reverse 0..255' >rand
% perl -e 'print "\0" x 512' >zero
% cat rand >/dev/sdd
% sg_compare_and_write -i rand -D zero --lba 0 /dev/sdd
% sg_compare_and_write -i zero -D rand --lba 0 /dev/sdd
Miscompare reported
% hexdump -Cn 512 /dev/sdd
00000000 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*
00000200
Rather than writing all-zeroes as instructed with the -D file, it
corrupts the data in the sector by splicing some of the original
bytes in. The page of the first entry of cmd->t_data_sg includes the
CDB, and sg->offset is set to a position past the CDB. I presume that
sg->offset is also the right choice to use for subsequent sglist
members.
Signed-off-by: Jan Engelhardt <jengelh@netitwork.de>
Tested-by: Douglas Gilbert <dgilbert@interlog.com>
Cc: <stable@vger.kernel.org> # v3.12+
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
this patch fixes following regression
# targetcli
[Errno 13] Permission denied: '/sys/kernel/config/target/qla2xxx/21:00:00:0e:1e:08:c7:20/tpgt_1/enable'
Fixes: 2eafd72939 ("target: use per-attribute show and store methods")
Signed-off-by: Himanshu Madhani <himanshu.madhani@qlogic.com>
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
This patch addresses a race + use after free where the first
stage of COMPARE_AND_WRITE in compare_and_write_callback()
is rescheduled after the backend sends the secondary WRITE,
resulting in second stage compare_and_write_post() callback
completing in target_complete_ok_work() before the first
can return.
Because current code depends on checking se_cmd->se_cmd_flags
after return from se_cmd->transport_complete_callback(),
this results in first stage having SCF_COMPARE_AND_WRITE_POST
set, which incorrectly falls through into second stage CAW
processing code, eventually triggering a NULL pointer
dereference due to use after free.
To address this bug, pass in a new *post_ret parameter into
se_cmd->transport_complete_callback(), and depend upon this
value instead of ->se_cmd_flags to determine when to return
or fall through into ->queue_status() code for CAW.
Cc: Sagi Grimberg <sagig@mellanox.com>
Cc: <stable@vger.kernel.org> # v3.12+
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
This patch addresses a case where iscsi_target_do_tx_login_io()
fails sending the last login response PDU, after the RX/TX
threads have already been started.
The case centers around iscsi_target_rx_thread() not invoking
allow_signal(SIGINT) before the send_sig(SIGINT, ...) occurs
from the failure path, resulting in RX thread hanging
indefinately on iscsi_conn->rx_login_comp.
Note this bug is a regression introduced by:
commit e54198657b
Author: Nicholas Bellinger <nab@linux-iscsi.org>
Date: Wed Jul 22 23:14:19 2015 -0700
iscsi-target: Fix iscsit_start_kthreads failure OOPs
To address this bug, complete ->rx_login_complete for good
measure in the failure path, and immediately return from
RX thread context if connection state did not actually reach
full feature phase (TARG_CONN_STATE_LOGGED_IN).
Cc: Sagi Grimberg <sagig@mellanox.com>
Cc: <stable@vger.kernel.org> # v3.10+
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
Smatch complains about returning hard coded error codes, silence this
warning.
drivers/target/iscsi/iscsi_target_parameters.c:211
iscsi_create_default_params() warn: returning -1 instead of -ENOMEM is sloppy
Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Reviewed-by: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
TCMU sets TRANSPORT_FLAG_PASSTHROUGH, so INQUIRY commands will not be
emulated by LIO but passed up to userspace. Therefore TCMU should not
set these, just like pscsi doesn't.
Signed-off-by: Andy Grover <agrover@redhat.com>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
Reversed arguments meant that we were doing nothing for cmds whose deadline
had passed.
Signed-off-by: Andy Grover <agrover@redhat.com>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
On the ARM architecture, individual platforms select CONFIG_USE_OF if they
need it, but all device tree code is keyed off CONFIG_OF. When building
a platform without DT support and manually enabling CONFIG_OF, we now
get a number of build errors, e.g.
arch/arm/kernel/devtree.c: In function 'setup_machine_fdt':
arch/arm/kernel/devtree.c:215:19: error: implicit declaration of function 'early_init_dt_verify' [-Werror=implicit-function-declaration]
We could now try to separate the use case of booting from DT vs. the
case of using the dynamic implementation, but that seems more complicated
than it can gain us.
This simply changes the ARM Kconfig file to always enable OF_RESERVED_MEM
and OF_EARLY_FLATTREE when CONFIG_OF is enabled. These options add a little
extra code when we just want the dynamic OF implementation, but that seems
like a rather obscure case, and this version solves all CONFIG_OF related
randconfig regressions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 0166dc11be ("of: make CONFIG_OF user selectable")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pull PCI fixes from Bjorn Helgaas:
"Here are a few fixes I'd like to have in v4.4: a generic one for sysfs
and three for HiSilicon and DesignWare host controllers.
Summary:
NUMA:
- Prevent out of bounds access in numa_node override (Mathias Krause)
HiSilicon host bridge driver:
- Fix deferred probing (Arnd Bergmann)
Synopsys DesignWare host bridge driver:
- Remove incorrect io_base assignment (Stanimir Varbanov)
- Move align_resource function pointer to pci_host_bridge structure
(Gabriele Paoloni)"
* tag 'pci-v4.4-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
ARM/PCI: Move align_resource function pointer to pci_host_bridge structure
PCI: hisi: Fix deferred probing
PCI: designware: Remove incorrect io_base assignment
PCI: Prevent out of bounds access in numa_node override
The Marvell Berlin BG2 has 3 watchdogs which are compatible with the
snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
corresponding device tree nodes.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Marvell Berlin BG2CD has 3 watchdogs which are compatible with the
snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
corresponding device tree nodes.
NOTE: although BG2CD doesn't have a HW sysmgr, but the sysmgr domain
exists.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
corresponding device tree nodes.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
