If the DSI output isn't connected, then mdfld_dsi_encoder_get_pipe()
will return -1. The mdfld_dsi_dp_mode_set() function doesn't properly
check for this condition and causes the following compiler warnings:
CC drivers/gpu/drm/gma500/mdfld_dsi_dpi.o
drivers/gpu/drm/gma500/mdfld_dsi_dpi.c: In function ‘mdfld_dsi_dpi_mode_set’:
drivers/gpu/drm/gma500/mdfld_dsi_dpi.c:828:35: warning: array subscript is below array bounds [-Warray-bounds]
u32 pipeconf = dev_priv->pipeconf[pipe];
^
drivers/gpu/drm/gma500/mdfld_dsi_dpi.c:829:33: warning: array subscript is below array bounds [-Warray-bounds]
u32 dspcntr = dev_priv->dspcntr[pipe];
^
Fix this by checking for a valid pipe before indexing the pipeconf and
dspcntr arrays.
Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178476-26284-2-git-send-email-boris.brezillon@free-electrons.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
VC4 wraps the CMA objects in its own structures, so it needs to do its
own teardown (waiting for GPU to finish, updating bo_stats tracking).
The other CMA drivers are using drm_gem_cma_free_object as their
gem_free_object, so this should be a no-op for them.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This is the "fix igt basic test set issues" edition.
- more PSR fixes from Rodrigo, getting closer
- tons of fifo underrun fixes from Ville
- runtime pm fixes from Imre, Daniel Stone
- fix SDE interrupt handling properly (Jani Nikula)
- hsw/bdw fdi modeset sequence fixes (Ville)
- "don't register bad VGA connectors and fall over" fixes (Ville)
- more fbc fixes from Paulo
- and a grand total of exactly one feature item: Implement dma-buf/fence based
cross-driver sync in the i915 pageflip path (Alex Goins)
* tag 'drm-intel-next-2015-12-04-1' of git://anongit.freedesktop.org/drm-intel: (70 commits)
drm/i915: Update DRIVER_DATE to 20151204
drm/i915/skl: Add SKL GT4 PCI IDs
Revert "drm/i915: Extend LRC pinning to cover GPU context writeback"
drm/i915: Correct the Ref clock value for BXT
drm/i915: Restore skl_gt3 device info
drm/i915: Fix RPS pointer passed from wait_ioctl to i915_wait_request
Revert "drm/i915: Remove superfluous NULL check"
drm/i915: Clean up device info structure definitions
drm/i915: Remove superfluous NULL check
drm/i915: Handle cdclk limits on broadwell.
i915: wait for fence in prepare_plane_fb
i915: wait for fence in mmio_flip_work_func
drm/i915: Extend LRC pinning to cover GPU context writeback
drm/i915/guc: Clean up locks in GuC
drm/i915: only recompress FBC after flushing a drawing operation
drm/i915: get rid of FBC {,de}activation messages
drm/i915: kill fbc.uncompressed_size
drm/i915: use a single intel_fbc_work struct
drm/i915: check for FBC planes in the same place as the pipes
drm/i915: alloc/free the FBC CFB during enable/disable
...
Previously, the comment was inconsistent. EDEADLK is what the ww_mutex
mechanism really returns.
Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This pull request brings in 3D acceleration support for the VC4 GPU.
While there is still performance work to be done (particularly
surrounding RCL generation), the CL submit ABI should be settled and
done now.
* tag 'drm-vc4-next-2015-12-11' of http://github.com/anholt/linux:
drm/vc4: Add an interface for capturing the GPU state after a hang.
drm/vc4: Add support for async pageflips.
drm/vc4: Add support for drawing 3D frames.
drm/vc4: Bind and initialize the V3D engine.
drm/vc4: Fix a typo in a V3D debug register.
drm/vc4: Add an API for creating GPU shaders in GEM BOs.
drm/vc4: Add create and map BO ioctls.
drm/vc4: Add a BO cache.
drm: Create a driver hook for allocating GEM object structs.
- Support runtime pm
. In case of most ARM SoC, each IP has each power domain which should be
controlled by each IP driver using runtime pm interface. So this patch
series makes each IP driver to control its own power domain when
drm dpms is requested.
- Support of_graph based dt binding for DP panel.
. This patch series adds of_graph based dt binding for DP panel.
And also it keeps backward compatibility. This includes dt binding
patch so I got Acked-by from Krzysztof Kozlowski who is a Exynos
SoC maintainer and from Rob Herring who is a device tree maintainer.
- Cleanup for Exynos DRM IPP enhancement.
. This patch series is a first step for enhancing existing IPP framework
which will integrate existing IPP functions with DRM KMS part so that
these can be transparent to userspace. For other portion of the patch
series, we will have more times for the review.]
* 'exynos-drm-next' of git://git.kernel.org:/pub/scm/linux/kernel/git/daeinki/drm-exynos: (29 commits)
drm/exynos: gem: remove old unused prototypes
drm/exynos: fimd: fix dma burst size setting for small plane size
drm/exynos: fix clipping when scaling is enabled
drm/exynos: mixer: use ratio precalculated in exynos_state
drm/exynos: add generic check for plane state
drm/exynos: introduce exynos_drm_plane_config structure
drm/exynos: mixer: enable video overlay plane only when VP is available
drm/exynos: mixer: use crtc->state->adjusted_mode instead of crtc->mode
drm/exynos: introduce exynos_drm_plane_state structure
drm/exynos: move dma_addr attribute from exynos plane to exynos fb
drm/exynos: exynos7-decon: remove excessive check
drm/exynos: rotator: convert to common clock framework
drm/exynos: gsc: add device tree support and remove usage of static mappings
drm/exynos: gsc: fix wrong pm_runtime state
drm/exynos: gsc: prepare and unprepare gsc clock
ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi
dt-bindings: exynos-dp: update ports node binding for panel
drm/exynos: dp: add of_graph dt binding support for panel
drm/exynos: decon: remove unused variables
drm/exynos: dsi: modify a error type when getting a node failed
...
Last (very likely at least) drm-misc pull for 4.5. 3 big things:
- piles of docs for kms vtables.
- drm.debug dmesg output prettification from Ville (i915 parts are for 4.6
I think)
- connector mode probing/validating/merging cleanup from Ville.
[airlied : fix drm_encoder_init conflict.]
* tag 'topic/drm-misc-2015-12-14' of git://anongit.freedesktop.org/drm-intel: (43 commits)
drm: modes: Revert cc344980c7 "replace simple_strtoul by kstrtouint"
drm: Expand the drm_helper_probe_single_connector_modes() docs
drm: Allow override_edid to override the firmware EDID
drm/sti: Drop bogus drm_mode_sort() call
drm: Drop drm_helper_probe_single_connector_modes_nomerge()
drm: Only merge mode type bits between new probed modes
drm: Flatten drm_mode_connector_list_update() a bit
drm: Rename MODE_UNVERIFIED to MODE_STALE
drm: Don't overwrite UNVERFIED mode status to OK
drm: Add plane->name and use it in debug prints
drm: Add crtc->name and use it in debug messages
drm: Use driver specified encoder name
drm: Pass 'name' to drm_encoder_init()
drm: Pass 'name' to drm_universal_plane_init()
drm: Pass 'name' to drm_crtc_init_with_planes()
drm: Documentation style guide
drm: Document drm_encoder/crtc_helper_funcs
drm: Move drm_display_mode an related docs into kerneldoc
drm/atomic-helper: Mention the new system/resume helpers the docs
drm: Document drm_connector_helper_funcs
...
Main thing this time around is DSI support for msm8960/apq8064, which
should be helpful for getting an upstream kernel working on
nexus7/nexus4/etc.
* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (29 commits)
drm/msm/mdp: fix a problematic usage of WARN_ON()
drm/msm/dsi: Added missing mutex_unlock
drm/msm: ratelimit error irq msgs
drm/msm: Use unlocked gem unreferencing
drm/msm: trivial whitespace fix
dt-bindings: msm/dsi: Add DSIv2 documentation
dt-bindings: msm/dsi: Fix the order in which clocks are listed
drm/msm/dsi: Enable MMSS SPFB port via syscon
drm/msm/dsi: Don't use iommu for command TX buffer for DSIv2
drm/msm/dsi: Add dsi_cfg for APQ8064
drm/msm/dsi: Set up link clocks for DSIv2
drm/msm/dsi: Parse bus clocks from a list
drm/msm/dsi: Delay dsi_clk_init
drm/msm/dsi: Use a better way to figure out DSI version
drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY
drm/msm/dsi: Add support for 28nm PHY on 8960
drm/msm/dsi: Don't get byte/pixel source clocks from DT
drm/msm/mdp4: Initialize DSI encoders
drm/msm/mdp4: Call custom round_pixclk helper only if the encoder type is TMDS
drm/msm/dsi: Add a mdp4 encoder for DSI
...
WARN_ON() takes a condition rather than a format string. This patch
converted WARN_ON() to WARN() instead.
Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
in case of failed to get iova, function was returning without releasing
the mutex. Added it.
Signed-off-by: Saurabh Sengar <saurabh.truth@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
For drm_gem_object_unreference callers are required to hold
dev->struct_mutex, which these paths don't. Enforcing this requirement
has become a bit more strict with
commit ef4c6270bf
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Oct 15 09:36:25 2015 +0200
drm/gem: Check locking in drm_gem_object_unreference
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
For DSIv2 to work, we need to enable MMSS_AHB_ARB_MASTER_PORT in
MMSS_SFPB. We enable the required bitfield by retrieving MMSS_SFPB
regmap pointer via syscon.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
We currently use iommu allocated DMA buffers for sending DSI commands.
DSIv2 doesn't have a port connected to the MDP iommu. Therefore, it
can't use iommu allocated buffers to fetch DSI commands.
Use a regular contiguous DMA buffer if we are DSIv2.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to
be supported, add a list of bus clocks that are required by the DSIv2
block.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
