Commit Graph

122554 Commits

Author SHA1 Message Date
Lukasz Laguna
0f13dead4e drm/xe: Update wedged.mode only after successful reset policy change
Previously, the driver's internal wedged.mode state was updated without
verifying whether the corresponding engine reset policy update in GuC
succeeded. This could leave the driver reporting a wedged.mode state
that doesn't match the actual reset behavior programmed in GuC.

With this change, the reset policy is updated first, and the driver's
wedged.mode state is modified only if the policy update succeeds on all
available GTs.

This patch also introduces two functional improvements:

 - The policy is sent to GuC only when a change is required. An update
   is needed only when entering or leaving XE_WEDGED_MODE_UPON_ANY_HANG,
   because only in that case the reset policy changes. For example,
   switching between XE_WEDGED_MODE_UPON_CRITICAL_ERROR and
   XE_WEDGED_MODE_NEVER doesn't affect the reset policy, so there is no
   need to send the same value to GuC.

 - An inconsistent_reset flag is added to track cases where reset policy
   update succeeds only on a subset of GTs. If such inconsistency is
   detected, future wedged mode configuration will force a retry of the
   reset policy update to restore a consistent state across all GTs.

Fixes: 6b8ef44cc0 ("drm/xe: Introduce the wedged_mode debugfs")
Signed-off-by: Lukasz Laguna <lukasz.laguna@intel.com>
Link: https://patch.msgid.link/20260107174741.29163-3-lukasz.laguna@intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-08 16:07:42 -05:00
Lukasz Laguna
17d3c3365b drm/xe: Validate wedged_mode parameter and define enum for modes
Check correctness of the wedged_mode parameter input to ensure only
supported values are accepted. Additionally, replace magic numbers with
a clearly defined enum.

Signed-off-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260107174741.29163-2-lukasz.laguna@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-08 16:07:07 -05:00
Raag Jadav
644673a69f drm/xe/pm: Handle GT resume failure
We've been historically ignoring GT resume failure. Since the function
can return error, handle it properly.

v2: Bring up display before bailing (Matt Roper, Rodrigo)

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Link: https://patch.msgid.link/20251220073657.166810-1-raag.jadav@intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-08 15:35:36 -05:00
Peter Colberg
38a0f4cf8c Revert duplicate "drm/amdgpu: disable peer-to-peer access for DCC-enabled GC12 VRAM surfaces"
This reverts commit 22a36e660d once,
which was merged twice due to an incorrect backmerge resolution.

Fixes: ce0478b02e ("Merge tag 'v6.18-rc6' into drm-next")
Signed-off-by: Peter Colberg <pcolberg@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 15:18:13 -05:00
Matt Roper
4e88de313f drm/xe/nvls: Define GuC firmware for NVL-S
Although NVL-S has a similar Xe3 to PTL/WCL, it requires a unique GuC
firmware.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20251016-xe3p-v3-12-3dd173a3097a@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patch.msgid.link/20260108181956.1254908-9-julia.filipchuk@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-08 15:15:55 -05:00
Chaoyi Chen
ec27500c8f drm/rockchip: vop: Add support for rk3506
The VOP on rk3506:
- Support 2 lane MIPI DSI interface, 1.5Gbps/lane.
- Support RGB interface.
- Max output resolution is 1280x1280@60fps.
- WIN1 layer support RGB888/ARGB8888/RGB565.
- Support Gamma LUT.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251106020632.92-10-kernel@airkyi.com
2026-01-08 20:00:35 +01:00
Chaoyi Chen
cabeacc7ea drm/rockchip: dsi: Add support for rk3506
The dsi controller found on RK3506 supports up to 2 lanes.

Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251106020632.92-8-kernel@airkyi.com
2026-01-08 20:00:35 +01:00
Daniel Stone
28c2490458 drm/rockchip: vop2: Simplify format_mod_supported
Make it a little less convoluted, and just directly check if the
combination of plane + format + modifier is supported.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-8-83463c075a8d@collabora.com
2026-01-08 20:00:35 +01:00
Daniel Stone
c8c85c0a7f drm/rockchip: vop2: Use drm_is_afbc helper function
We don't need to do a long open-coded walk here; we can simply check the
modifier value.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-7-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Daniel Stone
081676de4a drm/rockchip: vop2: Enforce AFBC transform stride align in plane_check
Make sure we can't break the hardware by requesting an unsupported
configuration.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-6-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Daniel Stone
8cdd4d858d drm/rockchip: vop2: Enforce AFBC source alignment in plane_check
Planes can only source AFBC framebuffers at multiples of 4px wide on
RK3566/RK3568. Instead of clipping on all SoCs when the user asks for an
unaligned source rectangle, reject the configuration in the plane's
atomic check on RK3566/RK3568 only.

Signed-off-by: Daniel Stone <daniels@collabora.com>
[Make RK3566/RK3568 specific, reword message, s/byte/pixel/]
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-5-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Daniel Stone
dfb673c71f drm/rockchip: vop2: Enforce scaling workaround in plane_check
It seems only cluster windows are capable of applying downscaling when
the source region has an odd width. Instead of applying a workaround
inside atomic_update, fail the plane check if this is requested.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-4-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Daniel Stone
f403945d24 drm/rockchip: vop2: Fix Esmart test condition
If we want to find out if a window is Esmart or not, test for not being
a cluster window, rather than AFBDC presence.

No functional effect as only cluster windows support AFBC decode.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-3-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Daniel Stone
2f4e3f2bef drm/rockchip: vop2: Switch impossible pos conditional to WARN_ON
We already clip the plane to the display bounds in atomic_check, and
ensure that it is sufficiently sized. Instead of trying to catch this
and adjust for it in atomic_update, just assert that atomic_check has
done its job.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-2-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Daniel Stone
78de5d28d7 drm/rockchip: vop2: Switch impossible format conditional to WARN_ON
We should never be able to create a framebuffer with an unsupported
format, so throw a warning if this ever happens.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-1-83463c075a8d@collabora.com
2026-01-08 20:00:34 +01:00
Alice Ryhl
adca0ad927 drm/gpuvm: use const for drm_gpuva_op_* ptrs
These methods just read the values stored in the op pointers without
modifying them, so it is appropriate to use const ptrs here.

This allows us to avoid const -> mut pointer casts in Rust.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Alice Ryhl <aliceryhl@google.com>
Link: https://patch.msgid.link/20260108-gpuvm-rust-v2-3-dbd014005a0b@google.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-01-08 18:06:56 +01:00
Alice Ryhl
9bf4ca1e69 drm/gpuvm: drm_gpuvm_bo_obtain() requires lock and staged mode
In commit 9ce4aef9a5 ("drm/gpuvm: take GEM lock inside
drm_gpuvm_bo_obtain_prealloc()") we update
drm_gpuvm_bo_obtain_prealloc() to take locks internally, which means
that it's only usable in immediate mode.

In this commit, we notice that drm_gpuvm_bo_obtain() requires you to use
staged mode. This means that we now have one variant of obtain for each
mode you might use gpuvm in.

To reflect this information, we add a warning about using it in
immediate mode, and to make the distinction clearer we rename the method
with a _locked() suffix so that it's clear that it requires the caller
to take the locks.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Alice Ryhl <aliceryhl@google.com>
Link: https://patch.msgid.link/20260108-gpuvm-rust-v2-2-dbd014005a0b@google.com
[ Slightly reword commit message to refer to commit 9ce4aef9a5
  ("drm/gpuvm: take GEM lock inside drm_gpuvm_bo_obtain_prealloc()").
  - Danilo ]
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-01-08 18:05:16 +01:00
Alice Ryhl
9ce4aef9a5 drm/gpuvm: take GEM lock inside drm_gpuvm_bo_obtain_prealloc()
When calling drm_gpuvm_bo_obtain_prealloc() and using immediate mode,
this may result in a call to ops->vm_bo_free(vm_bo) while holding the
GEMs gpuva mutex. This is a problem if ops->vm_bo_free(vm_bo) performs
any operations that are not safe in the fence signalling critical path,
and it turns out that Panthor (the only current user of the method)
calls drm_gem_shmem_unpin() which takes a resv lock internally.

This constitutes both a violation of signalling safety and lock
inversion. To fix this, we modify the method to internally take the GEMs
gpuva mutex so that the mutex can be unlocked before freeing the
preallocated vm_bo.

Note that this modification introduces a requirement that the driver
uses immediate mode to call drm_gpuvm_bo_obtain_prealloc() as it would
otherwise take the wrong lock.

Fixes: 63e919a316 ("panthor: use drm_gpuva_unlink_defer()")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Alice Ryhl <aliceryhl@google.com>
Link: https://patch.msgid.link/20260108-gpuvm-rust-v2-1-dbd014005a0b@google.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-01-08 17:45:09 +01:00
Mario Limonciello (AMD)
6a23e7b433 drm/amd: Clean up kfd node on surprise disconnect
When an eGPU is unplugged the KFD topology should also be destroyed
for that GPU. This never happens because the fini_sw callbacks never
get to run. Run them manually before calling amdgpu_device_ip_fini_early()
when a device has already been disconnected.

This location is intentionally chosen to make sure that the kfd locking
refcount doesn't get incremented unintentionally.

Cc: kent.russell@amd.com
Closes: https://community.frame.work/t/amd-egpu-on-linux/8691/33
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:43:23 -05:00
Mukesh Ogare
17de472698 drm/radeon: convert UVD v1.0 logging to drm_* helpers
Replace legacy DRM_ERROR()/DRM_INFO() logging in the UVD v1.0 code
with drm_err() and drm_info() helpers that take a struct drm_device.

Using drm_* logging provides proper device context in dmesg, which is
important for systems with multiple DRM devices, and aligns the radeon
driver with current DRM logging practices.

No functional change intended.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Mukesh Ogare <mukeshogare871@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:43:13 -05:00
Hawking Zhang
5e3f50fda2 drm/amdgpu: Extend psp_skip_tmr for bare-metal and sriov
In SRIOV, guest drivers no longer setup/destory
VMR starting from mp0 v11_0_7.

In bare-metal, if boot-time TMR is enabled, some
generation (e.g., mp0 v13_0_x) don’t need runtime
TMR allocation but still require SETUP_TMR command
with tmr address 0 for backward compatibility.
some newer generations require neither SETUP_TMR nor
DESTROY_TMR and will return errors if they are sent.
Driver relies on boot_time_tmr and autoload_supported
to handle these cases correctly.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:43:09 -05:00
Philip Yang
698fa62f56 drm/amdgpu: Add helper to alloc GART entries
Add helper amdgpu_gtt_mgr_alloc/free_entries, define
GART_ENTRY_WITHOUT_BO_COLOR color for GART node not allocated with GTT
bo, then amdgpu_gtt_mgr_recover skip those mm_node.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:42:53 -05:00
Lijo Lazar
ec9243d1b4 drm/amd/pm: Return right size for gpuboard metrics
Change to switch style checks and return the correct size for gpu board
metrics.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:42:46 -05:00
Ben Dooks
c812460e69 drm/radeon: fix signed v unsigned print formats
Fix several places where %ld or %d has been used in place of
%lu or %u.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:42:41 -05:00
Lu Yao
2f2a72de67 drm/amdgpu: fix drm panic null pointer when driver not support atomic
When driver not support atomic, fb using plane->fb rather than
plane->state->fb.

Fixes: fe151ed7af ("drm/amdgpu: add generic display panic helper code")
Signed-off-by: Lu Yao <yaolu@kylinos.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:41:46 -05:00
Pratik Vishwakarma
c7fc0f3723 drm/amd: Enable SMU 15_0_0 support
Add SMU 15_0_0

v2: rebase (Alex)
v3: fix clang build (Alex)

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:41:42 -05:00
Pratik Vishwakarma
a68654bfb7 drm/amd: Enable SMU 15_0_0 firmware headers
Add SMU 15_0_0 firmware headers

v2: squash in updates (Alex)

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:41:38 -05:00
Pratik Vishwakarma
52cd9bc47f drm/amd: Enable SMUIO 15_0_0 support
Add SMUIO 15_0_0.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:41:34 -05:00
Alex Deucher
65653210ed drm/amdgpu: Add THM 15.0.0 headers
Add headers for THM 15.0.0.

v2: squash in updates (Alex)

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:41:30 -05:00
Alex Deucher
29f560a523 drm/amdgpu: add SMUIO 15.0.0 headers
Add headers for SMUIO 15.0.0.

v2: squash in updates (Alex)

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:41:25 -05:00
Philip Yang
fc1366016a drm/amdgpu: Fix gfx9 update PTE mtype flag
Fix copy&paste error, that should have been an assignment instead of an or,
otherwise MTYPE_UC 0x3 can not be updated to MTYPE_RW 0x1.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:45 -05:00
Lijo Lazar
0c0dd10062 drm/amd/pm: Use driver table for board temperature
GPU board and Baseboard temperatures come from system metrics table.
Driver keeps separate metrics table for both. Use the new driver table
structure to represent them.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:42 -05:00
Lijo Lazar
34d6599748 drm/amd/pm: Use cached gpu metrics table
If cached gpu metrics table is available, return it directly. Also,
deprecate gpu_metrics_table variables as they are no longer used.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:40 -05:00
Lijo Lazar
618c144145 drm/amd/pm: Use driver table structure in smuv14
Use driver table structure for gpu metrics in smuv14. The default cache
interval is set at 5ms.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:37 -05:00
Lijo Lazar
e3e4f03f25 drm/amd/pm: Use driver table structure in smuv13
Use driver table structure for gpu metrics in smuv13. The default cache
interval is set at 5ms.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:32 -05:00
Lijo Lazar
f8e8d7da25 drm/amd/pm: Use driver table structure in smuv12
Use driver table structure for gpu metrics in smuv12. The default cache
interval is set at 5ms.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:28 -05:00
Lijo Lazar
d1010ca49b drm/amd/pm: Use driver table structure in smuv11
Use driver table structure for gpu metrics in smuv11. The default cache
interval is set at 5ms.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08 11:40:15 -05:00
Andy Yan
7f6721b767 drm/rockchip: vop2: Only wait for changed layer cfg done when there is pending cfgdone bits
The write of cfgdone bits always done at .atomic_flush.
When userspace makes plane zpos changes of two crtc within one commit,
at the .atomic_begin stage, crtcN will never receive the "layer change
cfg done" event of crtcM because crtcM has not yet written "cfgdone".
So only wait when there is pending cfgdone bits to avoid long timeout.

Fixes: 3e89a8c683 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250718064120.8811-2-andyshrk@163.com
2026-01-08 16:42:16 +01:00
Andy Yan
9fae82450d drm/rockchip: vop2: Add delay between poll registers
According to the implementation of read_poll_timeout_atomic, if the
delay time is 0, it will only use a simple loop based on timeout_us to
decrement the count. Therefore, the final timeout time will differ
significantly from the set timeout time. So, here we set a specific
delay time to ensure that the calculation of the timeout duration
is accurate.

Fixes: 3e89a8c683 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250718064120.8811-1-andyshrk@163.com
2026-01-08 16:42:15 +01:00
Rafael J. Wysocki
88dcab0650 drm/imagination: Discard pm_runtime_put() return value
The Imagination DRM driver defines pvr_power_put() to pass the return
value of pm_runtime_put() to the caller, but then it never uses the
return value of pvr_power_put().

Modify pvr_power_put() to discard the pm_runtime_put() return value and
change its return type to void.

No intentional functional impact.

This will facilitate a planned change of the pm_runtime_put() return
type to void in the future.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Link: https://patch.msgid.link/8642685.T7Z3S40VBb@rafael.j.wysocki
2026-01-08 15:19:15 +01:00
Matthew Brost
10dd1eaa80 drm/pagemap: Disable device-to-device migration
Device-to-device migration is causing xe_exec_system_allocator --r
*race*no* to intermittently fail with engine resets and a kernel hang on
a page lock. This should work but is clearly buggy somewhere. Disable
device-to-device migration in the interim until the issue can be
root-caused.

The only downside of disabling device-to-device migration is that memory
will bounce through system memory during migration. However, this path
should be rare, as it only occurs when madvise attributes are changed or
atomics are used.

Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Fixes: ec265e1f1c ("drm/pagemap: Support source migration over interconnect")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
Link: https://patch.msgid.link/20260107182716.2236607-3-matthew.brost@intel.com
2026-01-07 21:29:40 -08:00
Matthew Brost
3902846af3 drm/pagemap Fix error paths in drm_pagemap_migrate_to_devmem
Avoid unlocking and putting device pages unless they were successfully
locked, and do not calculate migrated_pages on error paths.

Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Fixes: 75af93b3f5 ("drm/pagemap, drm/xe: Support destination migration over interconnect")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
Link: https://patch.msgid.link/20260107182716.2236607-2-matthew.brost@intel.com
2026-01-07 21:29:39 -08:00
Matthew Brost
cc54eabdfb drm/xe: Adjust page count tracepoints in shrinker
Page accounting can change via the shrinker without calling
xe_ttm_tt_unpopulate(), which normally updates page count tracepoints
through update_global_total_pages. Add a call to
update_global_total_pages when the shrinker successfully shrinks a BO.

v2:
 - Don't adjust global accounting when pinning (Stuart)

Cc: stable@vger.kernel.org
Fixes: ce3d39fae3 ("drm/xe/bo: add GPU memory trace points")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Link: https://patch.msgid.link/20260107205732.2267541-1-matthew.brost@intel.com
2026-01-07 21:29:38 -08:00
Dave Airlie
f6eac56d6b Merge tag 'amd-drm-fixes-6.19-2026-01-06' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.19-2026-01-06:

amdgpu:
- Clang fixes
- Navi1x PCIe DPM fixes
- Ring reset fixes
- ISP suspend fix
- Analog DC fixes
- VPE fixes
- Mode1 reset fix

radeon:
- Variable sized array fix

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20260107223315.16095-1-alexander.deucher@amd.com
2026-01-08 10:34:27 +10:00
Mario Limonciello (AMD)
6b2989ac5e Reapply "Revert "drm/amd: Skip power ungate during suspend for VPE""
Skipping power ungate exposed some scenarios that will fail
like below:

```
amdgpu: Register(0) [regVPEC_QUEUE_RESET_REQ] failed to reach value 0x00000000 != 0x00000001n
amdgpu 0000:c1:00.0: amdgpu: VPE queue reset failed
...
amdgpu: [drm] *ERROR* wait_for_completion_timeout timeout!
```

The underlying s2idle issue that prompted this commit is going to
be fixed in BIOS.
This reverts commit 2a6c826cfe.

This was lost in the 6.19 merge so reapply it.

Fixes: 2a6c826cfe ("drm/amd: Skip power ungate during suspend for VPE")
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reported-by: Konstantin <answer2019@yandex.ru>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220812
Reported-by: Matthew Schwartz <matthew.schwartz@linux.dev>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 3925683515)
2026-01-07 17:24:16 -05:00
Alex Hung
eb236fb911 drm/amd/display: Check NULL before calling dac_load_detection
dac_load_detection can be NULL in some scenario, so checking it before
calling.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 179176134b)
2026-01-07 17:24:16 -05:00
Perry Yuan
0de604d035 drm/amd/pm: Disable MMIO access during SMU Mode 1 reset
During Mode 1 reset, the ASIC undergoes a reset cycle and becomes
temporarily inaccessible via PCIe. Any attempt to access MMIO registers
during this window (e.g., from interrupt handlers or other driver threads)
can result in uncompleted PCIe transactions, leading to NMI panics or
system hangs.

To prevent this, set the `no_hw_access` flag to true immediately after
triggering the reset. This signals other driver components to skip
register accesses while the device is offline.

A memory barrier `smp_mb()` is added to ensure the flag update is
globally visible to all cores before the driver enters the sleep/wait
state.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 7edb503fe4)
2026-01-07 17:24:10 -05:00
Rodrigo Vivi
3f0e3af468 Merge drm/drm-next into drm-xe-next
Bring some drm-scheduler patches to Xe.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-07 16:49:20 -05:00
Dave Airlie
a5f207e272 Merge tag 'drm-misc-fixes-2026-01-07' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes
drm-misc-fixes for v6.19-rc5:

pl111:
- Fix error handling in probe

mediatek/atomic/tidss:
- Fix tidss in another way and revert reordering of pre-enable and post-disable operations,
  as it breaks other bridge drivers.

nouveau:
- Fix regression from fwsec s/r fix.

pci/vga:
- Fix multiple gpu's being reported a 'boot_display'

fb-helper:
- Fix vblank timeout during suspend/reset

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patch.msgid.link/f50067e6-243a-4ed8-9781-1e4e4fdebc8e@linux.intel.com
2026-01-08 07:41:00 +10:00
John Hubbard
2d7b4a44fb gpu: nova-core: use CStr::from_bytes_until_nul() in elf64_section()
Instead of open-coding the steps for extracting a null-terminated
string, use the newly available CStr::from_bytes_until_nul().

Suggested-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
Link: https://patch.msgid.link/20260106035226.48853-3-jhubbard@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-01-07 19:36:11 +01:00