dt-bindings: Changes for v4.20-rc1
This contains the PMC pad configuration bindings which are used to
control the voltage of various pads found on Tegra chips. Among other
things this is required to enable faster modes on SDHCI.
* tag 'tegra-for-4.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Add Tegra PMC pad configuration bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This device-tree pxa update brings :
- a couple of changes for future pxa2xx platforms
- 2 fixes in RTC and I2C domain
* tag 'pxa-dt-4.20' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: add pincontrol helpers
ARM: dts: pxa: fix power i2c base address
ARM: dts: pxa: fix the rtc controller
ARM: dts: pxa: change serial node names
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Amlogic ARM64 DT updates for v4.20, round 2
- new SoC support: basic support for G12A family
- new board: Amlogic U200 board, using G12A SoC
- fix SPI bus warnings from new dtc updates
* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support
dt-bindings: arm: amlogic: Add Meson G12A binding
arm64: dts: meson: Fix erroneous SPI bus warnings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: dts: Amlogic updates for v4.20
- fix clock controller register sizes
- new board: Endless Mini (EC-100) by Endless Mobile
- add voltage regulators
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: add stdout-path property
ARM: dts: meson8b: odroidc1: enable the SAR ADC
ARM: dts: meson8b: odroidc1: add the fixed voltage regulators
ARM: dts: meson8b: odroidc1: add the CPU voltage regulator
ARM: dts: meson8b: Add support for the Endless Mini (EC-100)
ARM: dts: meson8b: add the RMII pins
ARM: dts: meson8b: add the I2C_A, PWM_C and UART_B pins
dt-bindings: arm: amlogic: Add the Endless Mobile Endless Mini (EC-100)
dt-bindings: add vendor prefix for "Endless Mobile, Inc."
ARM: dts: meson8b: fix the clock controller register size
ARM: dts: meson8: fix the clock controller register size
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Berlin64 DT changes for v4.20
* tag 'berlin64-dt-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC
dt-bindings: arm: syna: add support for the AS370 SoC
dt-bindings: arm: move berlin binding documentation to syna.txt
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Chanho Min <chanho.min@lge.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dtc has new checks for SPI buses. Fix the warnings in node names.
arch/arm64/boot/dts/amd/amd-overdrive.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
Cc: Brijesh Singh <brijeshkumar.singh@amd.com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The AS370 SoC is a new derivative of the berlin family. However, the
SoC isn't named as berlin*.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Move berlin binding documentation as part of transition from Marvell
berlin to Synaptics SoC.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Rob Herring <robh@kernel.org>
The power key is controlled solely by the EC, which only tiggeres this
gpio after wakeup.
Fixes immediately return to suspend after wake from LP1.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix indentation and alignment when spaces were used instead of tabs.
This fixes checkpatch errors like:
ERROR: code indent should use tabs where possible
#306: FILE: arch/arm/boot/dts/tegra20-paz00.dts:306:
+^I^I <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;$
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add an evaluation board device tree more in-line with all our other
device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename ac97 label to tegra_ac97 to be more in-line with the device tree
binding documentation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename i2c_ddc to hdmi_ddc to be more in-line with other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Simplify model and compatible by dropping the 256/512 MB from the model,
-512 from the compatible and rename that property from toradex,iris to
toradex,colibri_t20-iris to be more in-line with all our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Simplify model and compatible by dropping the 256/512 MB from the model
and -512 from the compatible properties to be more in-line with all our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate the SD card, its detect pin and move the SD card detect GPIO
definition from the module to the carrier board more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE
register of the TPS658643 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename and annotate LM95245 temperature sensor more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Update sound nvidia,model to be more in-line with our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Remove the phy-reset-gpio from the USB controller node as it is already
specified in the PHY node.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing regulators:
- reg_lan_v_bus being USB Ethernet chip vbus supply
- carrier board reg_3v3 to be used as backlight and panel power supply
- carrier board HDMI supply being reg_5v0
- reg_usbc_vbus being the USB vbus supply of the EHCI instance 0
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use no-1-8-v property rather than vmmc/vqmmc supplies and drop now
obsolete and anyway non-existent vcc_sd.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
