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Author SHA1 Message Date
Coia Prant
c8ecda015e arm64: dts: rockchip: fix PCIe 3.3V regulator voltage on 9Tripod X3568 v4 
The regulator type is "regulator-fixed" since its voltage always be
3.3v, min and max should be 3300000 make the regulator has a voltage

The regulator is supplied by dc_12v, so add the vin-supply.

Link: 17e9559f67
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://patch.msgid.link/20251114092114.62664-2-coiaprant@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:11:07 +01:00
Heiko Stuebner
f54b09d46f arm64: dts: rockchip: Add power-domain to RK3368 VOP controller 
The VOP is also part of the VIO power-domain and it definitely needs to
be on when accessing it to not cause SError faults, so add the
power-domains property to it.

Fixes: ef06b5ddee ("arm64: dts: rockchip: Add display subsystem for RK3368")
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Link: https://patch.msgid.link/20251021074254.87065-6-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:06:49 +01:00
Heiko Stuebner
8319be65e8 arm64: dts: rockchip: Add power-domain to RK3368 DSI controller 
The DSI controller is also part of the VIO power-domain and it
definitely needs to be on when accessing it to not cause SError
faults, so add the power-domains property to it.

Fixes: 5023d0cd61 ("arm64: dts: rockchip: Add DSI for RK3368")
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Link: https://patch.msgid.link/20251021074254.87065-5-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:06:49 +01:00
Chris Morgan
932feac9d8 arm64: dts: rockchip: Add host wake pin for wifi on Indiedroid Nova 
Add the pin definition for the host wake interrupt on the Indiedroid
Nova. This necessitates adding a node for the wifi controller to
properly define the interrupt. Additionally, we can consolidate both
pinctrl definitions under a wifi node to note their common functionality.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251118223048.4531-5-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:04:19 +01:00
Chris Morgan
6f563ebf0b arm64: dts: rockchip: Correct pinctrl for pcie for Indiedroid Nova 
Correct the pin definitions of the PCIE controller on the Indiedroid
Nova according to the schematics. Since GPIO3 D1 is already defined
as a reset pin in the rk3588-base-pinctrl.dtsi file we do not need
a custom definition anymore.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251118223048.4531-4-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:04:19 +01:00
Chris Morgan
835c909e85 arm64: dts: rockchip: Define regulator for pcie2x1l2 on Indiedroid Nova 
Add the correct regulator defined per the schematics to the PCIE
interface for the Indiedroid Nova.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251118223048.4531-3-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:04:13 +01:00
Chris Morgan
e28f44013d arm64: dts: rockchip: Add clk32k_in for Indiedroid Nova 
The clk32k_in pin of the SoC is connected to the real time clock
according to the schematics. Set the pin definition on the real
time clock to reflect this.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251118223048.4531-2-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:03:11 +01:00
Michael Opdenacker
9f80b39523 arm64: dts: rockchip: Add Asus Tinker Board 3 and 3S device tree 
Add initial device tree support for Asus Tinker Board 3 [1] and 3S [2],
which are SBCs based on the Rockchip 3566 SoC.

The "3S" version ("S" for "storage") just adds a 16 GB eMMC
and a "mask ROM" DIP switch (to mask the eMMC and enter "Mask ROM"
mode for recovery) to the "3" version.

This adds support for:
- Debug UART (/dev/ttyS2)
- SD card (/dev/mmcblk1)
- eMMC (/dev/mmcblk0, only on Tinker Board 3S)
- I2C:
  - i2c0 (internal bus with a PMIC and regulators)
  - i2c2 (internal bus with an at24 eeprom and an RTC device)
- USB 2.0 ports
- 2 GPIO LEDS

[1] https://tinker-board.asus.com/series/tinker-board-3.html
[2] https://tinker-board.asus.com/series/tinker-board-3s.html

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Link: https://patch.msgid.link/20251118-tinker3-v3-2-2903693f2ebb@rootcommit.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 23:02:01 +01:00
Michael Opdenacker
f4e81d0b95 dt-bindings: arm: rockchip: Add Asus Tinker Board 3/3S 
Document the compatible strings for Asus Tinker Board 3 [1] and 3S [2],
which are SBCs based on the Rockchip 3566 SoC.

The "3S" version ("S" for "storage") just adds a 16 GB eMMC
and a "mask ROM" DIP switch to the "3" version.

[1] https://tinker-board.asus.com/series/tinker-board-3.html
[2] https://tinker-board.asus.com/series/tinker-board-3s.html

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://patch.msgid.link/20251118-tinker3-v3-1-2903693f2ebb@rootcommit.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 22:51:15 +01:00
Michael Opdenacker
605945281a dt-bindings: arm: rockchip: merge Asus Tinker and Tinker S 
Merge sections for Asus Tinker Board and Asus Tinker Board S.

Asus Tinker Board S (Storage) is just a variant of Tinker Board
with an added eMMC chip.

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://patch.msgid.link/20251119-merge-tinker-bindings-v1-1-4072b55750c1@rootcommit.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-20 22:06:24 +01:00
Heiko Stuebner
ce0b84e766 arm64: dts: rockchip: add QNAP TS233 devicetree 
The TS233 is a 2 bay NAS similar to the TS433. Architecture-wise it really
seems to be the same minus the additional PCIe connected components the
TS433 has.

So it just uses two of the SoCs SATA ports and the SoC's gigabit ethernet.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251112214206.423244-6-heiko@sntech.de
 2025-11-20 20:46:32 +01:00
Heiko Stuebner
a576b51e13 dt-bindings: arm: rockchip: add TS233 to RK3568-based QNAP NAS devices 
QNAP builds a number of variants of the RK3568-based NAS design.

Add the 2-bay TS233 variant.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251112214206.423244-5-heiko@sntech.de
 2025-11-20 20:46:32 +01:00
Heiko Stuebner
35202606ea arm64: dts: rockchip: move common qnap tsx33 parts to dtsi 
The NAS series based around the rk3568 contains a number of models with
1-4 drives, that reuse most of the board structure.

Therefore move the shared parts to a dtsi, to be included by the devices.

As the smallest device is the 1-bay TS133, keep everything > slot1 in
the individual devicetree.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251112214206.423244-4-heiko@sntech.de
 2025-11-20 20:46:32 +01:00
Heiko Stuebner
81f1169914 arm64: dts: rockchip: describe mcu eeprom cells on rk3568-ts433 
The MCU's eeprom contains the unit's serial and a number of slots for
mac-addresses. As the MCU seems to be used in different devices, up to
8 mac addresses can live there and the unused slots are actually
initialized with empty mac-address strings like 00:00:00:00:05:09 .

Interestingly on the TS-433, the PCIe ethernet adapter brings its own
memory to hold its mac, and the gmac0 is supposed to get its mac from
the second mac-slot, while the first one stays empty.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251112214206.423244-3-heiko@sntech.de
 2025-11-20 20:46:32 +01:00
Heiko Stuebner
15efa24146 arm64: dts: rockchip: move cpu_thermal node to the correct position 
The &cpu_thermal node was added at the wrong position, move it to
the correctly sorted one.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251112214206.423244-2-heiko@sntech.de
 2025-11-20 20:46:32 +01:00
Michael Riesch
78f316e909 arm64: dts: rockchip: add vicap node to rk356x 
Add the device tree node for the RK356x Video Capture (VICAP) unit.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Link: https://patch.msgid.link/20240220-rk3568-vicap-v15-13-8f4915ee365d@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-16 00:39:47 +01:00
Mehdi Djait
d2da7e98c0 arm64: dts: rockchip: add the vip node to px30 
Add the device tree node for the PX30 Video Input Processor (VIP).

Signed-off-by: Mehdi Djait <mehdi.djait@bootlin.com>
[added cosmetic changes]
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Link: https://patch.msgid.link/20240220-rk3568-vicap-v15-12-8f4915ee365d@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-16 00:39:47 +01:00
Chukun Pan
4e8cb8e032 arm64: dts: rockchip: fixes audio for 100ASK DshanPi A1 
Correct the i2c address of the ES8388 chip and the gpio of hp_det pin.

According to the schematic, the ES8388 chip is connected to the SoC's
sai2 controller instead of sai1, fix it.

Fixes: d809417c5a ("arm64: dts: rockchip: add DTs for 100ASK DShanPi A1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://patch.msgid.link/20251101120010.41729-5-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-15 20:50:29 +01:00
Chukun Pan
eaf661552b arm64: dts: rockchip: fixes vcc3v3_s0 supply for 100ASK DshanPi A1 
From the schematic, the supply of ES8388 chip and the vmmc-supply
of SD card both originate from the VCC3V3_S0 regulator, fix it.

Fixes: d809417c5a ("arm64: dts: rockchip: add DTs for 100ASK DShanPi A1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://patch.msgid.link/20251101120010.41729-4-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-15 20:50:25 +01:00
Chukun Pan
9c79c9e035 arm64: dts: rockchip: fixes ethernet for 100ASK DshanPi A1 
Currently, Ethernet is unusable due to an incorrect PHY address.
This commit fixes this, removes the incorrect 25M clock pinctrl,
and adds the missing PHY supply.

Fixes: d809417c5a ("arm64: dts: rockchip: add DTs for 100ASK DShanPi A1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://patch.msgid.link/20251101120010.41729-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-14 00:02:06 +01:00
Chukun Pan
0b822c59c8 arm64: dts: rockchip: fixes regulator for 100ASK DshanPi A1 
Referencing the schematic [1], correct the names of the USB
regulator, remove these non-existent RTC and UFS regulators.

[1] https://dl.100ask.net/Hardware/MPU/RK3576-DshanPi-A1/DshanPi-A1-RK3576-SCH_V1.1.pdf

Fixes: d809417c5a ("arm64: dts: rockchip: add DTs for 100ASK DShanPi A1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://patch.msgid.link/20251101120010.41729-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-14 00:02:06 +01:00
Johan Jonker
76f4f7e04c arm64: dts: rockchip: correct assigned-clock-rates spelling on 2 boards 
Due to some copy and paste from the manufacturer tree the property
assigned-clock-rate is missing a letter "s". Correct spelling to
reduce dtbs_check output.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://patch.msgid.link/92714b6c-6c0d-4a10-afe4-73ed313c87c0@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:54:37 +01:00
Coia Prant
c1ffe49930 arm64: dts: rockchip: clean up devicetree for 9Tripod X3568 v4 
Fix indentation, remove unused SDIO properties, and drop the GMAC clock
that was used for input direction. The board uses the clock as
output, so the input clock is not needed.

Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://patch.msgid.link/20251107133839.300252-1-coiaprant@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:50:09 +01:00
Chris Morgan
7230cdc1fc arm64: dts: rockchip: Enable USB-C DP Alt for Indiedroid Nova 
Enable the Display Port alt-mode for the USB-C port on the Indiedroid
Nova.

Note that while ROCKCHIP_VOP2_EP_DP0 is defined as 10 we need to
set the address to "a" or else we receive a dtc warning.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251107214724.878955-1-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:48:37 +01:00
Sebastian Reichel
9d856aa1c8 arm64: dts: rockchip: add eMMC CQE support for rk3588 
The RK3588 eMMC controller supports CQE, so add the missing
DT flag.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://patch.msgid.link/20251031-rockchip-emmc-cqe-support-v2-2-958171f5edad@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:46:02 +01:00
Torsten Duwe
3906f85588 arm64: dts: rockchip: enable HDMI audio on Rock 5 ITX 
The Rock 5 ITX only needs enablement for 2 nodes in order to send audio
on HDMI1, the connector closer to the 12V barrel jack and farther from
S/PDIF.  It is sufficient to declare the audio injection as okay, and
to activate I2S6.

Note that for the other HDMI output it is not that trivial, as the video
data there originates from the SoC's DisplayPort output DP1 and is only
converted to HDMI in U7 (an RA620).

Signed-off-by: Torsten Duwe <duwe@lst.de>
[fixed commit subject prefixes]
Link: https://patch.msgid.link/20251110181153.CC62B6732A@verein.lst.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:43:02 +01:00
FUKAUMI Naoki
260316d35c arm64: dts: rockchip: Add eeprom vcc-supply for Radxa ROCK 3C 
The VCC supply for the BL24C16 EEPROM chip found on Radxa ROCK 3C is
vcca1v8_pmu. [1] Describe this supply.

[1] https://dl.radxa.com/rock3/docs/hw/3c/v1400/radxa_rock_3c_v1400_schematic.pdf p.13

Fixes: ee219017dd ("arm64: dts: rockchip: Add Radxa ROCK 3C")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20251112035133.28753-4-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:28:24 +01:00
FUKAUMI Naoki
3069ff1930 arm64: dts: rockchip: Add eeprom vcc-supply for Radxa ROCK 5A 
The VCC supply for the BL24C16 EEPROM chip found on Radxa ROCK 5A is
vcc_3v3_pmu, which is routed to vcc_3v3_s3 via a zero-ohm resistor. [1]
Describe this supply.

[1] https://dl.radxa.com/rock5/5a/docs/hw/radxa_rock5a_V1.1_sch.pdf p.4, p.19

Fixes: 89c880808c ("arm64: dts: rockchip: add I2C EEPROM to rock-5a")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20251112035133.28753-3-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:28:24 +01:00
FUKAUMI Naoki
92e6e0b0e5 arm64: dts: rockchip: Move the EEPROM to correct I2C bus on Radxa ROCK 5A 
The BL24C16 EEPROM chip found on Radxa ROCK 5A is connected to the
i2c0 bus, [1] so move the eeprom node from the i2c2 bus to the i2c0
bus.

[1] Link: https://dl.radxa.com/rock5/5a/docs/hw/radxa_rock5a_V1.1_sch.pdf p.19

Fixes: 89c880808c ("arm64: dts: rockchip: add I2C EEPROM to rock-5a")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20251112035133.28753-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:28:23 +01:00
Heiko Stuebner
4c60942598 arm64: dts: rockchip: use SCMI clock id for gpu clock on rk356x 
Instead of hard-coding 1, use the more descriptive ID from the binding
to reference the SCMI clock for the gpu on rk356x.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251105235408.163282-1-heiko@sntech.de
 2025-11-13 23:25:24 +01:00
Shawn Lin
f151b74ead arm64: dts: rockchip: Remove sdmmc max-frequency on RK3588S EVB1 board 
sdmmc on RK3588S EVB1 could work fine under 200Mhz, no need to limit it
to 150Mhz.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1762844673-123776-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:23:10 +01:00
FUKAUMI Naoki
57bd160290 arm64: dts: rockchip: Remove sdmmc max-frequency for Radxa ROCK 5 ITX/5B/5B+/5T 
Default max-frequency for sdmmc is "200000000"[1]. Remove redundant
definition.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi?h=v6.17#n2013

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20251111071730.126238-4-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:22:35 +01:00
FUKAUMI Naoki
c7a9549ce4 arm64: dts: rockchip: Switch microSD card detect to gpio on Radxa ROCK 5 ITX/5C 
Due to the discussion about cd-gpios and sdmmmc_det pin functionality [1],
it would be better to use cd-gpios for now.

When the sdmmc controller runtime-suspends, the detection logic inside the
controller cannot detect anything anymore, which using the gpio variant
fixes.

The Rock 5B/5B+/5T already uses cd-gpios, so only get the pinctrl added.

[1] https://lore.kernel.org/linux-rockchip/20240912152538.1.I858c2a0bf83606c8b59ba1ab6944978a398d2ac5@changeid/

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
[amended commit description a bit and squashed the pinctrl patch]
Link: https://patch.msgid.link/20251111071730.126238-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-13 23:22:35 +01:00
Coia Prant
156a530ed5 arm64: dts: rockchip: Add devicetree for the 9Tripod X3568 v4 
The 9Tripod X3568 v4 is an RK3568-based SBC, just like the RK3568-EVB.
It always uses soldered connections between the X3568CV2/X3568CV3/X3568CV4 core board
and the X3568bv4 I/O board.

The differences between the core boards
- PCB size, layout
- CPU (RKK3568B2/RK3568J)
- Memory type (DDR4/LPDDR4/LPDDR4X) and size
- eMMC size
- DSI/EDP resistor values
Although the components vary, they maintain full compatibility.

The X3568 board has multiple hardware revisions, and we currently support v4 (I/O board).

Specification:
- SoC: RockChip RK3568 ARM64 (4 cores)
- eMMC: 16-128 GB
- RAM: 2-16 GB
- Power: DC 12V 2A
- Ethernet: 2x YT8521SC RGMII (10/100/1000 Mbps)
- Wireless radio: 802.11b/g/n/ac/ax dual-band
- LED:
  Power: AlwaysOn
  User: GPIO
- Button:
  VOL+: SARADC/0 <35k µV>
  VOL-: SARADC/0 <450k µV>
  Power/Reset: PMIC RK809
- CAN
  CAN/1: 4-pin (PH 2.0)
- PWM
  PWM/4: Backlight DSI/0 DSI/1
  PWM/7: IR Receiver [may not install]
- UART:
  UART/2: Debug TTL - 1500000 8N1 (1.25mm)
  UART/3: TTL (PH 2.0)
  UART/4: TTL (PH 2.0)
  UART/8: AP6275S Bluetooth
  UART/9: TTL (PH 2.0)
- I2C:
  I2C/0: PMIC RK809
  I2C/1: Touchscreen DSI/0 DSI/1
  I2C/4: Camera
  I2C/5: RTC@51 PCF8563
- I2S:
  I2S/0: miniHDMI Sound
  I2S/1: RK809 Audio Codec
  I2S/3: AP6275S Bluetooth Sound
- SDMMC:
  SDMMC/0: microSD (TF) slot
  SDMMC/2: AP6275S SDIO WiFi card
- Camera: 1x CSI
- Video: miniHDMI / DSI0 (MIPI/LVDS) / DSI1 (MIPI/EDP)
- Audio: miniHDMI / MIC on-board / Speaker / SPDIF / 3.5mm Headphones / AP6275S Bluetooth
- USB:
  USB 2.0 HOST x2
  USB 2.0 HOST x3 (4-pin)
  USB 2.0 OTG x1 (shared with USB 3.0 OTG/HOST) [slot may not install]
  USB 3.0 HOST x1
  USB 3.0 OTG/HOST x1
- SATA: 1x SATA 3.0 with Power/4-pin [slot may not install]
- PCIe: 1x PCIe 3.0 x2 (x4 connecter) [power/clock/slot may not install]

Link:
- https://appletsapi.52solution.com/media/X3568V4%E5%BC%80%E5%8F%91%E6%9D%BF%E7%A1%AC%E4%BB%B6%E6%89%8B%E5%86%8C.pdf
- https://blog.gov.cooking/archives/research-ninetripod-x3568-v4-and-flash.html

Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://patch.msgid.link/20251103171702.1518730-4-coiaprant@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:55:21 +01:00
Coia Prant
a12838aab0 dt-bindings: arm: rockchip: Add 9Tripod X3568 series 
This documents 9Tripod X3568 v4 which is a SBC based on RK3568 SoC.

Link: http://www.9tripod.com/showpro.php?id=117
Link: https://appletsapi.52solution.com/media/X3568V4%E5%BC%80%E5%8F%91%E6%9D%BF%E7%A1%AC%E4%BB%B6%E6%89%8B%E5%86%8C.pdf

Signed-off-by: Coia Prant <coiaprant@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20251103171702.1518730-3-coiaprant@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:36:18 +01:00
Coia Prant
25802f8d16 dt-bindings: vendor-prefixes: Add 9Tripod 
Add 9Tripod to the vendor prefixes.

Signed-off-by: Coia Prant <coiaprant@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20251103171702.1518730-2-coiaprant@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:36:18 +01:00
FUKAUMI Naoki
fbf90d1b69 arm64: dts: rockchip: Fix USB Type-C host mode for Radxa ROCK 5B+/5T 
The Radxa ROCK 5B+/5T USB Type-C port supports Dual Role Data and
should also act as a host. However, currently, when acting as a host,
only self-powered devices work.

Since the ROCK 5B+ supports Dual Role Power, set the power-role
property to "dual" and the try-power-role property to "sink". (along
with related properties)

The ROCK 5T should only support the "source" power-role.

This allows the port to act as a host, supply power to the port, and
allow bus-powered devices to work.

Note that on the ROCK 5T, with this patch applied, it has been
observed that some bus-powered devices do not work correctly. Also,
it has been observed that after connecting a device (and the data-role
switches to host), connecting a host device does not switch the
data-role back to the device role. These issues should be addressed
separately.

Note that there is a separate known issue where USB 3.0 SuperSpeed
devices do not work when oriented in reverse. This issue should also be
addressed separately. (USB 2.0/1.1 devices work in both orientations)

Fixes: 67b2c15d8f ("arm64: dts: rockchip: add USB-C support for ROCK 5B/5B+/5T")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20251104085227.820-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:32:21 +01:00
Chris Morgan
c6c76445c3 arm64: dts: rockchip: Fix DMA for Indiedroid Nova Bluetooth 
When the device was first added, there was a problem with the bluetooth
controller that manifested when DMA was enabled for the underlying UART
interface. At some point in the intervening time the problem appears to
have been resolved. Add the UART rx and tx channels back to re-enable
UART.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251105205708.732125-6-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:26:45 +01:00
Chris Morgan
cce837b7a3 arm64: dts: rockchip: Enable HS400 for Indiedroid Nova 
Once the DLL_STRBIN_TAPNUM_DEFAULT is set to the correct value [1], the
workaround to ensure stable eMMC operation is no longer needed. I
have observed testing this that hdparm went from:
"Timing buffered disk reads: 502 MB in  3.00 seconds = 167.14 MB/sec"
to the following:
"Timing buffered disk reads: 832 MB in  3.00 seconds = 277.32 MB/sec"

[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/mmc/host/sdhci-of-dwcmshc.c?id=a28352cf2d2f8380e7aca8cb61682396dca7a991

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251105205708.732125-5-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:26:45 +01:00
Chris Morgan
dfa4f7f5cb arm64: dts: rockchip: enable NPU on Indiedroid Nova 
Enable the NPU on the Indiedroid Nova.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251105205708.732125-4-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:26:45 +01:00
Chris Morgan
318bc4b5ad arm64: dts: rockchip: Add device type for Indiedroid Nova. 
Update the devicetree node to note the device category of the
Indiedroid Nova as an embedded device.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251105205708.732125-2-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:26:45 +01:00
Chris Morgan
8a429c5835 arm64: dts: rockchip: enable NPU on Gameforce Ace 
Enable the NPU on the Gameforce Ace.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://patch.msgid.link/20251106182436.771805-1-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 23:25:20 +01:00
Heiko Stuebner
e06a419eaa arm64: dts: rockchip: add missing clocks for cpu cores on rk356x 
All cpu cores are supplied by the same clock, but all except the first
core are missing that clocks reference - add the missing ones.

Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251103234926.416137-4-heiko@sntech.de
 2025-11-06 00:24:48 +01:00
Heiko Stuebner
ff8912700f arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x 
Instead of hard-coding 0, use the more descriptive ID from the binding
to reference the SCMI clock for the cpu on rk356x.

Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251103234926.416137-3-heiko@sntech.de
 2025-11-06 00:24:48 +01:00
Heiko Stuebner
6c30efe540 Merge branch 'v6.19-shared/clkids' into v6.19-armsoc/dts64 2025-11-06 00:24:17 +01:00
Heiko Stuebner
88b6a93af4 dt-bindings: clock: rk3568: Add SCMI clock ids 
The Trusted Firmware on RK3568 exposes 3 clocks via the SCMI clock
interface. Add descriptive IDs for them.

The clock ids are used in both the older vendor-binary TF-A, as well
as the recently merged upstream SCMI clock implementation.

Link: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/31265
Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251103234926.416137-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-11-06 00:02:47 +01:00
Hsun Lai
d809417c5a arm64: dts: rockchip: add DTs for 100ASK DShanPi A1 
Add device tree for 100ASK DShanPi A1 with Rockchip RK3576 SoC
(4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
basic booting and connectivity.

Link: https://wiki.dshanpi.org/en/docs/DshanPi-A1/intro/

The device contains the following hardware that is tested/working:
 - 32 or 64GB eMMC
 - SDMMC card slot
 - M.2 WiFi slot
 - 4 or 8GB of RAM
 - 2x 1Gbps Ethernet
 - 2x USB 3.2 Gen 1 Type-A ports
 - USB 3.0 port
 - HDMI port

Signed-off-by: Hsun Lai <i@chainsx.cn>
Link: https://patch.msgid.link/77BB123A1F1E3D11+20251014021623.286121-3-i@chainsx.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-10-20 16:55:17 +02:00
Hsun Lai
ff29a83cda dt-bindings: arm: rockchip: Add 100ASK DShanPi A1 
This documents 100ASK DShanPi A1 which is a SBC based on RK3576 SoC.

Link: https://wiki.dshanpi.org/en/docs/DshanPi-A1/intro/

Signed-off-by: Hsun Lai <i@chainsx.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/0601AB836AE5F348+20251014021623.286121-2-i@chainsx.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-10-20 16:55:17 +02:00
Liangbin Lian
deaefeaf3d arm64: dts: rockchip: add LinkEase EasePi R1 
LinkEase EasePi R1 [1] is a high-performance mini router.

Specification:
- Rockchip RK3568
- 2GB/4GB LPDDR4 RAM
- 16GB on-board eMMC
- 1x M.2 key for 2280 NVMe (PCIe 3.0)
- 1x USB 3.0 Type-A
- 1x USB 2.0 Type-C (for USB flashing)
- 2x 1000 Base-T (native, RTL8211F)
- 2x 2500 Base-T (PCIe, RTL8125B)
- 1x HDMI 2.0 Output
- 12v DC Jack
- 1x Power key connected to PMIC
- 2x LEDs (one static power supplied, one GPIO controlled)

[1] https://doc.linkease.com/zh/guide/easepi-r1/hardware.html

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Liangbin Lian <jjm2473@gmail.com>
Link: https://patch.msgid.link/20251014051226.64255-4-jjm2473@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-10-20 16:50:40 +02:00
Liangbin Lian
fc3cd4021e dt-bindings: arm: rockchip: Add LinkEase EasePi R1 
LinkEase EasePi R1 is a high-performance mini router based on RK3568.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Liangbin Lian <jjm2473@gmail.com>
Link: https://patch.msgid.link/20251014051226.64255-3-jjm2473@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-10-20 16:50:40 +02:00