Commit Graph

1137500 Commits

Author SHA1 Message Date
Arnd Bergmann
c83ce31208 Merge tag 'asahi-soc-dt-6.2-v3' of https://github.com/AsahiLinux/linux into soc/dt
Apple SoC DT updates for 6.2 (v3).

One final update for 6.2. This includes:
* L1/L2 cache topology for t8103
* A bunch of typo, style, and minor functional fixes

* tag 'asahi-soc-dt-6.2-v3' of https://github.com/AsahiLinux/linux:
  arm64: dts: apple: t6002: Fix GPU power domains
  arm64: dts: apple: t600x-pmgr: Fix search & replace typo
  arm64: dts: apple: Add t8103 L1/L2 cache properties and nodes
  arm64: dts: apple: Rename dart-sio* to sio-dart*
  arch: arm64: apple: t600x: Use standard "iommu" node name
  arch: arm64: apple: t8103: Use standard "iommu" node name

Link: https://lore.kernel.org/r/488ad4e9-04dc-1774-3bbe-d313ef30f14d@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-08 17:44:12 +01:00
Asahi Lina
67327f1258 arm64: dts: apple: t6002: Fix GPU power domains
On t6002 (M1 Ultra), each die contains a self-contained GPU block.
However, only the coprocessor and global management circuitry of the
first die are used. This is what is represented by the "gpu" PS (the
one in die1 is disabled). Nonetheless, this shared component drives the
processing blocks in both dies, and therefore depends on the AFR fabric
being powered up on both dies.

Add an explicit dependency from the GPU block on die0 to AFR on die1,
next to the existing die0 AFR dependency.

Fixes: fa86294eb355 ("arm64: dts: apple: Add initial t6000/t6001/t6002 DTs")
Signed-off-by: Asahi Lina <lina@asahilina.net>
Reviewed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-12-08 14:37:29 +09:00
Asahi Lina
2aa48e2946 arm64: dts: apple: t600x-pmgr: Fix search & replace typo
It looks like the search-and-replace that happened to add die IDs to
the t600x PMGR tree was a little bit too eager on a comment, and nobody
noticed! Let's fix that.

Fixes: fa86294eb355 ("arm64: dts: apple: Add initial t6000/t6001/t6002 DTs")
Signed-off-by: Asahi Lina <lina@asahilina.net>
Reviewed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-12-08 14:37:16 +09:00
Arnd Bergmann
da060ab86e Merge tag 'qcom-dts-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm DTS updates for 6.2

This introduces support for the OnePlus One, on MSM8974Pro, and properly
marks other Pro devices as compatible thereof. Also on MSM8974, the
description of USB devices and their PHYs are cleaned up.

On the binding side compatibles for recently added ARM and ARM64 boards
are added.

* tag 'qcom-dts-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (102 commits)
  dt-bindings: arm: qcom: Add zombie
  ARM: dts: qcom: msm8974: Add OnePlus One
  dt-bindings: arm: qcom: Document oneplus,bacon device
  ARM: dts: qcom: msm8974: clean up USB nodes
  arm: dts: qcom: use qcom,msm8974pro for pro devices
  dt-bindings: arm: qcom: split MSM8974 Pro and MSM8974
  ARM: dts: qcom: align LED node names with dtschema
  dt-bindings: arm: qcom: Document additional sa8540p device
  dt-bindings: arm: qcom: Add Xperia 5 IV (PDX224)
  dt-bindings: arm: qcom: Document msm8956 and msm8976 SoC and devices
  dt-bindings: arm: add xiaomi,sagit board based on msm8998 chip
  dt-bindings: arm: qcom: add sdm670 and pixel 3a compatible
  dt-bindings: arm: cpus: add qcom kryo 360 compatible
  ARM: dts: qcom-msm8960-cdp: align TLMM pin configuration with DT schema
  ARM: dts: qcom-msm8960: use define for interrupt constants
  dt-bindings: arm: qcom: Document SM6375 & Xperia 10 IV
  ARM: dts: qcom-apq8060: align TLMM pin configuration with DT schema
  ARM: dts: qcom: msm8226: Add MMCC node
  dt-bindings: arm: qcom: Separate LTE/WIFI SKU for sc7280-evoker
  dt-bindings: arm: qcom: Document QDU1000/QRU1000 SoCs and boards
  ...

Link: https://lore.kernel.org/r/20221207153201.3233015-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-07 22:06:03 +01:00
Arnd Bergmann
c24ba5964f Merge tag 'qcom-arm64-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm ARM64 DT updates for 6.2

This introduce description of MSM8956 and MSM8976 and based on this adds
Sony Xperia X and X Compact.

It adds the SA8540P QDrive 3 automotive development board and enables
PCIe on the same.

Add description of the Vision Mezzanine for the RB5 board and the
Navigation Mezzanine for the SDM845 RB3.

SC8280XP adds L3 and DDR scaling support, resulting in good performance
improvement. PCIe and UFS is marked DMA coherent, resolving data
corruption issues. Reference clocks for UFS phy and device are
corrected, to resolve issues seen in combinations with some bootloaders
where it's not sufficient to rely on the bootloader state.

RTC description is added to the SA8295P ADP board.

For SM6115 GPI, PRNG, tsens, WCN, cpufreq, I2C/SPI and display blocks
are added.

On SM6375 QUP blocks are described, allowing the addition of touchscreen
and remoteprocs for ADSP and CDSP are introduced.  Sony Xperia 10 IV
adds description of regulators, allowing enabling SD-card support.

SM8250 Coresight components are described

It introduces support for the Xiaomi Mi 6 on MSM8998 and adds flash LED
to the Xiaomi Redmi 2.

The SDHCI block on SM8350 is described and enabled on Sony Xperia 5 III.

SM8450 sound and Soundwire blocks are described, and enabled on HDK.
CPU supply clock is described, to satisfy the DT binding and the
opp-framework.
Sony Xperia 5 IV support is added, with touchscreen added.

Lastly a range of changes to align DT source with their bindings.

* tag 'qcom-arm64-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (98 commits)
  dt-bindings: iio: adc: qcom,spmi-vadc: fix PM8350 define
  dt-bindings: iio: adc: qcom,spmi-vadc: extend example
  arm64: dts: qcom: sc8280xp: fix UFS DMA coherency
  arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie
  arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCI
  arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCI
  arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCI
  arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCI
  arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCI
  arm64: dts: qcom: sm8450: align MMC node names with dtschema
  arm64: dts: qcom: sc7180-trogdor: use generic node names
  arm64: dts: qcom: sm8450-hdk: add sound support
  arm64: dts: qcom: sm8450: add Soundwire and LPASS
  arm64: dts: qcom: sm8450: add GPR node
  arm64: dts: qcom: sa8540p-ride: enable PCIe support
  arm64: dts: qcom: sm6115: Add smmu fallback to qcom generic compatible
  arm64: dts: qcom: sm6115: Add WCN node
  arm64: dts: qcom: sm6115: Add i2c/spi nodes
  arm64: dts: qcom: sm6115: Add GPI DMA
  arm64: dts: qcom: sm6115: Add mdss/dpu node
  ...

Link: https://lore.kernel.org/r/20221207152554.3232434-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-07 22:01:36 +01:00
Arnd Bergmann
c05188c806 Merge tag 'socfpga_dts_updates_for_v6.2_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt
SoCFPGA dts updates for v6.2, part 2
- Fix dtschema for LED node
- Fix dtschema for i2c-mux

* tag 'socfpga_dts_updates_for_v6.2_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: Fix pca9548 i2c-mux node name
  ARM: dts: socfpga: align LED node names with dtschema
  arm64: dts: altera: align LED node names with dtschema

Link: https://lore.kernel.org/r/20221206214006.590562-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-07 21:48:32 +01:00
Janne Grunau
9ecb7a4b8a arm64: dts: apple: Add t8103 L1/L2 cache properties and nodes
The t8103 CPU nodes are missing the cache hierarchy information. The
cache hierarchy on Arm can not be detected and needs to be described in
DT. The OS scheduler can make use of this information for scheduling
decisions.

The cache size information is based on various articles about the
processors. There's also an L3 system level cache (SLC). It's not
described here because SLCs typically have some MMIO interface which
would need to be described.

Based on Rob Herring's patch adding cache properties and nodes for
t600x.

Link: https://lore.kernel.org/asahi/20221122220619.659174-1-robh@kernel.org/

Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-12-07 10:17:18 +09:00
Hector Martin
63bf0b66dd arm64: dts: apple: Rename dart-sio* to sio-dart*
All the other DARTs are named foo-dart, so let's keep things consistent.

Fixes: 51979fbb7f ("arm64: dts: apple: t600x: Add MCA and its support")
Fixes: 8a3df85ad8 ("arm64: dts: apple: t8103: Add MCA and its support")
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-12-07 10:14:48 +09:00
Janne Grunau
9742350931 arch: arm64: apple: t600x: Use standard "iommu" node name
The PCIe iommu nodes use "dart" as node names. Replace it with the
the standard "iommu" node name as all other iommu nodes.

Fixes: 7b0b0191a2 ("arm64: dts: apple: Add initial t6000/t6001/t6002 DTs")
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-12-07 10:14:00 +09:00
Janne Grunau
56d32c51df arch: arm64: apple: t8103: Use standard "iommu" node name
The PCIe iommu nodes use "dart" as node names. Replace it with the
the standard "iommu" node name as all other iommu nodes.

Fixes: 3c866bb795 ("arm64: dts: apple: t8103: Add PCIe DARTs")
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-12-07 10:14:00 +09:00
Geert Uytterhoeven
88615cfb31 ARM: dts: socfpga: Fix pca9548 i2c-mux node name
"make dtbs_check":

    arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dtb: i2cswitch@70: $nodename:0: 'i2cswitch@70' does not match '^(i2c-?)?mux'
	    From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
    arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dtb: i2cswitch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3', 'i2c@4', 'i2c@5', 'i2c@6', 'i2c@7' were unexpected)
        From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml

Fix this by renaming the PCA9548 node to "i2c-mux", to match the I2C bus
multiplexer/switch DT bindings and the Generic Names Recommendation in
the Devicetree Specification.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-12-06 14:55:51 -06:00
Krzysztof Kozlowski
51f7be212a dt-bindings: iio: adc: qcom,spmi-vadc: fix PM8350 define
The defines from include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h were
changed to take sid argument:

  Error: Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.example.dts:99.28-29 syntax error

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117121307.264550-1-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:33 -06:00
Krzysztof Kozlowski
74e903461b dt-bindings: iio: adc: qcom,spmi-vadc: extend example
Cleanup existing example (generic node name for spmi, use 4-space
indentation) and add example for ADCv7 copied from
Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027143411.277980-2-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:33 -06:00
Johan Hovold
0953777640 arm64: dts: qcom: sc8280xp: fix UFS DMA coherency
The SC8280XP UFS controllers are cache coherent and must be marked as
such in the devicetree to avoid potential data corruption.

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Cc: stable@vger.kernel.org      # 6.0
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221205100837.29212-3-johan+linaro@kernel.org
2022-12-06 11:05:32 -06:00
Owen Yang
300848e05d arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie
Add DT for sc7280-herobrine-zombie

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221205133603.v15.2.I80aa32497bfd67bc8a372c1418ccc443ccf193e4@changeid
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
afa8e18bf6 arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCI
There is no "no-emmc" property, so intention for SD/SDIO only nodes was
to use "no-mmc":

  qcom/sm8250-sony-xperia-edo-pdx206.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204094438.73288-6-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
796d8eaa16 arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCI
There is no "no-emmc" property, so intention for SD/SDIO only nodes was
to use "no-mmc":

  qcom/sdm845-sony-xperia-tama-akatsuki.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204094438.73288-5-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
6e36e6c6b3 arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCI
There is no "no-emmc" property, so intention for SD/SDIO only nodes was
to use "no-mmc":

  qcom/sda660-inforce-ifc6560.dtb: mmc@c084000: Unevaluated properties are not allowed ('no-emmc' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204094438.73288-4-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
f50f5a8177 arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCI
There is no "no-emmc" property, so intention for SD/SDIO only nodes was
to use "no-mmc":

  qcom/sa8155p-adp.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204094438.73288-3-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
1821f483f6 arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCI
There is no "no-emmc" property, so intention for SD/SDIO only nodes was
to use "no-mmc":

  qcom/qrb5165-rb5.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204094438.73288-2-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
4b660ee5d0 arm64: dts: qcom: sm8450: align MMC node names with dtschema
The bindings expect "mmc" for MMC/SDHCI nodes:

  qcom/sm8450-sony-xperia-nagara-pdx223.dtb: sdhci@8804000: $nodename:0: 'sdhci@8804000' does not match '^mmc(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204094438.73288-1-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Krzysztof Kozlowski
b62dfbf8e6 arm64: dts: qcom: sc7180-trogdor: use generic node names
According to Devicetree specification, the node names should be somewhat
generic.  Use "amplifier" for max98360a and "-regulator" for fixed
regulators.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221203161443.97656-1-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Srinivas Kandagatla
2dcd495f15 arm64: dts: qcom: sm8450-hdk: add sound support
Add sound support to SM8450 HDK board.  Tested setup so far is only two
speakers (working) and head-phones (only one channel working).

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202152054.357316-4-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Srinivas Kandagatla
14341e76db arm64: dts: qcom: sm8450: add Soundwire and LPASS
Add Soundwire controllers, Low Power Audio SubSystem (LPASS) devices and
LPASS pin controller.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202152054.357316-3-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Srinivas Kandagatla
38463210a9 arm64: dts: qcom: sm8450: add GPR node
Add Generic Packet Router (GPR) device node with ADSP services.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202152054.357316-2-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:32 -06:00
Brian Masney
b8bf63f8eb arm64: dts: qcom: sa8540p-ride: enable PCIe support
Add the vreg_l11a, pcie3a, pcie3a_phy, and tlmm nodes that are necessary
in order to get PCIe working on the QDrive3.

This patch also increases the width of the ranges property for the PCIe
switch that's found on this platform. Note that this change requires
the latest trustzone (TZ) firmware that's available from Qualcomm as
of November 2022. If this is used against a board with the older
firmware, then the board will go into ramdump mode when PCIe is probed
on startup.

The ranges property is overridden in this sa8540p-ride.dts file since
this is what's used to describe the QDrive3 variant with dual SoCs.
There's another variant of this board that only has a single SoC where
this change is not applicable, and hence why this specific change was
not done in sa8540p.dtsi.

These changes were derived from various patches that Qualcomm
delivered to Red Hat in a downstream kernel.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202120918.2252647-1-bmasney@redhat.com
2022-12-06 11:05:32 -06:00
Adam Skladowski
58a9e83605 arm64: dts: qcom: sm6115: Add smmu fallback to qcom generic compatible
Add fallback to generic qcom mmu-500 implementation.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-13-a39.skl@gmail.com
2022-12-06 11:05:32 -06:00
Adam Skladowski
245bb9a37c arm64: dts: qcom: sm6115: Add WCN node
Add WCN node to allow using wifi module.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-12-a39.skl@gmail.com
2022-12-06 11:05:32 -06:00
Adam Skladowski
323647d32e arm64: dts: qcom: sm6115: Add i2c/spi nodes
Add I2C/SPI nodes for SM6115.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-11-a39.skl@gmail.com
2022-12-06 11:05:32 -06:00
Adam Skladowski
1586c57935 arm64: dts: qcom: sm6115: Add GPI DMA
Add GPI DMA node which will be wired to i2c/spi/uart.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-10-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Adam Skladowski
705e50427d arm64: dts: qcom: sm6115: Add mdss/dpu node
Add mdss and dpu node to enable display support on SM6115.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-9-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Adam Skladowski
884f95411b arm64: dts: qcom: sm6115: Add dispcc node
Add display clock controller to allow controlling display related clocks.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Pushed dsi_phy reference into next patch]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-8-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Adam Skladowski
d18c007796 arm64: dts: qcom: sm6115: Add rpm-stats node
Add rpm stats node.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-7-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Adam Skladowski
fc676b15c0 arm64: dts: qcom: sm6115: Add PRNG node
Add a node for the PRNG to enable hw-accelerated pseudo-random number
generation.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-6-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Adam Skladowski
7b74cba6b1 arm64: dts: qcom: sm6115: Add TSENS node
Add nodes required for TSENS block using the common qcom,tsens-v2 binding.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-5-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Adam Skladowski
aff96846c6 arm64: dts: qcom: sm6115: Add cpufreq-hw support
Add cpufreq-hw node and assign qcom,freq-domain properties
to CPUs to enable CPU clock scaling.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130200950.144618-4-a39.skl@gmail.com
2022-12-06 11:05:31 -06:00
Lin, Meng-Bo
8b607c5765 arm64: dts: qcom: msm8916-wingtech-wt88047: Add flash LED
WT88047 uses OCP 8110 Flash LED driver. Add it to the device tree.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221128051512.125148-1-linmengbo0689@protonmail.com
2022-12-06 11:05:31 -06:00
Krzysztof Kozlowski
cb3920b50b arm64: dts: qcom: align LED node names with dtschema
The node names should be generic and DT schema expects certain pattern:

  qcom/msm8998-oneplus-cheeseburger.dtb: leds: 'button-backlight' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
  qcom/sc7180-trogdor-coachz-r1.dtb: pwmleds: 'keyboard-backlight' does not match any of the regexes: '^led(-[0-9a-f]+)?$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221125144209.477328-1-krzysztof.kozlowski@linaro.org
2022-12-06 11:05:31 -06:00
Parikshit Pareek
6be310347c arm64: dts: qcom: add SA8540P ride(Qdrive-3)
Introduce the Qualcomm SA8540P ride automotive platform, also known as
Qdrive-3 development board.

This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
regulators, debug UART, PMICs, remoteprocs and USB.

The SA8540P ride contains four PM8450 PMICs. A separate DTSI file has
been created for PMIC, so that it can be used for future SA8540P based
boards.

Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Tested-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Tested-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221118025158.16902-3-quic_ppareek@quicinc.com
2022-12-06 11:05:31 -06:00
Konrad Dybcio
15245c93d3 arm64: dts: qcom: sm8450-nagara: Add gpio line names for TLMM
Sony ever so graciously provides GPIO line names in their downstream
kernel (though sometimes they are not 100% accurate and you can judge
that by simply looking at them and with what drivers they are used).

Add these to the PDX223&224 DTSIs to better document the hardware.

Diff between 223 and 224:
< 	gpio-line-names = "NC", /* GPIO_0 */
< 			  "NC",
< 			  "NC",
< 			  "NC",
> 	gpio-line-names = "TELE_SPI_MISO", /* GPIO_0 */
> 			  "TELE_SPI_MOSI",
> 			  "TELE_SPI_CLK",
> 			  "TELE_SPI_CS_N",
< 			  "PM8010_2_RESET_N",
> 			  "NC",
< 			  "NC",
> 			  "UWIDEC_PWR_EN",
< 			  "TOF_RST_N",
> 			  "NC"
< 			  "QLINK1_REQ",
< 			  "QLINK1_EN", /* GPIO_160 */
< 			  "QLINK1_WMSS_RESET_N",
> 			  "NC",
> 			  "NC", /* GPIO_160 */
> 			  "NC",
The tele lens setup is different on 1 IV and 5 IV and power wiring
is different for some lenses, so it makes sense. As for QLINK, no
idea.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117141613.19942-1-konrad.dybcio@linaro.org
2022-12-06 11:05:31 -06:00
Konrad Dybcio
d132d9e7c4 arm64: dts: qcom: msm8994: Drop spi-max-frequency from SPI host
This is a device property, not a bus host one.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117105845.13644-1-konrad.dybcio@linaro.org
2022-12-06 11:05:31 -06:00
Manivannan Sadhasivam
8a8845e07b arm64: dts: qcom: sm8450: Supply clock from cpufreq node to CPUs
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
to the CPU cores. But this relationship is not represented in DTS so far.

So let's make cpufreq node as the clock provider and CPU nodes as the
consumers. The clock index for each CPU node is based on the frequency
domain index.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117053145.10409-3-manivannan.sadhasivam@linaro.org
2022-12-06 11:05:31 -06:00
Bryan O'Donoghue
16b24fe54f arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add vision mezzanine
The Vision Mezzanine for the RB5 ships with an imx577 and ov9282 populated.
Other sensors and components may be added or stacked with additional
mezzanines.

Enable the IMX577 on the vision mezzanine.

An example media-ctl pipeline for the imx577 is:

media-ctl --reset
media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'

yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-8-bryan.odonoghue@linaro.org
2022-12-06 11:05:31 -06:00
Bryan O'Donoghue
3c5aa4c758 arm64: dts: qcom: sm8250: camss: Define ports and ports address/size cells
Define the set of possible ports, one for each CSI PHY along with the port
address and size cells @ the SoC dtsi level.

Suggested-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-7-bryan.odonoghue@linaro.org
2022-12-06 11:05:31 -06:00
Bryan O'Donoghue
64cb4a4472 arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Add navigation mezzanine dts
Move the dts data for the rb3 navigation mezzanine into its own dts file.

Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-6-bryan.odonoghue@linaro.org
2022-12-06 11:05:31 -06:00
Bryan O'Donoghue
5ceaa402f4 arm64: dts: qcom: sdm845-db845c: Use okay not ok, disabled not disable for status
Use preferred "ok" not "okay".
Use preferred status "disabled" instead of "disable".

There's no functional change here so no Fixes has been applied.

Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-5-bryan.odonoghue@linaro.org
2022-12-06 11:05:31 -06:00
Bryan O'Donoghue
693c65e2bd arm64: dts: qcom: sdm845-db845c: Drop redundant reg = in port
The reg for the port is specified in the dtsi. Remove from the db845c dts.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-4-bryan.odonoghue@linaro.org
2022-12-06 11:05:31 -06:00
Bryan O'Donoghue
dacfbacc88 arm64: dts: qcom: sdm845-db845c: Drop redundant address-cells, size-cells declaration
sdm845.dtsi camss already defines the address-cells and size-cells for
camss, no need to replicate in sdm845-db845c.dts.

Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-3-bryan.odonoghue@linaro.org
2022-12-06 11:05:30 -06:00
Bryan O'Donoghue
0ddcea2f76 arm64: dts: qcom: sdm845: Define the number of available ports
The number of available ports is SoC specific so we should define it in the
SoC dtsi. For the case of the sdm845 that is 4 CSI PHYs => four ports.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-2-bryan.odonoghue@linaro.org
2022-12-06 11:05:30 -06:00
Konrad Dybcio
1aaa077274 arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2
Adjust regulators, add required pin setup and finally enable SDHCI2
to get the SD Card slot going on Sagami Xperias.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116123612.34302-4-konrad.dybcio@linaro.org
2022-12-06 11:05:30 -06:00