arm64: tegra: Device tree changes for v5.7-rc1
These changes add support for the XUSB pad controller, as well as the
XUSB controller on Tegra194. Furthermore, USB device mode is supported
across Tegra210 and Tegra186 boards. PCIe endpoint mode support is added
for the Jetson AGX Xavier platform.
Various minor fixes eliminate warnings on boot related to missing power
supplies for some devices.
* tag 'tegra-for-5.7-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform
arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
arm64: tegra: Add ethernet alias on Jetson TX1
arm64: tegra: Populate LP8557 backlight regulator
arm64: tegra: Fix Tegra186 SOR supply
arm64: tegra: Add EEPROM supplies
arm64: tegra: Enable I2C controller for EEPROM
arm64: tegra: smaug: Change clk_out_2 provider to PMC
arm64: tegra: Add clock-cells property to Tegra PMC node
arm64: tegra: Enable XUDC node on Jetson Nano
arm64: tegra: Update OTG port entries for Jetson Nano
arm64: tegra: Enable XUDC node on Jetson TX2
arm64: tegra: Add XUDC node for Tegra186
arm64: tegra: Enable XUDC on Jetson TX1
arm64: tegra: Add XUDC node for Tegra210
arm64: tegra: Update OTG port entries for Jetson TX2
arm64: tegra: Update OTG port entries for Jetson TX1
arm64: tegra: Enable XUSB host in P2972-0000 board
arm64: tegra: Add XUSB and pad controller on Tegra194
arm64: tegra: Fix Tegra194 PCIe compatible string
Link: https://lore.kernel.org/r/20200313165848.2915133-8-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: tegra: Device tree changes for v5.7-rc1
Minor fixes and additions for 32-bit Tegra SoC device trees.
* tag 'tegra-for-5.7-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Update sound node clocks in device tree
ARM: tegra: Add clock-cells property to PMC
ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl
Link: https://lore.kernel.org/r/20200313165848.2915133-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dt-bindings: Changes for v5.7-rc1
New IDs are added for clocks that are controlled by the PMC. This
replaces older IDs that were erroneously provided by the clock and reset
controller.
This also adds device tree bindings for XUSB pad controller support on
Tegra194 as well as USB role switching on NVIDIA Tegra SoCs.
* tag 'tegra-for-5.7-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
dt-bindings: phy: tegra-xusb: Add usb-role-switch
dt-bindings: phy: tegra: Add Tegra194 support
dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: clock: tegra: Add IDs for OSC clocks
Link: https://lore.kernel.org/r/20200313165848.2915133-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 DT updates for v5.3, round 1
Highlights:
----------
- Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
board. It is based on stm32mp157c SoC.
- Add OTG full support on stm32mp15.
- Fix issues seen during yaml validation on stpmic and stmfx.
- Add i2c power/wakeup support on stm32mp15.
- Add card detect on sdcard on stm32mp boards
* tag 'stm32-dt-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits)
ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board
ARM: dts: stm32: Correct stmfx node name on stm32746g-eval board
ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1
ARM: dts: stm32: add USB OTG pinctrl to stm32mp15
ARM: dts: stm32: add USB OTG full support on stm32mp151
ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node
ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board
...
Link: https://lore.kernel.org/r/ded09d01-df47-9572-4679-34669bff8916@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Renesas DT binding updates for v5.7
- Document support for the M3ULCB board with R-Car M3-W+.
* tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Add M3ULCB with R-Car M3-W+
Link: https://lore.kernel.org/r/20200313154304.1636-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Renesas ARM64 DT updates for v5.7 (take two)
- Thermal support for R-Car M3-W+,
- Support for the M3ULCB board with R-Car M3-W+,
- CPUIdle support for R-Car M3-N and E3,
- Display support for the HiHope RZ/G2M board,
- A minor fix.
* tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display
arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores
arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores
arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address
arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+
arm64: dts: renesas: r8a77961: Add thermal nodes
Link: https://lore.kernel.org/r/20200313154304.1636-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.7, please pull the following:
- Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS
- Nicolas moves the eMMC2 controller into its separate node in order for
platform firmware to perform the necessary "dma-ranges" property
patching based on the chip revision since the eMMC controller has
different addressing constraints.
- Florian convers a whole bunch of Broadcom boards bindings from text to
YAML.
* tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux:
dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'
dt-bindings: arm: bcm: Convert Vulcan to YAML
dt-bindings: arm: bcm: Convert BCM11351 to YAML
dt-bindings: arm: bcm: Convert BCM4708 to YAML
dt-bindings: arm: bcm: Convert BCM23550 to YAML
dt-bindings: arm: bcm: Convert BCM21664 to YAML
dt-bindings: arm: bcm: Convert Stingray to YAML
dt-bindings: arm: bcm: Convert Northstar 2 to YAML
dt-bindings: arm: bcm: Convert Northstar Plus to YAML
dt-bindings: arm: bcm: Convert Hurricane 2 to YAML
dt-bindings: arm: bcm: Convert Cygnus to YAML
ARM: dts: bcm2711: Move emmc2 into its own bus
ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels
Link: https://lore.kernel.org/r/20200311212012.9418-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps for v5.7 merge window
Few device tree changes for omaps for v5.7 to configure omap5
AESS module and to add idle_states for am335x and am437x cpuidle.
* tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am4372: Add idle_states for cpuidle
ARM: dts: am33xx: Add idle_states for cpuidle
ARM: dts: Configure omap5 AESS
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Versatile DTS updates for the v5.7 series take one:
- Schema validation for the top level of all ARM reference
designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.
* tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM/arm64: dts: Rename SMB bus to just bus
dt-bindings: arm: Drop the non-YAML bindings
dt-bindings: arm: Add Versatile Express and Juno YAML schema
dt-bindings: arm: Add RealView YAML schema
dt-bindings: arm: Add Versatile YAML schema
dt-bindings: arm: Add Integrator YAML schema
ARM: dts: RealView: Fix the name of the SoC node
ARM: dts: Versatile: Use syscon as node name for IB2
ARM: dts: integratorap: Remove top level dma-ranges
Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
On those boards, as stated in schematics files, the regulator used for IOs
is VDD. It was wrongly set to v3v3.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
On STM32MP1 DK1, DK2, ED1 and EV1 boards, there is only a micro SD socket.
This is also the case on Avenger board.
They don't support the Write Protect pin.
The disable-wp is then added in the SD-cards sdmmc1 nodes.
This avoids executing some code and a warning during driver probe.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The broken-cd properties are replaced with cd-gpios, with the correct
GPIO to detect the card insertion. The GPIO lines require a pull-up.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Remove unused properties from stpmic node.
The issues have been detected by running dtbs_check.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp157c-ed1 board.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes
of the stm32mp157c-ev1 board.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp15xx-dkx.dtsi
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
On DK boards, all I2C4 bus slaves supports I2C Fast Mode hence setting
the bus frequency to 400 KHz.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
On this board, the I2C4 bus has only a single slave (pmic) which
supports I2C Fast Mode hence setting bus frequency to 400 KHz.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were
previously erroneously provided by the clock and reset controller.
clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210.
This patch updates device tree sound node to use clk_out_1 from the PMC
provider as mclk and uses assigned-clock properties to specify clock
parents for clk_out_1 and extern1.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock.
These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.
This patch adds #clock-cells property with 1 clock specifier to the
Tegra PMC node in device tree.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
On Jetson TK1 USB 2-0 port is controlled by phy-tegra-usb driver
rather than padctl driver. Remove the entry for the same.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device-tree binding documentation for the XUSB device mode controller
present on Tegra210 and Tegra186 SoC. This controller supports the USB 3.0
specification.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add usb-role-switch property for Tegra210 and Tegra186 platforms. This
entry is used by XUSB pad controller driver to register for role changes
for OTG/Peripheral capable USB 2 ports.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Extend the bindings to cover the set of features found in Tegra194.
Note that, technically, there are four more supplies connected to the
XUSB pad controller (DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL)
, but the power sequencing requirements of Tegra194 require these to be
under the control of the PMIC.
Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, it
is possible for some platforms have long signal trace that could not
provide sufficient electrical environment for Gen 2 speed. This patch
adds a "maximum-speed" property to usb3 ports which can be used to
specify the maximum supported speed for any particular USB 3.1 port.
For a port that is not capable of SuperSpeedPlus, "maximum-speed"
property should carry "super-speed".
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add endpoint mode support for PCIe C5 controller in P2972-0000 platform
with information about supplies, PHY, PERST GPIO and GPIO that controls
PCIe reference clock coming from the host system.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Adding this alias for the Ethernet interface on Jetson TX1 allows the
bootloader to pass the MAC address to the Linux kernel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The following warning is observed on Jetson TX1 platform because the
supply regulator is not specified for the backlight.
WARNING KERN lp855x 0-002c: 0-002c supply power not found, using dummy regulator
The backlight supply is provided by the 3.3V SYS rail and so add this
as the supply for the backlight.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The following warning is observed on the Jetson TX2 platform ...
WARNING KERN tegra-sor 15540000.sor: 15540000.sor supply \
vdd-hdmi-dp-pll not found, using dummy regulator
The problem is caused because the regulator for the SOR device is
missing the '-supply' suffix in Device-Tree. Therefore, add the
'-supply' suffix to fix this warning.
Fixes: 3fdfaf8718 ("arm64: tegra: Enable DP support on Jetson TX2")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The following warning is observed on Jetson TX1, Jetson Nano and Jetson
TX2 platforms because the supply regulators are not specified for the
EEPROMs.
WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator
WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator
For both of these platforms the EEPROM is powered by the main 1.8V
supply rail and so populate the supply for these devices to fix these
warnings.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit a5b6b67364 ("arm64: tegra: Add ID EEPROM for Jetson TX1
module") populated the EEPROM on the Jetson TX1 module, but did not
enable the corresponding I2C controller. Enable the I2C controller so
that this EEPROM can be accessed.
Fixes: a5b6b67364 ("arm64: tegra: Add ID EEPROM for Jetson TX1 module")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
clk_out_2 is a clock provided by the PMC, rather than the clock and
reset controller, as previously erroneously defined.
This patch changes clk_out_2 provider to PMC and uses corresponding
PMC clock ID for clk_out_2.
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra132 and Tegra210 PMC blocks have clk_out_1, clk_out_2, clk_out_3,
and a blink clock as a part of the PMC.
These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.
Clock IDs for these clocks are defined in the PMC dt-bindings.
This patch updates the device tree to include the PMC dt-bindings header
and adds the #clock-cells property with one clock specifier to the PMC
node.
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add usb-role-switch entry to peripheral USB port and add corresponding
connector details.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add usb-role-switch entry to OTG USB port and add corresponding
connector details.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Populate OTG vbus regulator and add usb-role-switch entry to USB 2-0
port and corresponding connector details.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
