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Author SHA1 Message Date
Andre Przywara
c1e72763ae dt-bindings: pinctrl: sunxi: allow vcc-pi-supply 
The Allwinner H616 SoC contains a VCC_PI pin, which supplies the voltage
for GPIO port I.
Extend the range of supply port names to include vcc-pi-supply to cover
that.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220708105235.3983266-5-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-11 10:47:34 +02:00
Andre Przywara
ee84131b43 dt-bindings: pinctrl: sunxi: Make interrupts optional 
The R_PIO pinctrl device on the Allwinner H616 SoC does not have an
interrupt (it features only two pins).
However the binding requires at least naming one upstream interrupt,
plus the #interrupt-cells and interrupt-controller properties.

Drop the unconditional requirement for the interrupt properties, and
make them dependent on being not this particular pinctrl device.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220708105235.3983266-3-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-11 10:46:51 +02:00
Stephan Gerhold
4528a0cf79 pinctrl: qcom: Add pinctrl driver for MSM8909 
Make it possible to control pins using the TLMM block in the MSM8909 SoC
by adding the necessary definitions for GPIOs, groups and functions.

The driver is originally taken from the msm-4.9 release [1] from Qualcomm,
but cleaned up significantly with several fixes and clarifications.

[1]: https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LF.UM.8.7-22500-8x09.0/drivers/pinctrl/qcom/pinctrl-msm8909.c

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220628145502.4158234-3-stephan.gerhold@kernkonzept.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-11 10:26:52 +02:00
Stephan Gerhold
c249ec7ba1 dt-bindings: pinctrl: Add DT schema for qcom,msm8909-tlmm 
Document the "qcom,msm8909-tlmm" compatible for the TLMM/pin control
block in the MSM8909 SoC, together with the allowed GPIOs and functions.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220628145502.4158234-2-stephan.gerhold@kernkonzept.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-11 10:26:52 +02:00
Jianlong Huang
e2961cd685 pinctrl: starfive: Serialize adding groups and functions 
The pinctrl dt_node_to_map method may be called in parallel which leads
us to call pinconf_generic_add_group and pinconf_generic_add_function
in parallel. This is not supported though and leads to errors, so add a
mutex to serialize these calls.

Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20220627085333.1774396-1-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-11 10:22:57 +02:00
Linus Walleij
04131ae29b Merge tag 'renesas-pinctrl-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel 
pinctrl: renesas: Updates for v5.20 (take two)

  - Add support for the RZ/V2M and R-Car V4H SoCs,
  - Miscellaneous fixes and improvements.
 2022-07-10 01:10:14 +02:00
Basavaraj Natikar
6011c7e9c0 pinctrl: amd: Remove contact information 
Remove contact information.

Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/r/20220613064127.220416-4-Basavaraj.Natikar@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-10 01:09:21 +02:00
Basavaraj Natikar
b8c824a869 pinctrl: amd: Don't save/restore interrupt status and wake status bits 
Saving/restoring interrupt and wake status bits across suspend can
cause the suspend to fail if an IRQ is serviced across the
suspend cycle.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Fixes: 79d2c8bede ("pinctrl/amd: save pin registers over suspend/resume")
Link: https://lore.kernel.org/r/20220613064127.220416-3-Basavaraj.Natikar@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-10 01:09:21 +02:00
Basavaraj Natikar
21793d228c pinctrl: amd: Use devm_platform_get_and_ioremap_resource 
Use devm_platform_get_and_ioremap_resource() to simplify code.

Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/r/20220613064127.220416-2-Basavaraj.Natikar@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-10 01:09:21 +02:00
Linus Walleij
5495d1636b Merge tag 'intel-pinctrl-v5.20-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel 
intel-pinctrl for v5.20-1

* Update MAINTAINERS to set the Intel pin control status to Supported
* Switch Intel pin control drivers to use struct pingroup

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Switch to to embedded struct pingroup

cherryview:
 -  Switch to to embedded struct pingroup

intel:
 -  Add Intel Meteor Lake pin controller support
 -  Drop no more used members of struct intel_pingroup
 -  Switch to to embedded struct pingroup
 -  Embed struct pingroup into struct intel_pingroup

lynxpoint:
 -  Switch to to embedded struct pingroup

MAINTAINERS:
 -  Update Intel pin control to Supported

Merge branch 'ib-v5.20-amd-pinctrl':
 - Merge branch 'ib-v5.20-amd-pinctrl'

merrifield:
 -  Switch to to embedded struct pingroup
 2022-07-10 01:07:08 +02:00
Robert Marko
7542766e78 pinctrl: qcom: spmi-gpio: make the irqchip immutable 
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.

Following this change the following warning is now observed for the SPMI
PMIC pinctrl driver:
gpio gpiochip1: (200f000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the SPMI PMIC pinctrl driver immutable.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20220624195112.894916-1-robimarko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-07-10 01:04:51 +02:00
Kuninori Morimoto
36611d28f5 pinctrl: renesas: r8a779g0: Add missing MODSELx for AVBx 
AVB1 needs MODSEL6, AVB2 needs MODSEL5 settings.
This patch adds missing MODSELx settings for the affected pins.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87k08xsj81.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
36fb7b8af5 pinctrl: renesas: r8a779g0: Add missing MODSELx for TSN0 
TSN0 needs MODSEL4 settings.
This patch adds missing MODSELx settings for the affected pins.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87letdsj8e.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
b811062e5f pinctrl: renesas: r8a779g0: Add missing ERROROUTC_A 
This patch adds missing ERROROUTC_A settings.
Current existing ERROROUTC should be _B, this patch tidies it up.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87mtdtsj8m.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
c606c2fde2 pinctrl: renesas: r8a779g0: Add missing PWM 
R-Car V4H has PWM/PWM_A/PWM_B, but current PFC setting is mixed.
This patch adds missing PWM settings, and tidies these up.

According to Document, GP3_14 Function4 is PWM2_A,
but we can't select it at P1SR3[27:24].
This patch just ignore it for now.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87o7y9sj90.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
1c2646b5ce pinctrl: renesas: r8a779g0: Add missing FlexRay 
This patch adds missing FlexRay pins.
Because Document (Rev.0.51) has 2x FXR_TXENA/B pin with no suffix (_A, _B),
this patch names them as _X.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87pmipsj9a.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
85a9cbe4c5 pinctrl: renesas: r8a779g0: Add missing TPU0TOx_A 
This patch adds missing TPU0TOx_A.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87r135sj9j.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
c2b4b2cd63 pinctrl: renesas: r8a779g0: Add missing CANFD5_B 
This patch adds missing CANFD5_B.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87sfnlsj9t.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
9c151c2be9 pinctrl: renesas: r8a779g0: Add missing SCIF1_X 
This patch adds missing SCIF1_X.
Because Document (Rev.0.51) has 2x SCIF1 with no suffix (_A, _B),
this patch names it as _X.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87tu81sja1.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
49e4697656 pinctrl: renesas: r8a779g0: Add missing SCIF3 
R-Car V4H has SCIF3 and SCIF3_A, but current PFC setting is mixed.
This patch cleans up SCIF3/SCIF3_A, based on Rev.0.51.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87v8shsja7.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
cf4f789184 pinctrl: renesas: r8a779g0: Add missing HSCIF1_X 
This patch adds missing HSCIF1.
Because Document (Rev.0.51) has 2x HSCIF1 with no suffix (_A, _B),
this patch names it as _X.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87wncxsjah.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
213b713255 pinctrl: renesas: r8a779g0: Add missing HSCIF3_A 
This patch adds missing HSCIF3_A.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87y1xdsjar.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
1b23d8a478 pinctrl: renesas: r8a779g0: Add missing IRQx_A/IRQx_B 
This patch adds missing IRQx_A/IRQx_B, and tidies up existing IRQs.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87zghtsjb4.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
0df46188a5 pinctrl: renesas: r8a779g0: Add missing TCLKx_A/TCLKx_B/TCLKx_X 
This patch adds missing TCLKx_A/TCLKx_B/TCLKx_X.

Because Document (Rev.0.51) has 2x TCLK3/TCLK4 with no suffix (_A, _B),
this patch names them as _X.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/871qv5txvt.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
475425ee38 pinctrl: renesas: r8a779g0: Tidyup POC1 voltage 
According to Rev.0.51 datasheet 004_R-CarV4H_pin_function.xlsx,
GP1_23 - GP1_28 are 1.8/3.3V.  But they are not on Table 7.28.
According to the HW team, there are no bits assigned.
This patch follows HW team's comment.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/8735fltxwg.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
5a494f02b8 pinctrl: renesas: r8a779g0: Tidy up ioctrl_regs 
Remove POC2 which is not documented, and remove TD0SEL3 which is not
needed.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/874k01txy9.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:37 +02:00
Kuninori Morimoto
b279b54b50 pinctrl: renesas: r8a779g0: Remove unused MOD_SELx definitions 
Current R-Car V4H PFC code has many MOD_SELx definitions with all 0.
But these have no meaning.  This patch removes them.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/875ykhtxym.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Kuninori Morimoto
1204bc463b pinctrl: renesas: r8a779g0: Remove unused IPxSRx definitions 
Current R-Car V4H PFC code has many IPxSRx definitions with all 0.
But these have no meaning.  This patch removes them.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/877d4xtxyv.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Kuninori Morimoto
aa83be7c8d pinctrl: renesas: r8a779g0: Remove unused NOGP definitions 
Current R-Car V4H PFC code has many NOGP definitions.  But these are not
used, and they are different from original usage.  This patch removes
them.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/878rpdtxz8.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Kuninori Morimoto
42cbd16e7c pinctrl: renesas: r8a779g0: Fixup MODSEL8 
MODSEL8 controls I2C vs. GPIO modes, and the Datasheet (Rev.0.51) is
indicating that I2C needs 1.  But we should use 0 for all cases in
reality.  New Datasheet should be updated.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87a69ttxzg.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Phong Hoang
050442ae4c pinctrl: renesas: r8a779g0: Add pins, groups and functions 
This patch adds SCIF, I2C, EthernetAVB, HSCIF, MMC, QSPI, MSIOF, PWM,
CAN-FD, Ethernet-TSN, PCIe pins, groups, and functions.

This patch was created based on the Rev.0.51 datasheet.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
Signed-off-by: CongDang <cong.dang.xn@renesas.com>
Signed-off-by: Kazuya Mizuguch <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
[Morimoto: merged above patches into one, cleanup white space, sort modules alphabetically, fixup comments]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87bku9ty0b.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
LUU HOAI
ad9bb2fec6 pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support 
This patch adds initial pinctrl support for the R-Car V4H (R8A779G0)
SoC, including bias, drive strength and voltage control.

This patch was created based on the Rev.0.51 datasheet.

Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Morimoto: merge Kihara-san's MODSEL8 fixup patch, cleanup white space, care about reserved bits on each configs, fixup comments, etc.]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87czepty0j.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Kuninori Morimoto
665f77eb0d pinctrl: renesas: Add PORT_GP_CFG_13 macros 
Add PORT_GP_CFG_13() and PORT_GP_13() helper macros, to be used by the
r8a779g0 subdriver.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87edz5ty0r.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Kuninori Morimoto
1929683e5b dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support 
Document Pin Function Controller (PFC) support for the Renesas R-Car V4H
(R8A779G0) SoC.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87fsjlty13.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Phil Edworthy
92a9b82525 pinctrl: renesas: Add RZ/V2M pin and gpio controller driver 
Add support for pin and gpio controller driver for RZ/V2M SoC.
Based on the RZ/G2L driver.

Note that the DETDO and DETMS dedicated pins are currently not
documented in the HW manual as to which pin group they are in.
HW team has since said that the output level of 1.8V I/O group 4
(for MD0-7, and debugger) is the same as the 1.8V I/O group 3.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220624084833.22605-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-05 09:12:36 +02:00
Phil Edworthy
34e3b69b1e dt-bindings: pinctrl: Add DT bindings for Renesas RZ/V2M pinctrl 
Add device tree binding documentation and header file for Renesas
RZ/V2M pinctrl.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220624084833.22605-2-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-07-01 09:04:40 +02:00
Andy Shevchenko
25097de7b2 pinctrl: intel: Add Intel Meteor Lake pin controller support 
This driver adds pinctrl/GPIO support for Intel Meteor Lake. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
 2022-06-30 17:09:18 +03:00
Samuel Holland
d4c0b614b5 pinctrl: axp209: Support the AXP221/AXP223/AXP809 variant 
These PMICs each have 2 GPIOs with the same register layout as AXP813,
but without an ADC function. They all fall back to the AXP221 compatible
string, so only that one needs to be listed in the driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20220621034224.38995-4-samuel@sholland.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-30 14:05:57 +02:00
Samuel Holland
f9f991e149 dt-bindings: gpio: Add AXP221/AXP223/AXP809 compatibles 
These PMICs each have 2 GPIOs with the same register layout as AXP813,
but without an ADC function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220621034224.38995-2-samuel@sholland.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-30 14:04:47 +02:00
Srinivasa Rao Mandadapu
bb2c2fe7b8 pinctrl: qcom: sc7280: Fix compile bug 
Fix the compilation error, caused by updating constant variable.
Hence remove redundant constant variable, which is no more useful
as per new design.

The issue is due to some unstaged changes. Fix it up.

Fixes: 36fe26843d ("pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets")

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1656489290-20881-1-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-30 14:00:53 +02:00
Geert Uytterhoeven
2f805cba10 pinctrl: renesas: r8a779f0: Remove unused POC2 
The POWER Condition Control Register 2 (POC2) is unused, and the
documentation does not define any valid bits.  Remove it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d8a9ea39b49d24e39f4da3f00b64bce34016887d.1655301529.git.geert+renesas@glider.be
 2022-06-29 15:53:04 +02:00
Geert Uytterhoeven
a71a62dd5e dt-bindings: pinctrl: renesas: Remove spaces before #define 
Remove spaces at the beginning of lines with #defines.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/5188ef93a911ce3781b16530fdebbf0f0af462b6.1655301264.git.geert+renesas@glider.be
 2022-06-29 15:21:58 +02:00
Krzysztof Kozlowski
b1f359711a dt-bindings: pinctrl: nuvoton,wpcm450-pinctrl: align key node name 
gpio-keys schema requires keys to have more generic name.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220616005333.18491-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 21:26:21 +02:00
Nícolas F. R. A. Prado
c3f464542b dt-bindings: pinctrl: mt8192: Add RSEL values to bias-pull-{up,down} 
Commit fe44e49840 ("pinctrl: mediatek: add rsel setting on mt8192")
added RSEL bias type definition for some pins on mt8192. In order to be
able to configure the bias on those pins, add the RSEL values in the
bias-pull-up and bias-pull-down properties in the binding.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220627173209.604400-1-nfraprado@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 16:15:36 +02:00
Krzysztof Kozlowski
3eb12bced6 pinctrl: samsung: do not use bindings header with constants 
The Samsung SoC pin controller driver uses only three defines from the
bindings header with pin configuration register values, which proves
the point that this header is not a proper bindings-type abstraction
layer with IDs.

Define the needed register values directly in the driver and stop using
the bindings header.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-8-krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20220624081022.32384-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 15:55:20 +02:00
Xiang wangx
d1e7bb90f0 pinctrl: aspeed: Fix typo in comment 
Delete the redundant word 'and'.

Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Link: https://lore.kernel.org/r/20220618130854.12321-1-wangxiang@cdjrlc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 14:30:11 +02:00
Aidan MacDonald
71f5e7b3b2 pinctrl: ingenic: Convert to immutable irq chip 
Update the driver to use an immutable IRQ chip to fix this warning:

    "not an immutable chip, please consider fixing it!"

Preserve per-chip labels by adding an ->irq_print_chip() callback.

Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220622185010.2022515-3-aidanmacdonald.0x0@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 13:45:21 +02:00
Aidan MacDonald
4c76a7fc86 pinctrl: ingenic: Use irqd_to_hwirq() 
Instead of accessing ->hwirq directly, use irqd_to_hwirq().

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220622185010.2022515-2-aidanmacdonald.0x0@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 13:45:21 +02:00
Sai Krishna Potthuri
eb1c38c64b pinctrl: pinctrl-zynqmp: Fix kernel-doc warning 
Fix the below kernel-doc warning by adding the description for return
value.
"warning: No description found for return value of
'zynqmp_pmux_get_function_groups'".

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1655462819-28801-5-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 10:29:39 +02:00
Sai Krishna Potthuri
ad2bea79ef pinctrl: pinctrl-zynqmp: Add support for output-enable and bias-high-impedance 
Add support to handle 'output-enable' and 'bias-high-impedance'
configurations. As part of the output-enable configuration, ZynqMP pinctrl
driver takes care of removing the pins from tri-state.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1655462819-28801-4-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-06-28 10:29:39 +02:00