Commit Graph

1294529 Commits

Author SHA1 Message Date
FUKAUMI Naoki
b8ac0cf405 arm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5A
There is no "on-board WLAN/BT chip" on Radxa ROCK 5A. remove related
properties.

Fixes: 1642bf66e2 ("arm64: dts: rockchip: add USB2 to rk3588s-rock5a")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240826075130.546-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 16:05:35 +02:00
Junhao Xie
251e5ade9b arm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566
Add dts for LCKFB Taishan Pi.
Working IO:
* UART
* RGB LED
* AP6212 WiFi
* AP6212 Bluetooth
* SD Card
* eMMC
* HDMI
* USB Type-C
* USB Type-A

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
Link: https://lore.kernel.org/r/20240826110300.735350-1-bigfoot@classfun.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 16:05:35 +02:00
Junhao Xie
4d4b28ba3a dt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566
This documents LCKFB Taishan Pi which is a SBC based on the RK3566 SoC.

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240826044530.726458-3-bigfoot@classfun.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 15:50:39 +02:00
Junhao Xie
d6ec4fefbe dt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFB
Add an entry for Shenzhen JLC Technology LCKFB (https://lckfb.com/)

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240826044530.726458-2-bigfoot@classfun.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 15:50:39 +02:00
Jonas Karlman
10dc64fe0f arm64: dts: rockchip: Add Hardkernel ODROID-M1S
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 15:38:36 +02:00
Jonas Karlman
611a434a7d dt-bindings: arm: rockchip: Add Hardkernel ODROID-M1S
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Add devicetree binding documentation for the Hardkernel ODROID-M1S board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240827211825.1419820-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 15:38:36 +02:00
Jonas Karlman
735065e774 arm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1
The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.

Fixes: fd35832677 ("arm64: dts: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 15:38:35 +02:00
Jonas Karlman
fa63d087bb dt-bindings: arm: rockchip: Correct vendor for Hardkernel ODROID-M1
The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.

Fixes: 19cc53eb2c ("dt-bindings: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240827211825.1419820-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 15:38:35 +02:00
Jonathan Liu
174c306321 arm64: dts: rockchip: Enable RK809 audio codec for Radxa ROCK 4C+
This adds the necessary device tree changes to enable analog audio
output for the 3.5 mm TRS headphone jack on the Radxa ROCK 4C+ with
its RK809 audio codec.

Signed-off-by: Jonathan Liu <net147@gmail.com>
Link: https://lore.kernel.org/r/20240828074755.1320692-1-net147@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 14:49:45 +02:00
Jianfeng Liu
6166b1c008 arm64: dts: rockchip: Add VPU121 support for RK3588
Enable Hantro G1 video decoder in RK3588's devicetree.

Tested with FFmpeg v4l2_request code taken from [1]
with MPEG2, H.264 and VP8 samples.

[1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Hugh Cole-Baker <sigmaris@gmail.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240827181206.147617-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 14:26:54 +02:00
Emmanuel Gil Peyrot
cc0a05865c arm64: dts: rockchip: Add VEPU121 to RK3588
RK3588 has 4 Hantro G1 encoder-only cores. They are all independent IP,
but can be used as a cluster (i.e. sharing work between the cores).
These cores are called VEPU121 in the TRM. The TRM describes one more
VEPU121, but that is combined with a Hantro H1. That one will be handled
using the VPU binding instead.

Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240827181206.147617-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28 14:26:54 +02:00
Michael Riesch
73d6eb7e77 arm64: dts: rockchip: add wolfvision pf5 visualizer display
Add device tree overlay for the WolfVision PF5 Visualizer display.
Since there shall be additional variants of the WolfVision PF5 display in
future, move common definitions to a device tree include file.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20240412-feature-wolfvision-pf5-display-v1-1-f032f32dba1a@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-16 15:55:25 +02:00
Heiko Stuebner
ec532f3591 arm64: dts: rockchip: drop obsolete reset-names from rk356x rng node
The reset-names property is not part of the binding, so drop it.
It is also not used by the driver, so that property was likely
a leftover from some vendor-kernel node.

Fixes: afeccc4084 ("arm64: dts: rockchip: add DT entry for RNG to RK356x")
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240815162519.751193-1-heiko@sntech.de
2024-08-15 22:16:01 +02:00
Heiko Stuebner
da6f413023 arm64: dts: rockchip: add product-data eeproms to QNAP TS433
The device contains two i2c-connected eeproms holding some product-
specific values. One sitting on the mainboard and one on the statically
connected backplane.

While the eeprom chips themself have a size of 512 byte, the eeprom data
only uses 256 byte each, probably to stay compatible with other models.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240810211438.286441-3-heiko@sntech.de
2024-08-15 18:48:45 +02:00
Sergey Bostandzhyan
b8c0287829 arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus
The R2S Plus is basically an R2S with additional eMMC.

The eMMC configuration for the DTS has been extracted and copied from
rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
repository.

Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
Link: https://lore.kernel.org/r/20240814170048.23816-2-jin@mediatomb.cc
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-15 17:06:39 +02:00
Sergey Bostandzhyan
e68b29cb71 dt-bindings: arm: rockchip: Add NanoPi R2S Plus
Add the NanoPi R2S Plus variant, which is an R2S with eMMC.

Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240814170048.23816-3-jin@mediatomb.cc
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-15 17:04:43 +02:00
FUKAUMI Naoki
2c04a4defc arm64: dts: rockchip: drop dr_mode for Radxa ZERO 3W/3E
since dr_mode = "otg" can be used for USB gadget functions for U-Boot
and Linux, there is no reason to set it to "peripheral". drop it.

Fixes: 1a5c8d307c ("arm64: dts: rockchip: Add Radxa ZERO 3W/3E")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240802051508.498-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10 23:33:27 +02:00
Dragan Simic
8c51521de1 arm64: dts: rockchip: Raise Pinebook Pro's panel backlight PWM frequency
Increase the frequency of the PWM signal that drives the LED backlight of
the Pinebook Pro's panel, from about 1.35 KHz (which equals to the PWM
period of 740,740 ns), to exactly 8 kHz (which equals to the PWM period of
125,000 ns).  Using a higher PWM frequency for the panel backlight, which
reduces the flicker, can only be beneficial to the end users' eyes.

On top of that, increasing the backlight PWM signal frequency reportedly
eliminates the buzzing emitted from the Pinebook Pro's built-in speakers
when certain backlight levels are set, which cause some weird interference
with some of the components of the Pinebook Pro's audio chain.

The old value for the backlight PWM period, i.e. 740,740 ns, is pretty much
an arbitrary value that was selected during the very early bring-up of the
Pinebook Pro, only because that value seemed to minimize horizontal line
distortion on the display, which resulted from the old X.org drivers causing
screen tearing when dragging windows around.  That's no longer an issue, so
there are no reasons to stick with the old PWM period value.

The lower and the upper backlight PWM frequency limits for the Pinebook Pro's
panel, according to its datasheet, are 200 Hz and 10 kHz, respectively. [1]
These changes still leave some headroom, which may have some positive effects
on the lifetime expectancy of the panel's backlight LEDs.

[1] https://files.pine64.org/doc/datasheet/PinebookPro/NV140FHM-N49_Rev.P0_20160804_201710235838.pdf

Fixes: 5a65505a69 ("arm64: dts: rockchip: Add initial support for Pinebook Pro")
Cc: stable@vger.kernel.org
Reported-by: Nikola Radojevic <nikola@radojevic.rs>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Tested-by: Nikola Radojević <nikola@radojevic.rs>
Link: https://lore.kernel.org/r/2a23b6cfd8c0513e5b233b4006ee3d3ed09b824f.1722805655.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10 23:24:36 +02:00
Andy Yan
4a8c1161b8 arm64: dts: rockchip: Add support for rk3588 based Cool Pi CM5 GenBook
Cool Pi CM5 GenBook works as a carrier board connect with CM5 [0].

Specification:
- Rockchip RK3588
- LPDDR5X 8/32 GB
- eMMC 64 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for RTL8852BE Wireless connection
- PCIE M.2 M Key for NVME connection
- eDP panel with 1920x1080

This patch add basic support to bringup eMMC/USB HOST/WiFi/TouchPad/
Battery/PCIE NVME, and can also drive a HDMI output with out of tree
hdmi patches.

[0] https://www.crowdsupply.com/shenzhen-tianmao-technology-co-ltd/genbook-rk3588

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20240730102433.540260-3-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10 21:14:08 +02:00
Andy Yan
db0d831c58 dt-bindings: arm: rockchip: Add Cool Pi CM5 GenBook
Add Cool Pi CM5 GenBook, a laptop powered by RK3588.

Cool Pi GenBook works with a carrier board connect with CM5.

Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240730102433.540260-2-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10 21:14:08 +02:00
Florian Klink
8e0eb3dea9 arm64: dts: rockchip: add rfkill node for M.2 E wifi on orangepi-5-plus
This follows the same logic as 82d40b141a ("arm64: dts: rockchip: add
rfkill node for M.2 Key E WiFi on rock-5b").

On the orangepi-5-plus, there's also a GPIO pin connecting the WiFi
enable signal inside the M.2 Key E slot.

The exact GPIO PIN can be validated in the Armbian rk-5.10-rkr4 kernel
rk3588-orangepi-5-plus.dtsi file [1], which contains a `wifi_disable`
node referencing RK_PC4 on &gpio0.

With this change, I was able to get a "Intel Corporation Wi-Fi
6E(802.11ax) AX210/AX1675* 2x2 [Typhoon Peak] (rev 1a)" up, while
`rfkill` previously only mentioned to be hardware blocked.

[1] 9fbe23c9da/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts

Signed-off-by: Florian Klink <flokli@flokli.de>
Link: https://lore.kernel.org/r/20240808103052.1894764-1-flokli@flokli.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10 21:13:44 +02:00
Aurelien Jarno
afeccc4084 arm64: dts: rockchip: add DT entry for RNG to RK356x
Include the just added Rockchip RNG driver for RK356x SoCs and
enable it on RK3568.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/d2beb15377dc8b580ca5557b1a4a6f50b74055aa.1722355365.git.daniel@makrotopia.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10 21:01:06 +02:00
Heiko Stuebner
40cc425716 arm64: dts: rockchip: actually enable pmu-io-domains on qnap-ts433
Contrary to the vendor-kernel the pmu-io-domains are not enabled by
default. This resulted in the value not being set according to the
regulator, which in turn made the gmac0 interface that is connected
to the vccio4 supply inoperable.

Fixes: 64b7f16fb3 ("arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240805162052.3345768-1-heiko@sntech.de
2024-08-08 08:11:26 +02:00
Uwe Kleine-König
e8d45544f8 arm64: dts: rockchip: Simplify network PHY connection on qnap-ts433
While it requires to have the right phy driver loaded (i.e. motorcomm)
to make the phy asserting the right delays, this is generally the
preferred way to define the MAC <-> PHY connection.

Signed-off-by: Uwe Kleine-König <ukleinek@debian.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240304084612.711678-2-ukleinek@debian.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-05 18:22:24 +02:00
Dragan Simic
296602b8e5 arm64: dts: rockchip: Move RK3399 OPPs to dtsi files for SoC variants
Rename the Rockchip RK3399 SoC dtsi files and, consequently, adjust their
contents and the contents of the affected board dts(i) files appropriately,
to "encapsulate" the different CPU and GPU OPPs for each of the supported
RK3399 SoC variants into the respective SoC variant dtsi files.

Moving the OPPs to the SoC variant dtsi files, instead of requiring the
board dts(i) files to include both the SoC variant dtsi file and the right
OPP variant dtsi file, reduces the possibility for mismatched inclusion and
improves the overall hierarchical representation of data.

These changes follow the approach used for the Rockchip RK3588 SoC variants,
which was introduced and described further in commit def88eb4d8 ("arm64:
dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPs").  Please
see that commit for a more detailed explanation.

No functional changes are introduced, which was validated by decompiling and
comparing all affected dtb files before and after these changes.  In more
detail, all decompiled dtb files remain exactly the same, except the files
list below, which results from all of them stemming from the same base board
dtsi file (rk3399-rock-pi-4.dtsi), while all of them include one of the three
different RK3399 SoC variant dtsi files by themselves:

  - rk3399-rock-4se.dtb
  - rk3399-rock-pi-4a.dtb
  - rk3399-rock-pi-4a-plus.dtb
  - rk3399-rock-pi-4b.dtb
  - rk3399-rock-pi-4b-plus.dtb
  - rk3399-rock-pi-4c.dtb

When compared with the decompiled original dtb files, these dtb files have
some of their blocks shuffled around a bit and some of their phandles have
different values, as a result of the changes to the order in which the
building blocks from the parent dtsi files are included into them, but they
still effectively remain the same as the originals.

The only exception to the "include only a SoC variant dtsi" is found in
rk3399-evb.dts, which includes rk3399-base.dtsi instead of rk3399.dtsi.
This is intentional, because this board dts file doesn't enable the TSADC,
so including rk3399.dtsi would enable the SoC to go into higher OPPs with
no thermal throttling in place.  Let's hope that people interested in this
board will fix this in the future.

As a side note, due to the nature of introduced changes, this commit is best
viewed using the --break-rewrites option for git-log(1).

Related-to: def88eb4d8 ("arm64: dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPs")
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/9417b5c5b64f9aceea64530a85a536169a3e7466.1721532747.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-30 09:22:16 +02:00
Heiko Stuebner
64b7f16fb3 arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433
Add the two supplies for the pmu-io-domains that are defined in the
vendor devicetree for the TS433.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-15-heiko@sntech.de
2024-07-30 09:07:01 +02:00
Heiko Stuebner
9130eb6258 arm64: dts: rockchip: enable gpu on Qnap-TS433
The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.

So there is no reason not to enable it.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-14-heiko@sntech.de
2024-07-30 09:07:00 +02:00
Heiko Stuebner
ee078c7daa arm64: dts: rockchip: add missing pmic information on Qnap-TS433
Fill in the missing pieces for RK809 pmic used on the TS433.

The regulator setup comes from the vendor-devicetree, so without proper
schematics its accuracy is somewhat unclear, but it looks really similar
to all the other rk3568 boards, so follows the reference design it seems.

The one caveat is related to vcc3v3_sd. This regulator needs to stay on.
When turned off because of no users, access to both PCIe controllers
will stall. Maybe this rail does supply the 100MHz refclk generation
or so.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-13-heiko@sntech.de
2024-07-30 09:07:00 +02:00
Heiko Stuebner
99b36ba910 arm64: dts: rockchip: define cpu-supply on the Qnap-TS433
The TS433 seems to use a silergy,syr827 regulator for the cpu supply.
At least that is the compatible used in the vendor devicetree, though
it could very well also be another fan53555 clone.

Define the needed regulator node and hook up the cpu-supply to the
cpu cores.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-12-heiko@sntech.de
2024-07-30 09:07:00 +02:00
Heiko Stuebner
9b682d31b2 arm64: dts: rockchip: add gpio-keys to Qnap-TS433
The TS433 has 3 buttons, power and copy in the front as well as a reset
pinhole button on the back. The power-button is connected to the embedded
controller while the other two buttons are just gpio connected.

Add the gpio-keys definition for the two buttons we can handle right now.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-11-heiko@sntech.de
2024-07-30 09:07:00 +02:00
Heiko Stuebner
2dfdddd9d2 arm64: dts: rockchip: enable the tsadc on the Qnap-TS433
Enable the tsadc node to allow for temperature measurements of the soc.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-10-heiko@sntech.de
2024-07-30 09:07:00 +02:00
Heiko Stuebner
ea91aabf18 arm64: dts: rockchip: add hdd leds to Qnap-TS433
Add the 4 gpio-controlled LEDs to the Qnap-TS433.

They are meant for individual disk activitivy, but I haven't found a
way for how to connect them to their individual sata slot yet.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-9-heiko@sntech.de
2024-07-30 09:07:00 +02:00
Heiko Stuebner
dadd4256e1 arm64: dts: rockchip: add board-aliases for Qnap-TS433
Add the aliases for the internal network interface as well as the emmc
on the board and make sure the dedicated RTC is always the first one.

The TS433 actually has two rtc devices. One coming from the rk809 pmic
without added functionality and also a dedicated RTC from Mycrocrystal
that is battery backed to keep the time.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-8-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Heiko Stuebner
673c1353b3 arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-7-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Heiko Stuebner
e1cb5d8a92 arm64: dts: rockchip: add stdout path on Qnap-TS433
As most Rockchip boards do, the TS433 also uses uart2 for its serial
output. Set the correct chosen entry for it.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-6-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Heiko Stuebner
d992203f57 arm64: dts: rockchip: enable usb ports on Qnap-TS433
Enable usb controllers and phys and add regulator infrastructure for the
usb ports on the TS433.

Of course there are no schematics available for the device, so the
regulator information comes from the vendor-devicetree with unknown
accuracy.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-5-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Heiko Stuebner
07ef8be476 arm64: dts: rockchip: enable uart0 on Qnap-TS433
Uart0 is connected to an MCU on the board that handles system control
like the fan-speed. So far no driver for it is available though.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-4-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Heiko Stuebner
0f5f87a1d6 arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-3-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Heiko Stuebner
e0ec6d4822 arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
Add the vcc3v3-supply regulator and its link to the pcie controllers.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-2-heiko@sntech.de
2024-07-30 09:06:59 +02:00
Alex Bee
bd6e614356 arm64: dts: rockchip: Add sdmmc/sdio/emmc reset controls for RK3328
The DW MCI controller driver will use them to reset the IP block before
initialisation.

Fixes: d717f7352e ("arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240710132830.14710-4-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 21:16:19 +02:00
Alex Bee
82e3aaae38 arm64: dts: rockchip: Add sdmmc_ext for RK3328
RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some
boards have sdio wifi connected to it. In order to use it
one would have to add the pinctrls from sdmmc0ext group which
is done on board level.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240710132830.14710-3-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 21:16:19 +02:00
Chukun Pan
9df3424776 arm64: dts: rockchip: Enable UHS-I SDR-50 for Lunzn FastRhino R66S
This board can work in UHS-I SDR-104 mode, but may not be stable,
use SDR-50 instead. Remove the max-frequency property, which is
already defined in rk356x.dtsi.

Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240710143017.685905-4-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:50:15 +02:00
Chukun Pan
ecb0835328 arm64: dts: rockchip: remove useless tx/rx_delay for Lunzn Fastrhino R68S
Since we use rgmii-id as the phy mode, remove the useless
tx_delay and rx_delay properties.

Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240710143017.685905-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:50:15 +02:00
Chukun Pan
22de886d49 arm64: dts: rockchip: use generic Ethernet PHY reset bindings for Lunzn Fastrhino R68S
Replace the deprecated snps,reset-xxx bindings to the generic Ethernet
PHY reset GPIO bindings. According to the PHY datasheet, the RTL8211F
PHY needs a 10ms assert delay and at least 72ms deassert delay.
Considering the possibility of mixed use of PHY chips, increased the
reset time.

Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240710143017.685905-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:50:15 +02:00
Dragan Simic
def33fb119 arm64: dts: rockchip: Correct the Pinebook Pro battery design capacity
All batches of the Pine64 Pinebook Pro, except the latest batch (as of 2024)
whose hardware design was revised due to the component shortage, use a 1S
lithium battery whose nominal/design capacity is 10,000 mAh, according to the
battery datasheet. [1][2]  Let's correct the design full-charge value in the
Pinebook Pro board dts, to improve the accuracy of the hardware description,
and to hopefully improve the accuracy of the fuel gauge a bit on all units
that don't belong to the latest batch.

The above-mentioned latest batch uses a different 1S lithium battery with
a slightly lower capacity, more precisely 9,600 mAh.  To make the fuel gauge
work reliably on the latest batch, a sample battery would need to be sent to
CellWise, to obtain its proprietary battery profile, whose data goes into
"cellwise,battery-profile" in the Pinebook Pro board dts.  Without that data,
the fuel gauge reportedly works unreliably, so changing the design capacity
won't have any negative effects on the already unreliable operation of the
fuel gauge in the Pinebook Pros that belong to the latest batch.

According to the battery datasheet, its voltage can go as low as 2.75 V while
discharging, but it's better to leave the current 3.0 V value in the dts file,
because of the associated Pinebook Pro's voltage regulation issues.

[1] https://wiki.pine64.org/index.php/Pinebook_Pro#Battery
[2] https://files.pine64.org/doc/datasheet/pinebook/40110175P%203.8V%2010000mAh%E8%A7%84%E6%A0%BC%E4%B9%A6-14.pdf

Fixes: c7c4d698cd ("arm64: dts: rockchip: add fuel gauge to Pinebook Pro dts")
Cc: stable@vger.kernel.org
Cc: Marek Kraus <gamiee@pine64.org>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/731f8ef9b1a867bcc730d19ed277c8c0534c0842.1721065172.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:45:19 +02:00
Christopher Obbard
710a568b6a arm64: dts: rockchip: add Firefly JD4 baseboard with Core-PX30-JD4 SoM
The Firefly MB-PX30-JD4 is a baseboard for the Core-PX30-JD4 SoM.

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Link: https://lore.kernel.org/r/20240718-rockchip-px30-firefly-v3-3-3835cdd22eae@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:41:27 +02:00
Christopher Obbard
a32b1a4650 arm64: dts: rockchip: add Firefly Core-PX30-JD4 SoM
The Firefly Core-PX30-JD4 SoM is a 69.6x49.6mm (260 pin SODIMM connector)
system-on-module from Firefly, featuring the Rockchip PX30.

It provides the following feature set:
 * on-module DDR3 (1GB/2GB)
 * on-module eMMC 5.1 (8GB/16GB/32GB/64GB/128GB)
 * on-module NPU (optional)
 * SD card (on a baseboard) via edge connector
 * 100mbps Ethernet (on a baseboard) via edge connector
 * MIPI-DSI (on a baseboard) via edge connector
 * Audio (on a baseboard) via edge connector
   - 1x SPDIF
   - 1x 8-channel I2S/TDM
   - 1x 2-channel I2S/TDM
   - 1x 8-channel PDM
 * USB (on a baseboard) via edge connector
   - 1x USB 2.0 OTG
   - 1x USB 2.0 host
 * Various GPIO (on a baseboard) via edge connector

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Link: https://lore.kernel.org/r/20240718-rockchip-px30-firefly-v3-2-3835cdd22eae@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:41:27 +02:00
Christopher Obbard
0406da35b4 dt-bindings: arm: rockchip: Add Firefly Core-PX30-JD4 on baseboard
Add binding for the Firefly Core-PX30-JD4 SoM when used in conjunction
with the MB-JD4-PX30 baseboard.

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240718-rockchip-px30-firefly-v3-1-3835cdd22eae@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-29 20:41:27 +02:00
Linus Torvalds
8400291e28 Linux 6.11-rc1 v6.11-rc1 2024-07-28 14:19:55 -07:00
Linus Torvalds
a0c04bd55a Merge tag 'kbuild-fixes-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:

 - Fix RPM package build error caused by an incorrect locale setup

 - Mark modules.weakdep as ghost in RPM package

 - Fix the odd combination of -S and -c in stack protector scripts,
   which is an error with the latest Clang

* tag 'kbuild-fixes-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  kbuild: Fix '-S -c' in x86 stack protector scripts
  kbuild: rpm-pkg: ghost modules.weakdep file
  kbuild: rpm-pkg: Fix C locale setup
2024-07-28 14:02:48 -07:00