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Author SHA1 Message Date
Konrad Dybcio
b6e9fb7ac2 soc: qcom: icc-bwmon: Handle global registers correctly 
The BWMON hardware has two sets of registers: one for the monitor itself
and one called "global". It has what seems to be some kind of a head
switch and an interrupt control register. It's usually 0x200 in size.

On fairly recent SoCs (with the starting point seemingly being moving
the OSM programming to the firmware) these two register sets are
contiguous and overlapping, like this (on sm8450):

/* notice how base.start == global_base.start+0x100 */
reg = <0x90b6400 0x300>, <0x90b6300 0x200>;
reg-names = "base", "global_base";

Which led to some confusion and the assumption that since the
"interesting" global registers begin right after global_base+0x100,
there's no need to map two separate regions and one can simply subtract
0x100 from the offsets.

This is however not the case for anything older than SDM845, as the
global region can appear in seemingly random spots on the register map.

Handle the case where the global registers are mapped separately to allow
proper functioning of BWMONv4 on MSM8998 and older. Add specific
compatibles for 845, 8280xp, 7280 and 8550 (all of which use the single
reg space scheme) to keep backwards compatibility with old DTs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230304-topic-ddr_bwmon-v3-3-77a050c2fbda@linaro.org
 2023-04-04 12:34:23 -07:00
Konrad Dybcio
452c165e35 soc: qcom: icc-bwmon: Remove unused struct member 
bwmon->regmap was never used, as the regmap for bwmon is registered
through devres and accessed through bwmon's regmap_field members.
Remove it

Fixes: ec63dcd3c8 ("soc: qcom: icc-bwmon: use regmap and prepare for BWMON v5")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230304-topic-ddr_bwmon-v3-2-77a050c2fbda@linaro.org
 2023-04-04 12:34:23 -07:00
Ye Xingchen
74f9d27ac7 soc: qcom: smsm: Use dev_err_probe() 
Replace the open-code with dev_err_probe() to simplify the code.

Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/202303241018532824420@zte.com.cn
 2023-03-24 05:59:07 -07:00
Konrad Dybcio
fb1eb0b5dc firmware: qcom_scm: Add SM6375 compatible 
While it was introduced in bindings, requiring a core clock, and added
into the DT, this compatible was apparently forgotten about on the driver
side of things. Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307012247.3655547-1-konrad.dybcio@linaro.org
 2023-03-21 20:36:07 -07:00
Danila Tikhonov
92b9d86252 soc: qcom: llcc: Add configuration data for SM7150 
Add LLCC configuration data for SM7150 SoC.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230305202627.402386-3-danila@jiaxyga.com
 2023-03-21 20:31:20 -07:00
Danila Tikhonov
1e0952e7b9 dt-bindings: arm: msm: Add LLCC for SM7150 
Add LLCC compatible for SM7150 SoC.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230305202627.402386-2-danila@jiaxyga.com
 2023-03-21 20:31:20 -07:00
Krzysztof Kozlowski
34d84c3b0f dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994 
Re-add the qcom,rpm-msm8994 compatible, dropped during conversion from
TXT to DT schema:

  apq8094-sony-xperia-kitakami-karin_windy.dtb: smd: rpm:rpm-requests:compatible:0: 'qcom,rpm-msm8994' is not one of ['qcom,rpm-apq8084' ...]

Fixes: f935a752f2 ("dt-bindings: soc: qcom: smd-rpm: Convert binding to YAML schema")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230305122428.167580-1-krzysztof.kozlowski@linaro.org
 2023-03-21 20:30:34 -07:00
Neil Armstrong
ff642773b6 soc: qcom: pmic_glink: register ucsi aux device 
Only register UCSI on know working devices, like on the SM8450
or SM8550 which requires UCSI to get USB mode switch events.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230130-topic-sm8450-upstream-pmic-glink-v5-4-552f3b721f9e@linaro.org
 2023-03-21 19:34:37 -07:00
Neil Armstrong
84a334131f dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible 
Document the SM8550 compatible used to describe the pmic glink
on this platform.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230130-topic-sm8450-upstream-pmic-glink-v5-3-552f3b721f9e@linaro.org
 2023-03-21 19:34:37 -07:00
Neil Armstrong
14bc45c4e7 dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible 
Document the SM8450 compatible used to describe the pmic glink
on this platform.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230130-topic-sm8450-upstream-pmic-glink-v5-2-552f3b721f9e@linaro.org
 2023-03-21 19:34:37 -07:00
Mukesh Ojha
781d32d1c9 firmware: qcom_scm: Clear download bit during reboot 
During normal restart of a system download bit should
be cleared irrespective of whether download mode is
set or not.

Fixes: 8c1b7dc9ba ("firmware: qcom: scm: Expose download-mode control")
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1678979666-551-1-git-send-email-quic_mojha@quicinc.com
 2023-03-19 19:09:45 -07:00
Melody Olvera
9559342891 dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible 
Add compatible for QDU1000 and QRU1000 aoss devices.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230306231202.12223-3-quic_molvera@quicinc.com
 2023-03-15 19:28:50 -07:00
Melody Olvera
bbf97c274d dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible 
Update compatible for QDU1000 and QRU1000 to include the interconnect
these devices have.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230306231202.12223-2-quic_molvera@quicinc.com
 2023-03-15 19:28:50 -07:00
Devi Priya
56d2156e7c dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible 
Document the compatible for RPM communication
over SMD for IPQ9574 SoC

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230217142030.16012-2-quic_devipriy@quicinc.com
 2023-03-15 17:16:26 -07:00
Elliot Berman
968a26a07f firmware: qcom_scm: Use fixed width src vm bitmap 
The maximum VMID for assign_mem is 63. Use a u64 to represent this
bitmap instead of architecture-dependent "unsigned int" which varies in
size on 32-bit and 64-bit platforms.

Acked-by: Kalle Valo <kvalo@kernel.org> (ath10k)
Tested-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230213181832.3489174-1-quic_eberman@quicinc.com
 2023-03-15 16:52:11 -07:00
Kathiravan T
9e4a7652d7 dt-bindings: firmware: qcom,scm: document IPQ5332 SCM 
Document the compatible for IPQ5332 SCM.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307062232.4889-8-quic_kathirav@quicinc.com
 2023-03-15 16:22:33 -07:00
Poovendhan Selvaraj
81ac39144b dt-bindings: scm: Add compatible for IPQ9574 
Add the scm compatible string for IPQ9574 SoC

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230216120012.28357-2-quic_poovendh@quicinc.com
 2023-03-15 16:12:51 -07:00
Konrad Dybcio
e556c94e8c soc: qcom: rpmpd: Remove useless comments 
It goes without saying that socname_rpmpds[] is the array of the RPM
power domains associated with socname. Remove these comments.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-10-06a4f448ff90@linaro.org
 2023-03-15 15:40:28 -07:00
Konrad Dybcio
ec90637c99 soc: qcom: rpmpd: Hook up VDDMX as parent of SM6375 VDDGX 
The GPU core clock requires that both VDDGX and VDDMX domains are scaled
at the same rate at the same time (well, MX just before GX but you get
the idea). Set MX as parent of GX to take care of that.

Suggested-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-9-06a4f448ff90@linaro.org
 2023-03-15 15:40:28 -07:00
Konrad Dybcio
decd6e77e0 soc: qcom: rpmpd: Add parent PD support 
In some cases (like with the GPU core clock on GMU-less SoCs) it's
required that we scale more than one voltage domain. This can be achieved
by linking them in a parent-child relationship. Add support for specifying
a parent PD, similarly to what has been done in the RPMhPD driver.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-8-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
d338fe40cf soc: qcom: rpmpd: Make bindings assignments consistent 
Currently the whitespace between [DT_BINDING] = &struct is all over
the place.. some SoC structs have a space, others have a tab, others
have N tabs.. Make that a single tab for everybody to keep things
coherent.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-7-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
07df05025e soc: qcom: rpmpd: Improve the naming 
Now that we aren't bound by the preprocessor macros, improve the naming
to be a bit less preprocessor-y and touch up some rpmpd.pd.name fields
while at it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-6-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
91c0bcef25 soc: qcom: rpmpd: Expand struct definition macros 
Expand the struct definition macros to make things easier to see and
maintain. Now that the macros are unnecessary, remove them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-5-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
1c940cc42a soc: qcom: rpmpd: Remove vdd* from struct names 
It's rather obvious by the characteristic of these resources that
they correspond to some voltage lines governed by RPM. Remove the
"vdd" unnecessary prefix from them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-4-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
d280f3d66d soc: qcom: rpmpd: Unify Low Power Island definitions 
Up until now, we had 2 separate entries for VDD_LPI[CM]X and
VDD_LPI_[CM]X which both pointed to the same RPM resource. Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-3-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
a5d0e2819f soc: qcom: rpmpd: Bring all definitions to the top 
Keep all definitions in one place in preparation for a cleanup to make
things tidier.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-2-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
Konrad Dybcio
f1eb5e6fc1 soc: qcom: rpmpd: Remove SoC names from RPMPD definitions 
Replace the SoC names with type+id_key (or type+id+..name..+key for
fixed-key definitions) and remove duplicate entries.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-1-06a4f448ff90@linaro.org
 2023-03-15 15:40:27 -07:00
David Wronek
bad8cdc206 soc: qcom: socinfo: Add Soc ID for SM7150 
Add Soc ID table entries for Qualcomm SM7150.

Signed-off-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230305191745.386862-3-danila@jiaxyga.com
 2023-03-15 15:31:16 -07:00
David Wronek
de7aeee0d9 dt-bindings: arm: qcom,ids: Add Soc ID for SM7150 
Add the ID for the Qualcomm SM7150 SoC.

Signed-off-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230305191745.386862-2-danila@jiaxyga.com
 2023-03-15 15:31:15 -07:00
Bhupesh Sharma
a11bc4a5b3 soc: qcom: socinfo: Add IDs for QRB4210 
Add the ID for QRB4210 variant.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230315160151.2166861-3-bhupesh.sharma@linaro.org
 2023-03-15 15:30:55 -07:00
Bhupesh Sharma
ee6ae544dd dt-bindings: arm: qcom,ids: Add IDs for QRB4210 
Add the ID for QRB4210 variant.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230315160151.2166861-2-bhupesh.sharma@linaro.org
 2023-03-15 15:30:20 -07:00
Varadarajan Narayanan
c6653d8f24 soc: qcom: socinfo: Add IDs for IPQ9574 and its variants 
Add SOC ID for Qualcomm IPQ9574, IPQ9570, IPQ9554, IPQ9550,
IPQ9514 and IPQ9510

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1678774414-14414-3-git-send-email-quic_varada@quicinc.com
 2023-03-15 15:27:10 -07:00
Varadarajan Narayanan
fd972da1b2 dt-bindings: arm: qcom,ids: Add IDs for IPQ9574 and its variants 
Add SOC ID for Qualcomm IPQ9574, IPQ9570, IPQ9554, IPQ9550,
IPQ9514 and IPQ9510

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1678774414-14414-2-git-send-email-quic_varada@quicinc.com
 2023-03-15 15:25:47 -07:00
Manivannan Sadhasivam
cca94f1dd6 soc: qcom: llcc: Do not create EDAC platform device on SDM845 
The platforms based on SDM845 SoC locks the access to EDAC registers in the
bootloader. So probing the EDAC driver will result in a crash. Hence,
disable the creation of EDAC platform device on all SDM845 devices.

The issue has been observed on Lenovo Yoga C630 and DB845c.

While at it, also sort the members of `struct qcom_llcc_config` to avoid
any holes in-between.

Cc: <stable@vger.kernel.org> # 5.10
Reported-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-15-manivannan.sadhasivam@linaro.org
 2023-03-15 15:17:08 -07:00
Manivannan Sadhasivam
721d3e91bf qcom: llcc/edac: Support polling mode for ECC handling 
Not all Qcom platforms support IRQ mode for ECC handling. For those
platforms, the current EDAC driver will not be probed due to missing ECC
IRQ in devicetree.

So add support for polling mode so that the EDAC driver can be used on all
Qcom platforms supporting LLCC.

The polling delay of 5000ms is chosen based on Qcom downstream/vendor
driver.

Reported-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-14-manivannan.sadhasivam@linaro.org
 2023-03-15 15:17:08 -07:00
Manivannan Sadhasivam
ee13b50087 qcom: llcc/edac: Fix the base address used for accessing LLCC banks 
The Qualcomm LLCC/EDAC drivers were using a fixed register stride for
accessing the (Control and Status Registers) CSRs of each LLCC bank.
This stride only works for some SoCs like SDM845 for which driver
support was initially added.

But the later SoCs use different register stride that vary between the
banks with holes in-between. So it is not possible to use a single register
stride for accessing the CSRs of each bank. By doing so could result in a
crash.

For fixing this issue, let's obtain the base address of each LLCC bank from
devicetree and get rid of the fixed stride. This also means, there is no
need to rely on reg-names property and the base addresses can be obtained
using the index.

First index is LLCC bank 0 and last index is LLCC broadcast. If the SoC
supports more than one bank, then those need to be defined in devicetree
for index from 1..N-1.

Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-13-manivannan.sadhasivam@linaro.org
 2023-03-15 15:17:08 -07:00
Manivannan Sadhasivam
43aa006e07 dt-bindings: arm: msm: Fix register regions used for LLCC banks 
Register regions of the LLCC banks are located at different addresses.
Currently, the binding just lists the LLCC0 base address and tries to
cover all the banks using a single size. This is entirely wrong as there
are other register regions that happen to lie inside the size covered by
the binding such as the memory controller and holes.

So this needs to be fixed by specifying the base address of individual
LLCC banks. This approach will break the existing users of this binding
as the register regions are split and the drivers now cannot use
LLCC0 register region for accessing rest of the banks (which is wrong
anyway).

But considering the fact that the binding was wrong from the day one and
also the device drivers going wrong by the binding, this breakage is
acceptable.

Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-3-manivannan.sadhasivam@linaro.org
 2023-03-15 15:17:08 -07:00
Manivannan Sadhasivam
94b1d58f88 dt-bindings: arm: msm: Update the maintainers for LLCC 
Both Rishabh and Sai have left Qualcomm, and there is no evidence of them
maintaining with a new identity. So their entry needs to be removed.

Listed Bjorn as the interim maintainer until someone volunteers to maintain
this binding.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-2-manivannan.sadhasivam@linaro.org
 2023-03-15 15:17:08 -07:00
Konrad Dybcio
18290c2eec soc: qcom: socinfo: Add IDs for QCM2290/QRB2210 
Add the missing IDs for scuba and its QRB variant.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314-topic-scuba_socinfo-v2-2-44fa1256aa6d@linaro.org
 2023-03-15 15:09:50 -07:00
Konrad Dybcio
f26e18bda9 dt-bindings: arm: qcom,ids: Add IDs for QCM2290/QRB2210 
Add the missing IDs for scuba and its QRB variant.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314-topic-scuba_socinfo-v2-1-44fa1256aa6d@linaro.org
 2023-03-15 15:08:55 -07:00
Visweswara Tanuku
fe8aa1ba07 soc: qcom: geni-se: Update Tx and Rx fifo depth based on QUP HW version 
From QUP HW Version 3.10 and above the Tx and Rx
fifo depth bits are increased to 23:16 bits from
21:16 bits in SE_HW_PARAM registers accomodating
256bytes of fifo depth.

Updated geni_se_get_tx_fifo_depth and
geni_se_get_rx_fifo_depth to retrieve right fifo
depth based on QUP HW version.

Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230215050528.9507-1-quic_vtanuku@quicinc.com
 2023-03-13 17:15:12 -07:00
Konrad Dybcio
112d96fd29 soc: qcom: socinfo: Add some PMICs 
Add some missing PMICs based on the _SUBTYPE defines in
include/soc/qcom/qcom-spmi-pmic.h

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230213215500.2131511-1-konrad.dybcio@linaro.org
 2023-03-13 16:54:40 -07:00
Bartosz Golaszewski
7fa9c5fc1a soc: qcom: socinfo: add support for SA8775P 
Add SocInfo support for SA8775P.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Tested-by: Eric Chanudet <echanude@redhat.com> # sa8775p-ride
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230209095753.447347-4-brgl@bgdev.pl
 2023-03-13 16:34:36 -07:00
Bartosz Golaszewski
26a4bf805c dt-bindings: arm: qcom: add the SoC ID for SA8775P 
Add the SoC ID entry for SA8775P.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Tested-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230209095753.447347-3-brgl@bgdev.pl
 2023-03-13 16:34:36 -07:00
Bartosz Golaszewski
b302c64a3c soc: qcom: smem: update max processor count 
Update max processor count to reflect the number of co-processors on
SA8775P SoCs.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Tested-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230209095753.447347-2-brgl@bgdev.pl
 2023-03-13 16:34:36 -07:00
Krzysztof Kozlowski
b5bec0f00e dt-bindings: soc: qcom,apr: correct qcom,intents type 
The qcom,intents property is a list of pairs, thus it should be defined
as uint32-matrix.

Fixes: b2d7616e13 ("dt-bindings: soc: qcom: apr: add missing properties")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208101545.45711-5-krzysztof.kozlowski@linaro.org
 2023-03-13 13:00:39 -07:00
Krzysztof Kozlowski
34bb2c1c1b soc: qcom: restrict L2 accessors to ARM64 build tests 
The QCOM_KRYO_L2_ACCESSORS can be compile tested only on ARM64 because
it references asm/sysreg.h present only on ARM64.  Mark the dependency
correct, even though as a non-selectable option it does not have real
effect.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230123202601.1296983-1-krzysztof.kozlowski@linaro.org
 2023-03-13 12:30:06 -07:00
Rob Herring
4a1b9f4eb1 soc: qcom: Use of_property_present() for testing DT property presence 
It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230310144724.1545153-1-robh@kernel.org
 2023-03-13 05:43:07 -07:00
Krzysztof Kozlowski
903caf42ea soc: qcom: gsbi: mark OF related data as maybe unused 
The driver can be compile tested with !CONFIG_OF making certain data
unused:

  drivers/soc/qcom/qcom_gsbi.c:117:34: error: ‘tcsr_dt_match’ defined but not used [-Werror=unused-const-variable=]

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230310214413.275054-1-krzysztof.kozlowski@linaro.org
 2023-03-13 05:37:27 -07:00
Linus Torvalds
fe15c26ee2 Linux 6.3-rc1 v6.3-rc1 2023-03-05 14:52:03 -08:00