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Swapnil Jakhade
b54b47bd03 phy: cadence-torrent: Add single link PCIe support 
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-2-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:18 +05:30
Swapnil Jakhade
074e991535 dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use 
Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-8-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:48 +05:30
Swapnil Jakhade
962fad301c dt-bindings: phy: cadence-torrent: Add binding to specify SSC mode 
Add binding to specify Spread Spectrum Clocking mode used.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1600280911-9214-7-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:48 +05:30
Swapnil Jakhade
d09945eaca phy: cadence-torrent: Check total lane count for all subnodes is within limit 
Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-6-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:47 +05:30
Swapnil Jakhade
2e70c84995 phy: cadence-torrent: Add separate regmap functions for torrent and DP 
Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-5-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:47 +05:30
Swapnil Jakhade
7c12b46c63 phy: cadence-torrent: Enable support for multiple subnodes 
Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-4-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:47 +05:30
Swapnil Jakhade
46d205af30 phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addresses 
Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-3-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:46 +05:30
Swapnil Jakhade
29d1fd2f2c phy: cadence-torrent: Use of_device_get_match_data() to get driver data 
Use of_device_get_match_data() to get driver data instead of boilerplate
code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-2-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:46 +05:30
Wan Ahmad Zainie
885c4f4d6c phy: intel: Add Keem Bay eMMC PHY support 
Add support for eMMC PHY on Intel Keem Bay SoC.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200913235522.4316-4-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:45:19 +05:30
Wan Ahmad Zainie
9580b22aca dt-bindings: phy: intel: Add Keem Bay eMMC PHY bindings 
Binding description for Intel Keem Bay eMMC PHY.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200913235522.4316-3-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:45:19 +05:30
Wan Ahmad Zainie
fa687038ba phy: intel: Rename phy-intel to phy-intel-lgm 
Rename phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c
to make drivers/phy/intel directory more generic for future use.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Link: https://lore.kernel.org/r/20200913235522.4316-2-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:45:19 +05:30
Rikard Falkeborn
57d39c7697 phy: cadence: torrent: Constify regmap_config structs 
The regmap_config structs are never modified and can be made const to
allow the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200912204639.501669-4-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:43:31 +05:30
Rikard Falkeborn
2f4a3d8b7c phy: cadence: salvo: Constify cdns_nxp_sequence_pair 
cdns_nxp_sequence_pair[] are never modified and can be made const to allow
the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Link: https://lore.kernel.org/r/20200912204639.501669-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:43:31 +05:30
Rikard Falkeborn
3cfb0e8e41 phy: cadence: Sierra: Constify static structs 
The static cdns_reg_pairs and regmap_config structs are not modified and
can be made const. This allows the compiler to put them in read-only
memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200912204639.501669-2-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:43:31 +05:30
Vinod Koul
5408b22043 Merge branch 'topic/phy_attrs' into next 2020-09-16 17:38:33 +05:30
Swapnil Jakhade
0ffcc3787e phy: cadence-torrent: Set Torrent PHY attributes 
Set Torrent PHY attributes bus_width, max_link_rate and mode
for DisplayPort.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/1599805114-22063-3-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:38:02 +05:30
Swapnil Jakhade
a25536e8d5 phy: Add new PHY attribute max_link_rate 
Add new PHY attribute max_link_rate to struct phy_attrs. This indicates
maximum link rate supported by PHY (in Mbps).

Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/1599805114-22063-2-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:38:02 +05:30
Ramuthevar Vadivel Murugan
1cce8f73a5 phy: Add USB3 PHY support for Intel LGM SoC 
Add support for USB PHY on Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-11 17:12:49 +05:30
Ramuthevar Vadivel Murugan
8a676e1be4 dt-bindings: phy: Add USB PHY support for Intel LGM SoC 
Add the dt-schema to support USB PHY on Intel LGM SoC

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200828022312.52724-2-vadivel.muruganx.ramuthevar@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-11 17:12:49 +05:30
Roger Quadros
ee626660dd dt-binding: phy: convert ti,omap-usb2 to YAML 
Move ti,omap-usb2 to its own YAML schema.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200831142130.21836-1-rogerq@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Grygorii Strashko
7f78322cdd phy: ti: gmii-sel: retrieve ports number and base offset from dt 
On K3 AM654x/J721E platforms the Port MII mode selection register(s) have
similar format and placed in the System Control Module (SCM) module
sequentially as one register per port, but, depending SOC and CPSW
instance, the base offset and number of ports can be different.

Hence, add possibility to retrieve number of ports and base registers
offset from DT and support for max possible number of ports supported by K3
SoCs like J721E.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-4-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Grygorii Strashko
d3fa20b97c phy: ti: gmii-sel: use features mask during init 
Use features mask during PHYs initialization to simplify code.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Grygorii Strashko
15819a6c9a phy: ti: gmii-sel: move phy init in separate function 
Move phy initialization in separate function to improve code readability
and simplify future changes.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-2-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Chunfeng Yun
dce9d8129e phy: phy-pxa-28nm-usb2: convert to readl_poll_timeout() 
Use readl_poll_timeout() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-6-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
f63602b1c6 phy: phy-pxa-28nm-hsic: convert to readl_poll_timeout() 
Use readl_poll_timeout() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-5-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
38af68cb04 phy: phy-qcom-apq8064-sata: convert to readl_relaxed_poll_timeout() 
Use readl_relaxed_poll_timeout() to simplify code, rename local function
read_poll_timeout() as poll_timeout() to avoid repeated definition

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-4-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
6f2a721850 phy: phy-bcm-sr-usb: convert to readl_poll_timeout_atomic() 
Use readl_poll_timeout_atomic() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-3-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
01a4563300 phy: phy-bcm-ns2-usbdrd: convert to readl_poll_timeout_atomic() 
Use readl_poll_timeout_atomic() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:10 +05:30
Chunfeng Yun
47da6aa776 phy: phy-bcm-ns-usb3: convert to readl_poll_timeout_atomic() 
Use readl_poll_timeout_atomic() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:10 +05:30
Ezequiel Garcia
37abc181bb phy: Move phy-rockchip-dphy-rx0 out of staging 
There is no need for this driver to be in staging.
Let's promote it!

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20200825220710.634106-1-ezequiel@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 18:28:21 +05:30
Kunihiko Hayashi
a1bf1c60b5 phy: socionext: Add UniPhier AHCI PHY driver support 
Add a driver for PHY interface built into ahci controller implemented
in UniPhier SoCs. This supports PXs2 and PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1598352071-26675-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 17:07:53 +05:30
Kunihiko Hayashi
728776d751 dt-bindings: phy: Add UniPhier AHCI PHY description 
Add DT bindings for PHY interface built into ahci controller implemented
in UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1598352071-26675-2-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 17:07:53 +05:30
Rikard Falkeborn
23bea1be4e phy: qcom-ipq4019-usb: Constify static phy_ops structs 
Their only usages is to assign the address to the data field in the
of_device_id struct, which is a const void pointer. Make them const to
allow the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-9-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
f9781f7f97 phy: samsung-ufs: Constify samsung_ufs_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-8-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
d6541a86ec phy: ralink-usb: Constify ralink_usb_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-7-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
b3c824bb64 phy: lantiq: vrx200-pcie: Constify ltq_vrx200_pcie_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-6-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
b285d2ae91 phy: lantiq: rcu-usb2: Constify ltq_rcu_usb2_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-5-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
fdde71d351 phy: hisilicon; Constify hi3660_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-4-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:36 +05:30
Rikard Falkeborn
2bf314d66f phy: fsl-imx8mq-usb: Constify imx8mq_usb_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:36 +05:30
Rikard Falkeborn
e947ef4d96 phy: cadence: salvo: Constify cdns_salvo_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-2-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:36 +05:30
Li Jun
4708ee3782 phy: freescale: imx8mq-usb: add support for imx8mp usb phy 
Add initial support for imx8mp usb phy support, imx8mp usb has
a silimar phy as imx8mq, which has some different customizations
on clock and low power design when SoC integration.

Signed-off-by: Li Jun <jun.li@nxp.com>
Link: https://lore.kernel.org/r/1598276014-2377-2-git-send-email-jun.li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:34:37 +05:30
Li Jun
e8bd1cd922 dt-bindings: phy-imx8mq-usb: add compatible string for imx8mp usb phy 
Add "fsl,imx8mp-usb-phy" compatible string for imx8mp usb phy, which is
similar with imx8mq usb phy but with some different customizations.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Li Jun <jun.li@nxp.com>
Link: https://lore.kernel.org/r/1598276014-2377-1-git-send-email-jun.li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:34:37 +05:30
Roger Quadros
8836e29bad phy: omap-usb2-phy: fix coding style issues 
Fix checkpatch warnings and sort the include files alphabetically.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200824075127.14902-3-rogerq@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:31:31 +05:30
Vinod Koul
b6cc6cef1c Merge branch 'fixes' into next 2020-08-31 14:31:23 +05:30
Roger Quadros
ad7a7acaed phy: omap-usb2-phy: disable PHY charger detect 
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs.  Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.

This addresses Silicon Errata:
i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS
Presence"

Signed-off-by: Roger Quadros <rogerq@ti.com>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/20200824075127.14902-2-rogerq@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:30:59 +05:30
YueHaibing
c42dcb195b phy: ti: j721e-wiz: Remove duplicate include 
Remove duplicate include file

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200818114721.55464-1-yuehaibing@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-23 21:37:28 +05:30
Sivaprakash Murugesan
afd55e6d1b phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init 
There were some problem in ipq8074 Gen2 PCIe phy init sequence.

1. Few register values were wrongly updated in the phy init sequence.
2. The register QSERDES_RX_SIGDET_CNTRL is a RX tuning parameter
   register which is added in serdes table causing the wrong register
   was getting updated.
3. Clocks and resets were not added in the phy init.

Fix these to make Gen2 PCIe port on ipq8074 devices to work.

Fixes: eef243d04b ("phy: qcom-qmp: Add support for IPQ8074")
Cc: stable@vger.kernel.org
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1596036607-11877-4-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-23 21:20:14 +05:30
Sekhar Nori
f78c40aa86 phy: ti: am654: update PCIe serdes config 
Update PCIe serdes config to latest suggested for
hardware. This fixes cases of failure to enumerate
in Gen2 mode with some cards.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Link: https://lore.kernel.org/r/20200727194603.44636-4-nsekhar@ti.com
[fix typo threshold]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-23 19:40:55 +05:30
Sekhar Nori
b494bbb6c6 phy: ti: am654: simplify return handling 
Checking return value after each regfield write becomes
hard to read quickly as number of writes increase.

Simplify by checking for error only once.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Link: https://lore.kernel.org/r/20200727194603.44636-3-nsekhar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-23 19:39:58 +05:30
Sekhar Nori
c3e60e5a9e phy: ti: am654: simplify regfield handling 
regfield handling in current driver code is made complicated
by having a separate regfield variable for each field which
is allocated individually.

This quickly gets unwieldy once number of regfields increase.
Instead, use an array of regfields which are allocated in a
loop.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Link: https://lore.kernel.org/r/20200727194603.44636-2-nsekhar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-23 19:39:57 +05:30