Nathan Chancellor
ac321eb46e
drm/xe: Add xe_guc_ads.c to uses_generated_oob
...
A recent change added a use of xe_wa_oob.h without adding the file that
uses it to uses_generated_oob, which means xe_wa_oob.h does not get
properly generated before attempting to build the object file:
LINK resolve_btfids
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
drivers/gpu/drm/xe/xe_guc_ads.c:10:10: fatal error: generated/xe_wa_oob.h: No such file or directory
10 | #include <generated/xe_wa_oob.h>
| ^~~~~~~~~~~~~~~~~~~~~~~
After adding '$(obj)/xe_guc_ads.o' to uses_generated_oob, xe_wa_oob.h is
always generated before building the file, resulting in no errors:
LINK resolve_btfids
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
GEN xe_wa_oob.c xe_wa_oob.h
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
Fixes: c151ff5c90 ("drm/xe/lnl: Enable GuC Wa_14019882105")
Signed-off-by: Nathan Chancellor <nathan@kernel.org >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240410-drm-xe-fix-xe_guc_ads-using-xe_wa_oob-v1-1-441f2d8e5d83@kernel.org
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-10 12:19:37 -07:00
Michal Wajdeczko
9c1857d587
drm/xe/guc: Prefer GT oriented asserts in CTB code
...
GuC CTB is related to the GT, so best to use xe_gt_assert().
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404193647.759-2-michal.wajdeczko@intel.com
2024-04-10 19:20:48 +02:00
Michal Wajdeczko
13c5225152
drm/xe/guc: Prefer GT oriented logs in GuC CTB code
...
A platform can have more than one GuC, so we should use GT-oriented
logs to refer to specific GuC.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404193647.759-1-michal.wajdeczko@intel.com
2024-04-10 19:20:46 +02:00
Riana Tauro
797b0e9be0
drm/xe: re-order lmem init check and wait for initialization to complete
...
Lmem init check should be done only after pcode initialization
status is complete. Move lmem init check after pcode status
check. Also wait for a short while after pcode status check
to allow completion of the task.
Failing to do so, can lead to aborting the module load
leaving the system unusable. Wait until the lmem initialization
is complete within a timeout (60s) or till the user aborts.
v2: use bool as return type
re-order the code comment (Rodrigo)
add comment for deferring probe (Himal)
v3: rebase
Signed-off-by: Riana Tauro <riana.tauro@intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240410085005.1126343-3-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-10 12:32:15 -04:00
Riana Tauro
933fd5ffaf
drm/xe: check pcode init status only on root gt of root tile
...
The root tile indicates the pcode initialization is complete
when all tiles have completed their initialization.
So the mailbox can be polled only on the root tile.
Check pcode init status only on root tile and move it to
device probe early as root tile is initialized there.
Also make similar changes in resume paths.
v2: add lock/unlocked version of pcode_mailbox_rw
to allow pcode init to be called in device
early probe (Rodrigo)
v3: add code description about using root tile
change function names to xe_pcode_probe_early
and xe_pcode_init (Rodrigo)
Signed-off-by: Riana Tauro <riana.tauro@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240410085005.1126343-2-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-10 12:32:15 -04:00
Michal Wajdeczko
3df49b2e71
drm/xe: Add SR-IOV info attribute to debugfs
...
As SR-IOV support varies between platforms and the driver can run
in different SR-IOV modes, add debugfs file with these details.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404154431.583-4-michal.wajdeczko@intel.com
2024-04-10 11:26:21 +02:00
Michal Wajdeczko
146e438495
drm/xe: Add proper detection of the SR-IOV PF mode
...
SR-IOV PF mode detection is based on PCI capability as reported by
the PCI dev_is_pf() function and additionally on 'max_vfs' module
parameter which could be also used to disable PF capability even
if SR-IOV PF capability is reported by the hardware.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404154431.583-3-michal.wajdeczko@intel.com
2024-04-10 11:26:18 +02:00
Michal Wajdeczko
e806fac0bd
drm/xe: Add max_vfs module parameter
...
We want to have an option to limit the number of the VFs that the
PF driver will be able to manage. With this limit set to zero we
will also have a way to completely disable the PF functionality.
Since we currently don't support SR-IOV on any platform, we start
with this limit set to zero by default.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404154431.583-2-michal.wajdeczko@intel.com
2024-04-10 11:26:17 +02:00
Michal Wajdeczko
a918e771e6
drm/xe: Check pat.ops before dumping PAT settings
...
We may leave pat.ops unset when running on brand new platform or
when running as a VF. While the former is unlikely, the latter
is valid (future) use case and will cause NPD when someone will
try to dump PAT settings by debugfs.
It's better to check pointer to pat.ops instead of specific .dump
hook, as we have this hook always defined for every .ops variant.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240409105106.1067-2-michal.wajdeczko@intel.com
2024-04-10 11:21:48 +02:00
Michal Wajdeczko
5d6678882d
drm/xe: Assert pat.ops function pointers
...
Make sure that pat.ops (if selected) has all required function
pointers setup. Only .program_media may be omitted if we have
older media version.
This should help avoid late runtime checks against individual
function pointers.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240409105106.1067-1-michal.wajdeczko@intel.com
2024-04-10 11:21:47 +02:00
Gustavo Sousa
7cd05ef89c
drm/xe/xe2hpm: Add initial set of workarounds
...
Define the initial set of workarounds for Xe2_HPM.
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-12-balasubramani.vivekanandan@intel.com
2024-04-09 14:22:04 -07:00
Shekhar Chauhan
e391ab659b
drm/xe/xe2hpg: Introduce performance tuning changes for Xe2_HPG.
...
Introduces performance tuning guide changes for Xe_HPG.
v2: Switched to open upper bound for "Tuning: L3 Cache" setting.
BSpec: 72161
Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-11-balasubramani.vivekanandan@intel.com
2024-04-09 14:22:04 -07:00
Haridhar Kalvala
7f3ee7d880
drm/xe/xe2hpg: Add initial GT workarounds
...
Add the initial set of Xe2_HPG gt/engine/lrc workarounds.
v2: Removed WA_16020183090 which is no more applicable
Extended WA_18033852989,18034896535 also to xe2hpg
Signed-off-by: Haridhar Kalvala <haridhar.kalvala@intel.com >
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com >
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Dnyaneshar Bhadane <dnyaneshwar.bhadane@intel.com >
Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-10-balasubramani.vivekanandan@intel.com
2024-04-09 14:22:04 -07:00
Bommu Krishnaiah
74671d23ca
drm/xe/xe2: Add workaround 18034896535
...
Add 18034896535 as driver permanent workaround.
v2: 18034896535 and 16021540221 are two independent workarounds
that just happen to have the same implementation, hence keeping it.
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com >
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com >
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-9-balasubramani.vivekanandan@intel.com
2024-04-09 14:22:04 -07:00
Akshata Jahagirdar
e9c22984e9
drm/xe/xe2hpg: Remove extra allocation of CCS pages for dgfx
...
On Xe2 dGPU, compression is only supported with VRAM. When copying from
VRAM -> system memory the KMD uses mapping with uncompressed PAT
so the copy in system memory is guaranteed to be uncompressed.
When restoring such buffers from system memory -> VRAM the KMD can't
easily know which pages were originally compressed, so we always use
uncompressed -> uncompressed here.
so this means that there's no need for extra CCS storage on such
platforms.
v2: More description added to commit message
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-8-balasubramani.vivekanandan@intel.com
2024-04-09 14:22:04 -07:00
Himal Prasad Ghimiray
b5c2ca0372
drm/xe/xe2hpg: Determine flat ccs offset for vram
...
on Xe2 dgfx platform determine the offset using Flat CCS size
bitfield of XE2_FLAT_CCS_BASE_RANGE_[UPPER/LOWER] mcr registers.
v2: function argument tile_size changed from pass by reference to pass
by value
Bspec: 68023
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com >
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-7-balasubramani.vivekanandan@intel.com
2024-04-09 14:21:52 -07:00
Matt Roper
183620f9ae
drm/xe/bmg: Program an additional discrete-specific PAT setting
...
Discrete Xe2 platforms require programming of one additional row of PAT
settings which controls the access characteristics for PPGTT and LMTT
page tables. Integrated GPUs do not need this programming and will
leave the register at its hardware default value.
Bspec: 71582
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-6-balasubramani.vivekanandan@intel.com
2024-04-09 14:18:48 -07:00
Balasubramani Vivekanandan
bdf59bbd9a
drm/xe/bmg: Add BMG mocs table
...
BMG uses the same MOCS table as LNL.
Bpsec: 71582
CC: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-5-balasubramani.vivekanandan@intel.com
2024-04-09 14:18:48 -07:00
Matt Roper
27cc23111a
drm/xe/bmg: Add BMG platform definition
...
BMG is a discrete GPU based on the Xe2 architecture.
No device ids are bound to the BMG platform descriptor yet.
BMG device ids will be added once we have all the basic required
platform enabling patches landed.
v2: Removed device ids, deferring it to a later patch
v3: Squash in compat header IS_BATTLEMAGE() patch. (Lucas)
Bspec: 68090
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-4-balasubramani.vivekanandan@intel.com
2024-04-09 14:17:39 -07:00
Matt Roper
90d308655e
drm/xe/xe2: Recognize Xe2_HPM IP
...
Xe2_HPM uses the same general feature flags as Xe2_LPM. Xe2_HPM is
identified as version 13.01 in the GMD_ID register.
Bspec: 68090, 67163
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-3-balasubramani.vivekanandan@intel.com
2024-04-09 13:57:11 -07:00
Matt Roper
8d315b803b
drm/xe/xe2: Recognize Xe2_HPG IP
...
Xe2_HPG uses the same general feature flags as Xe2_LPG. Xe2_HPG is
identified as version 20.01 in the GMD_ID register.
Bspec: 68090
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-2-balasubramani.vivekanandan@intel.com
2024-04-09 13:57:03 -07:00
Karthik Poosa
883232b47b
drm/xe/hwmon: Cast result to output precision on left shift of operand
...
Address potential overflow in result of left shift of a
lower precision (u32) operand before assignment to higher
precision (u64) variable.
v2:
- Update commit message. (Himal)
Fixes: 4446fcf220 ("drm/xe/hwmon: Expose power1_max_interval")
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com >
Cc: Badal Nilawar <badal.nilawar@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405130127.1392426-5-karthik.poosa@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-09 09:57:55 -07:00
Karthik Poosa
a50b794c92
drm/xe/hwmon: Update xe_hwmon_get_reg to return struct xe_reg
...
Return struct xe_reg instead of reg.raw from xe_hwmon_get_reg
to have abstracted usage of struct xe_reg.
v2:
- Use xe_reg_is_valid function instead of XE_REG_IS_VALID macro
as it is removed.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405130127.1392426-3-karthik.poosa@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-09 09:57:44 -07:00
Karthik Poosa
b39c7056d0
drm/xe: Define xe_reg_is_valid
...
Add a function to check if struct xe_reg has valid address.
v2:
- Rebase.
- Make xe_reg_is_valid as inline function instead of a macro. (Badal).
- Update commit msg.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405130127.1392426-2-karthik.poosa@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-09 09:57:31 -07:00
Badal Nilawar
c151ff5c90
drm/xe/lnl: Enable GuC Wa_14019882105
...
Enable GuC Wa_14019882105 to block interrupts during C6 flow
when the memory path has been blocked
v2: Make helper function generic and name it as
guc_waklv_enable_simple (John Harrison)
v3: Make warning descriptive (John Harrison)
v4: s/drm_WARN/xe_gt_WARN/ (Michal)
Cc: John Harrison <john.harrison@intel.com >
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: John Harrison <John.C.Harrison@Intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405084231.3620848-3-badal.nilawar@intel.com
2024-04-09 12:54:04 +02:00
Badal Nilawar
d6da81a478
drm/xe/guc: Add support for workaround KLVs
...
To prevent running out of bits, new workaround (w/a) enable flags are
being added via a KLV system instead of a 32 bit flags word.
v2: GuC version check > 70.10 is not needed as base line xe doesnot
support anything below < 70.19
v3: Use 64 bit ggtt address for future
compatibility (John Harrison/Daniele)
v4: %s/PAGE_SIZE/SZ_4K/ (Michal)
Cc: John Harrison <John.C.Harrison@intel.com >
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: John Harrison <John.C.Harrison@Intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405084231.3620848-2-badal.nilawar@intel.com
2024-04-09 12:54:02 +02:00
Matthew Brost
1db3594c59
drm/xe: Capture GuC CT snapshot when stopped
...
It is useful capture the GuC CT snapshot if the GuC CT has been
forcefully put into the stopped state. Enable snapshot capture when in
this state.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405211632.223568-3-matthew.brost@intel.com
2024-04-08 14:47:39 -07:00
Matthew Brost
0417a5f848
drm/xe: Always capture exec queues on snapshot
...
Always capture exec queues on snapshot regardless if exec queue has
pending jobs or not. Having jobs or not does indicate whether the exec
queue capture is useful.
Example bugs that would not be easily detected by skipping capture when
pending job list is empty:
- Jobs pending on exec queue have dependencies
- Leaking exec queue refs
- GuC protocol issues (i.e. losing G2H)
In addition to above bugs, in general it just useful to see every exec
queue registered with the GuC and its state.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405211632.223568-2-matthew.brost@intel.com
2024-04-08 14:47:37 -07:00
Francois Dugast
31ced035ec
drm/xe/uapi: Restore flags VM_BIND_FLAG_READONLY and VM_BIND_FLAG_IMMEDIATE
...
The commit 84a1ed5e67 ("drm/xe/uapi: Remove unused flags") is partially
reverted. At the time, flags not used by user space were removed during
cleanup. Some flags now needed by the compute runtime are brought back in
this commit:
- DRM_XE_VM_BIND_FLAG_READONLY is used to write protect kernel ISA thus
preventing accidental overwrites.
- DRM_XE_VM_BIND_FLAG_IMMEDIATE is used to trigger mapping at the time of
binding in order to prevent faulting at execution time.
The changes in the compute runtime are ready and approved, see link below.
v2: Include a link to the PR in the commit message (Matthew Brost)
v3: Update kernel doc and improve commit message (Lucas De Marchi)
Cc: Mateusz Jablonski <mateusz.jablonski@intel.com >
Cc: Michal Mrozek <michal.mrozek@intel.com >
Cc: Matthew Brost <matthew.brost@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://github.com/intel/compute-runtime/pull/717
Signed-off-by: Francois Dugast <francois.dugast@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240329124403.7-1-francois.dugast@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-08 12:05:30 -07:00
Lucas De Marchi
b611dad092
drm/xe: Remove dead clock code
...
xe_gt_clock_cycles_to_ns() is not called from anywhere after PMU
handling was removed in commit 90a8b23f9b ("drm/xe/pmu: Remove PMU
from Xe till uapi is finalized"). Drop it.
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408151312.2100304-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-08 12:03:19 -07:00
Ashutosh Dixit
dc30c6e714
drm/xe: Label RING_CONTEXT_CONTROL as masked
...
RING_CONTEXT_CONTROL is a masked register.
v2: Also clean up setting register value (Lucas)
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404161256.3852502-1-ashutosh.dixit@intel.com
2024-04-08 08:01:00 -07:00
José Roberto de Souza
335ad807d5
drm/xe: Remove debug message from migrate_clear()
...
This messages is printed a lot and from my understanding it do not
bring any value, so here dropping it.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405153849.44906-1-jose.souza@intel.com
2024-04-08 07:11:02 -07:00
Lucas De Marchi
117de185ed
drm/xe/display: Fix double mutex initialization
...
All of these mutexes are already initialized by the display side since
commit 3fef3e6ff8 ("drm/i915: move display mutex inits to display
code"), so the xe shouldn´t initialize them.
Fixes: 44e694958b ("drm/xe/display: Implement display support")
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Arun R Murthy <arun.r.murthy@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405200711.2041428-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-08 06:41:52 -07:00
Michal Wajdeczko
66cb3ca913
drm/xe/vf: Mark supported firmwares as preloaded
...
On current platforms supported firmwares, like GuC and HuC, must
be loaded by the PF driver. Mark those firmwares as 'preloaded'
so we will skip fetching and loading them on the VF drivers but
still correctly report them as 'running'.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404173814.715-1-michal.wajdeczko@intel.com
2024-04-08 14:58:52 +02:00
Michal Wajdeczko
f2b81483d3
drm/xe/vf: Don't try to read legacy GuC MMIO notification if VF
...
Legacy SOFT_SCRATCH registers are not accessible from the VF. Any
G2H notification posted there will be handled by the PF driver.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405133936.891-4-michal.wajdeczko@intel.com
2024-04-08 14:33:15 +02:00
Michal Wajdeczko
fe4b17c4f7
drm/xe/vf: Don't try to program MOCS if VF
...
VFs drivers don't have access to MOCS registers. It is a PF driver
responsibility to program MOCS according to the HW team guidelines.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405133936.891-3-michal.wajdeczko@intel.com
2024-04-08 14:33:14 +02:00
Michal Wajdeczko
97515d0b3e
drm/xe/vf: Don't emit access to Global HWSP if VF
...
VFs can't access Global HWSP, don't emit questionable MI_FLUSH_DW
while processing a migration job.
Bspec: 52398
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405133936.891-2-michal.wajdeczko@intel.com
2024-04-08 14:33:13 +02:00
Michal Wajdeczko
83787afe06
drm/xe/guc: Initialize GuC ID manager sooner
...
The GuC submission cleanup code may depend on the GuC ID manager,
thus we can't initialize it after registering a submission cleanup
action, as reverse cleanup sequence will destroy GuC ID manager
prior to a call to guc_submit_fini().
Move GuC ID manager initialization up, right after managed mutex
initialization, to have it available during guc_submit_fini().
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240406143946.979-2-michal.wajdeczko@intel.com
2024-04-08 11:22:18 +02:00
Michal Wajdeczko
104f7519db
drm/xe/guc: Use drm_device-managed version of mutex_init()
...
This is safer approach and will help resolve a cleanup ordering
conflict related to the GuC ID manager.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240406143946.979-1-michal.wajdeczko@intel.com
2024-04-08 11:22:17 +02:00
Michal Wajdeczko
1d7d997cd7
drm/xe: Drop xe_vm_assert_held() macro definition from xe_bo.h
...
It is already defined in xe_vm.h and shouldn't be duplicated.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405113844.803-1-michal.wajdeczko@intel.com
2024-04-05 20:01:05 +02:00
Michal Wajdeczko
48651e18bb
drm/xe: Move PTE/PDE bit definitions to proper header
...
We already have dedicated header for GGTT/PPGTT definitions.
It's also cleaner to separate them from implementation macros.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405123520.847-1-michal.wajdeczko@intel.com
2024-04-05 19:58:54 +02:00
Andrzej Hajda
788d2ad60d
drm/xe: fix multicast support for Xe_LP platforms
...
Xe_LP has six sublices per slice.
v2: fixed commit message and subject (Matt)
Bspec: 66696
Fixes: bde5d76785 ("drm/xe: Add helper macro to loop each DSS")
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405-mcr_adlp-v2-1-2fd1e4325ef2@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-05 06:17:40 -07:00
Michal Wajdeczko
f73155654d
drm/xe/guc: Reuse code while debugging GuC params
...
There is no need to duplicate code to print GuC parameters.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404155046.627-2-michal.wajdeczko@intel.com
2024-04-05 12:15:52 +02:00
Michal Wajdeczko
12f95f9900
drm/xe/guc: Prefer GT oriented logs for GuC messages
...
A platform can have more than one GuC, so we should use GT-oriented
logs to correctly identify the source of the message.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404155046.627-1-michal.wajdeczko@intel.com
2024-04-05 12:15:50 +02:00
Bommu Krishnaiah
91b93fae17
drm/xe/xe_hw_engine_class_sysfs: use sysfs_emit() for attr's _show()
...
sprintf() is deprecated for sysfs, use preferred sysfs_emit() instead.
v2: used sysfs_emit instand of sprintf
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com >
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231209235949.54524-3-krishnaiah.bommu@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-04 14:54:51 -04:00
Bommu Krishnaiah
a3c86b6d7b
drm/xe: prefer snprintf over sprintf
...
since the sprintf() function lacks built-in protection against buffer
overflows using the snprintf() function.
v2: Removed hard coded values and used sizeof()
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com >
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231209235949.54524-2-krishnaiah.bommu@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-04 14:54:51 -04:00
Rodrigo Vivi
972d01d0e3
drm/xe: Protect devcoredump access after unbind
...
While we don't have the full flow protection when devcoredump
is accessed after device unbind. Let's at least for now
protect against null dereference:
[ 422.766508] KASAN: null-ptr-deref in range [0x0000000000000000-0x0000000000000007]
[ 423.119584] RIP: 0010:xe_vm_snapshot_free+0x30/0x180 [xe]
While at it, I also fixed a non-standard code-declaration block
on the similar function of xe_guc_submit.
v2: - Use IS_ERR_OR_NULL (Nirmoy)
- Expand to other functions
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Nirmoy Das <nirmoy.das@intel.com >
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240403195044.239766-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-04 14:53:22 -04:00
Himal Prasad Ghimiray
34820967ae
drm/xe/xe_migrate: Cast to output precision before multiplying operands
...
Addressing potential overflow in result of multiplication of two lower
precision (u32) operands before widening it to higher precision
(u64).
-v2
Fix commit message and description. (Rodrigo)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240401175300.3823653-1-himal.prasad.ghimiray@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-03 15:04:56 -04:00
Matthew Brost
37c15c4aae
drm/xe: Use ordered wq for preempt fence waiting
...
Preempt fences can sleep waiting for an exec queue suspend operation to
complete. If the system_unbound_wq is used for waiting and the number of
waiters exceeds max_active this will result in other users of the
system_unbound_wq getting starved. Use a device private work queue for
preempt fences to avoid starvation of the system_unbound_wq.
Even though suspend operations can complete out-of-order, all suspend
operations within a VM need to complete before the preempt rebind worker
can start. With that, use a device private ordered wq for preempt fence
waiting.
v2:
- Add comment about cleanup on failure (Matt R)
- Update commit message (Lucas)
Fixes: dd08ebf6c3 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240401221913.139672-2-matthew.brost@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-03 07:11:00 -07:00
Himal Prasad Ghimiray
9f18b55b6d
drm/xe/xe2: Add workaround 18033852989
...
This workaround applies to RCS engine's context, hence added as
LRC workaround.
v2
- Fix commit description as lrc workaround instead of engine.(Lucas)
v3
- COMMON_SLICE_CHICKEN1 is a masked register, add XE_REG_OPTION_MASKED
flag. (Matt)
BSPEC: 55899
Cc: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240401163806.3821128-1-himal.prasad.ghimiray@intel.com
2024-04-02 12:11:41 -07:00