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Author SHA1 Message Date
Konrad Dybcio
976d321f32 arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994 
This saves a good thousand lines of code, perhaps even
more in the long run.

Co-developed-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-5-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:34:15 -06:00
Konrad Dybcio
76d0b35c7f arm64: dts: qcom: msm8994: Sort hwlock properly 
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:33:35 -06:00
Gustave Monce
e093d1a287 arm64: dts: qcom: msm8994: Fix remaining BLSP errors/mistakes 
* Move 35500 clock-frequency to kitakami (turns out it's a Sony specific)
* Add missing interfaces
* Fix the naming scheme
* Fix up pin assignments to make all BLSPs work
* Add DMA where previously omitted

Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-3-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:32:54 -06:00
Konrad Dybcio
886ddcfe4a arm64: dts: qcom: msm8994: Add SMP2P nodes 
They will be required for bringup of remote processors.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-2-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:31:37 -06:00
Jonathan Albrieux
dcac40943c arm64: dts: qcom: msm8916-longcheer-l8910: Add imu/magnetometer 
BQ Aquaris X5 (Longcheer L8910) has:
 - BMI160 accelerometer and gyroscope sensor
 - AK09911 magnetometer sensor
Add them to the device tree.

This patch depends on patch "arm64: dts: qcom: msm8916: Add blsp_i2c3".

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-4-jonathan.albrieux@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:31:37 -06:00
Jonathan Albrieux
012e19f435 arm64: dts: qcom: msm8916: Add blsp_i2c3 
MSM8916 has another I2C QUP controller that can be enabled on
GPIO 10 and 11.

Add blsp_i2c3 to msm8916.dtsi and disable it by default.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-3-jonathan.albrieux@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:31:36 -06:00
Jonathan Albrieux
b3a6b08828 arm64: dts: qcom: Add device tree for BQ Aquaris X5 (Longcheer L8910) 
BQ Aquaris X5 (Longcheer L8910) is a smartphone using the MSM8916 SoC.

Add device tree with initial support for:

 - SDHCI (internal and external storage)
 - USB Device Mode
 - UART
 - Regulators
 - WiFi/BT
 - Volume buttons
 - Vibrator
 - Touchkeys backlight

This device tree is based on downstream device tree from BQ and from
Longcheer L8915 device tree.

Co-developed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-2-jonathan.albrieux@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:31:31 -06:00
Manivannan Sadhasivam
418b4ee165 arm64: dts: qcom: rb5: Enable PCIe ports and PHY 
RB5 has 3 PCIe ports exposed to connect PCIe client devices. PCIe0 is
connected to QCA6391 chipset and others are available on the HS3
expansion connector. Hence, enable all of them.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210127234221.947306-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:31:31 -06:00
Manivannan Sadhasivam
e53bdfc009 arm64: dts: qcom: sm8250: Add PCIe support 
Add PCIe support for Qcom SM8250 SoC. This SoC has 3 PCIe Gen 3
instances based on Designware IP, out of which PCIe0 has 1 lane support
and the rest have 2 lane support.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[DB: add ddrss_sf_tbu clock]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210127234221.947306-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 16:31:14 -06:00
Vinod Koul
0684074a46 arm64: dts: qcom: Add basic devicetree support for SM8350-MTP board 
Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC
MTP board. This enabled uart node and adds rpmh-regulators present for
this board.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-7-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:48:44 -06:00
Vinod Koul
b7e8f433a6 arm64: dts: qcom: Add basic devicetree support for SM8350 SoC 
Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC.
This adds gcc, pinctrl, reserved memory, uart, cpu nodes for this SoC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-6-vkoul@kernel.org
[bjorn: Adjusted 4th timer interrupt, per input from Sai]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:48:02 -06:00
Vinod Koul
80ad7f3349 dt-bindings: firmware: scm: Add SM8250 and SM8350 compatible 
Add compatible for SM8150 and SM8350 SoCs.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-5-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:46:50 -06:00
Vinod Koul
8767fe36d9 dt-bindings: arm: cpus: Add kryo685 compatible 
Kryo685 is found in SM8350, so add it to the list of cpu compatibles

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-4-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:46:38 -06:00
Vinod Koul
2c1b8ebe92 dt-bindings: arm: qcom: Document SM8350 SoC and boards 
Document the SM8350 SoC binding and also the boards using it.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:45:28 -06:00
Vincent Knecht
5f36d633c2 arm64: dts: qcom: Disable MDSS by default for 8916/8016 devices 
Disable MDSS (Mobile Display Subsystem) by default in msm8916.dtsi
and only explicitly enable it in devices' DT which actually use it.

This leads to faster boot and cleaner logs for other devices,
which also won't have to explicitly disable MDSS to use framebuffer.

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-4-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:44:23 -06:00
Vincent Knecht
b32155ff02 arm64: dts: qcom: Add device tree for Alcatel Idol 3 (4.7") 
The Alcatel Idol 3 (4.7") is a smartphone based on MSM8916.
Add a device tree with support for USB, eMMC, SD-Card, WiFi,
BT, power/volume buttons, vibrator and the following sensors:
magnetometer, accelerometer, gyroscope, ambient light+proximity

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-3-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:44:13 -06:00
Vincent Knecht
bd67534d18 dt-bindings: vendor-prefixes: add Alcatel 
Document vendor prefix for Alcatel

Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-2-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-02-02 14:44:07 -06:00
Sai Prakash Ranjan
46a4359f91 arm64: dts: qcom: sm8250: Add watchdog bark interrupt 
Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SM8250 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/ff0758b158d62e82fd0636f5861115f435f821ac.1611466260.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-26 11:47:08 -06:00
Sai Prakash Ranjan
b094c8f8dd arm64: dts: qcom: sm8150: Add watchdog bark interrupt 
Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SM8150 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/02700a5ac413bf5a7e3a0102233d1d64b47bb2cf.1611466260.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-26 11:47:06 -06:00
Sai Prakash Ranjan
36c436b03c arm64: dts: qcom: sdm845: Add watchdog bark interrupt 
Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SDM845 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/7740e8ef57361d33da64e823b2356da2be0065b8.1611466260.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-26 11:47:00 -06:00
Sai Prakash Ranjan
28cc13e406 arm64: dts: qcom: sc7180: Add watchdog bark interrupt 
Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SC7180 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/535b368f6c22bab7078842d803a73e695f28a751.1611466260.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-26 11:46:58 -06:00
Konrad Dybcio
54b1511e4f arm64: dts: qcom: msm8994-kitakami: Add missing email in the copyright 
I forgot to do this the first time around.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-11-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:18 -06:00
Konrad Dybcio
74d6d0a145 arm64: dts: qcom: msm8994/8994-kitakami: Fix up the memory map 
The previous map was wrong. Fix it up.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-10-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:17 -06:00
Konrad Dybcio
a046032c37 arm64: dts: qcom: msm8994: Fix BLSP2_UART2 node 
Fix up the node to make the peripheral functional.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-9-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:17 -06:00
Konrad Dybcio
e9783584c9 arm64: dts: qcom: msm8994-kitakami: Add VDD_GFX regulator 
This is required for the GPU to function.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-8-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:16 -06:00
Konrad Dybcio
ab8e4a8537 arm64: dts: qcom: msm8994-kitakami: Add uSD card support 
Assign regulators and enable regulator-set-load on
VMMC so as to provide sufficient power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-7-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:15 -06:00
Konrad Dybcio
e8528157b7 arm64: dts: qcom: msm8994-kitakami: Add Synaptics RMI touchscreen 
All Kitakami phones use Synaptics RMI4 touchscreens
attached to the same i2c bus. Configure and enable it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-6-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:15 -06:00
Konrad Dybcio
676b61b479 arm64: dts: qcom: msm/apq8994-kitakami: Add regulator config 
Add regulator config for all Kitakami devices, commonizing where
applicable.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-5-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:14 -06:00
Konrad Dybcio
53364cfcaa arm64: dts: qcom: msm8992/4: Rename vreg_vph_pwr to vph_pwr 
Rename the fixed regulator to follow the common naming scheme

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:13 -06:00
Konrad Dybcio
31d9dbd2ae arm64: dts: qcom: msm8992-libra: Update regulator config 
* Add PMI8994 RPM regulators
* Add missing PM8994 LVSes
* Add comments concerning "missing" regulators

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-3-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:12 -06:00
Konrad Dybcio
1628dfe5f6 arm64: dts: qcom: msm8992-bullhead: Update regulator config 
* Include pm(i)8994 dtsi
* Add PMI8994 RPM regulators
* Add comments concerning "missing" regulators

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-2-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:12 -06:00
Konrad Dybcio
72b312411d arm64: dts: qcom: Add support for remaining Sony Kitakami boards 
This patch adds support for the following Xperias:

* Z3+ [aka Z4 in some regions] (Ivy)
* Z4 Tablet (Karin)
* Z4 Tablet Wi-Fi (Karin_windy) [APQ8094]
* Z5 Compact (Suzuran)
* Z5 Premium (Satsuki)

These devices are very similar in terms of hardware, with main
differences being display panels.

While at it, update comments describing hardware used:
SMB charger seems to not be used after all, PMI8994 charger
is in use instead.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:45:11 -06:00
Konrad Dybcio
0f7273c3da arm64: dts: qcom: msm8992/4: Add RPM Power Domains 
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118161943.105733-2-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-25 12:38:11 -06:00
Manivannan Sadhasivam
3a786086c6 arm64: dts: qcom: Add missing "-thermal" suffix for thermal zones 
The thermal devicetree binding requires the "-thermal" suffix for all
thermal zones. Hence, add the missing suffix for PMIC based thermal
zones.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-8-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-22 13:47:59 -06:00
Eric Biggers
e49c2912db arm64: dts: qcom: sdm630: add ICE registers and clocks 
Add the registers and clock for the Inline Crypto Engine (ICE) to the
device tree node for the sdhci-msm host controller on sdm630.  This
allows sdhci-msm to support inline encryption on sdm630.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210121090140.326380-9-ebiggers@kernel.org
[bjorn: Changed indentation]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-21 11:11:00 -06:00
Dmitry Baryshkov
687cc021d7 arm64: dts: qrb5165-rb5: port thermal zone definitions 
Add thermal zones definitions basing on the downstream kernel.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210119054848.592329-6-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-21 11:08:26 -06:00
Dmitry Baryshkov
681db16a5b arm64: dts: sm8250-mtp: add thermal zones using pmic's adc-tm5 
Port thermal zones definitions from msm-4.19 tree. Enable and add
channel configuration to PMIC's ADC-TM definitions. Declare thermal
zones and respective trip points.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210119054848.592329-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-21 09:41:40 -06:00
Dmitry Baryshkov
28a7eb65d4 arm64: dts: qcom: pm8150x: add definitions for adc-tm5 part 
Define adc-tm5 thermal monitoring part. Individual channes and thermal
zones are to be configured in per-device dts files.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210119054848.592329-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-21 09:41:36 -06:00
AngeloGioacchino Del Regno
6243905da7 arm64: dts: pmi8998: Add the right interrupts for LAB/IBB SCP and OCP 
In commit 208921bae6 ("arm64: dts: qcom: pmi8998: Add nodes for
LAB and IBB regulators") bindings for the lab/ibb regulators were
added to the pmi8998 dt, but the original committer has never
specified what the interrupts were for.
LAB and IBB regulators provide two interrupts, SC-ERR (short
circuit error) and VREG-OK but, in that commit, the regulators
were provided with two different types of interrupts;
specifically, IBB had the SC-ERR interrupt, while LAB had the
VREG-OK one, none of which were (luckily) used, since the driver
didn't actually use these at all.
Assuming that the original intention was to have the SC IRQ in
both LAB and IBB, as per the names appearing in documentation,
fix the SCP interrupt.

While at it, also add the OCP interrupt in order to be able to
enable the Over-Current Protection feature, if requested.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210119174421.226541-8-angelogioacchino.delregno@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-20 19:50:49 -06:00
Robert Foss
d4863ef399 arm64: dts: qcom: sdm845-db845c: Fix reset-pin of ov8856 node 
Switch reset pin of ov8856 node from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW,
this issue prevented the ov8856 from probing properly as it did not respon
to I2C messages.

Fixes: d4919a4456 ("arm64: dts: qcom: sdm845-db845c: Add ov8856 & ov7251
camera nodes")

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://lore.kernel.org/r/20201221100955.148584-1-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-18 22:34:38 -06:00
Dmitry Baryshkov
0fb56bf95c arm64: dts: qcom: qrb5165-rb5: sort nodes alphabetically 
Move swr0 device node to keep alphabetical sorting order of device tree
nodes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210116002346.422479-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-16 09:44:36 -06:00
Dmitry Baryshkov
abf2c58aaa arm64: dts: qcom: qrb5165-rb5: fix uSD pins drive strength 
Lower drive strength for microSD data and CMD pins from 16 to 10. This
fixes spurious card removal issues observed on some boards. Also this
change allows us to re-enable 1.8V support, which seems to work with
lowered drive strength.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Fixes: 53a8ccf1c7 ("arm64: dts: qcom: rb5: Add support for uSD card")
Link: https://lore.kernel.org/r/20201217183341.3186402-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:47:21 -06:00
Matthias Kaehlcke
bc19af98ba arm64: dts: qcom: sc7180: Add labels for cpuN-thermal nodes 
Add labels to the cpuN-thermal nodes to allow board files to use
a phandle instead replicating the node hierarchy when adjusting
certain properties.

Due to the 'sustainable-power' property CPU thermal zones are
more likely to need property updates than other SC7180 zones,
hence only labels for CPU zones are added for now.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210108141648.1.Ia8019b8b303ca31a06752ed6ceb5c3ac50bd1d48@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:29:21 -06:00
Danny Lin
6aabed5526 arm64: dts: qcom: sm8250: Add CPU capacities and energy model 
Power and performance measurements were made using my freqbench [1]
benchmark coordinator, which isolates, offlines, and disables the timer
tick on test CPUs to maximize accuracy. It uses EEMBC CoreMark [2] as
the workload and measures power usage using the PM8150B PMIC's fuel
gauge.

The energy model dynamic-power-coefficient values were calculated with
    DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.

Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.

A Xiaomi Redmi K30S Ultra device running a downstream Qualcomm 4.19
kernel was used for benchmarking to ensure proper frequency scaling and
other low-level controls.

Raw benchmark results can be found in the freqbench repository [3].
Below is a human-readable summary:

Frequency domains: cpu1 cpu4 cpu7
Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
Baseline power usage: 1223 mW

===== CPU 1 =====
Frequencies: 300 403 518 614 691 787 883 979 1075 1171 1248 1344 1420 1516 1612 1708 1804

 300:  1114     3.7 C/MHz     29 mW    6.4 J   39.0 I/mJ   224.5 s
 403:  1497     3.7 C/MHz     33 mW    5.5 J   45.2 I/mJ   167.0 s
 518:  1925     3.7 C/MHz     48 mW    6.3 J   39.7 I/mJ   129.9 s
 614:  2281     3.7 C/MHz     73 mW    8.0 J   31.1 I/mJ   109.6 s
 691:  2566     3.7 C/MHz     46 mW    4.5 J   55.2 I/mJ    97.4 s
 787:  2923     3.7 C/MHz     86 mW    7.4 J   33.8 I/mJ    85.5 s
 883:  3279     3.7 C/MHz     77 mW    5.9 J   42.5 I/mJ    76.2 s
 979:  3635     3.7 C/MHz     65 mW    4.4 J   56.2 I/mJ    68.8 s
1075:  3992     3.7 C/MHz     71 mW    4.4 J   56.2 I/mJ    62.6 s
1171:  4348     3.7 C/MHz    121 mW    6.9 J   36.0 I/mJ    57.5 s
1248:  4633     3.7 C/MHz     79 mW    4.2 J   58.9 I/mJ    54.0 s
1344:  4990     3.7 C/MHz     81 mW    4.0 J   61.7 I/mJ    50.1 s
1420:  5275     3.7 C/MHz     85 mW    4.0 J   61.8 I/mJ    47.4 s
1516:  5632     3.7 C/MHz     88 mW    3.9 J   64.3 I/mJ    44.4 s
1612:  5988     3.7 C/MHz     92 mW    3.8 J   65.4 I/mJ    41.7 s
1708:  6346     3.7 C/MHz     96 mW    3.8 J   66.3 I/mJ    39.4 s
1804:  6701     3.7 C/MHz    105 mW    3.9 J   63.5 I/mJ    37.3 s

===== CPU 4 =====
Frequencies: 710 825 940 1056 1171 1286 1382 1478 1574 1670 1766 1862 1958 2054 2150 2246 2342 2419

 710:  6022     8.5 C/MHz    123 mW    5.1 J   49.1 I/mJ    41.5 s
 825:  7001     8.5 C/MHz    142 mW    5.1 J   49.4 I/mJ    35.7 s
 940:  7987     8.5 C/MHz    164 mW    5.1 J   48.7 I/mJ    31.3 s
1056:  8954     8.5 C/MHz    185 mW    5.2 J   48.3 I/mJ    27.9 s
1171:  9944     8.5 C/MHz    212 mW    5.3 J   46.9 I/mJ    25.2 s
1286: 10926     8.5 C/MHz    235 mW    5.4 J   46.4 I/mJ    22.9 s
1382: 11735     8.5 C/MHz    253 mW    5.4 J   46.4 I/mJ    21.3 s
1478: 12531     8.5 C/MHz    277 mW    5.5 J   45.2 I/mJ    20.0 s
1574: 13335     8.5 C/MHz    306 mW    5.7 J   43.6 I/mJ    18.8 s
1670: 14169     8.5 C/MHz    335 mW    5.9 J   42.2 I/mJ    17.7 s
1766: 14969     8.5 C/MHz    353 mW    5.9 J   42.3 I/mJ    16.7 s
1862: 15800     8.5 C/MHz    444 mW    7.0 J   35.6 I/mJ    15.8 s
1958: 16630     8.5 C/MHz    463 mW    7.0 J   35.9 I/mJ    15.0 s
2054: 17428     8.5 C/MHz    480 mW    6.9 J   36.3 I/mJ    14.4 s
2150: 18238     8.5 C/MHz    496 mW    6.8 J   36.8 I/mJ    13.7 s
2246: 19053     8.5 C/MHz    578 mW    7.6 J   32.9 I/mJ    13.1 s
2342: 19873     8.5 C/MHz    625 mW    7.9 J   31.8 I/mJ    12.6 s
2419: 20522     8.5 C/MHz    675 mW    8.2 J   30.4 I/mJ    12.2 s

===== CPU 7 =====
Frequencies: 844 960 1075 1190 1305 1401 1516 1632 1747 1862 1977 2073 2169 2265 2361 2457 2553 2649 2745 2841

 844:  7172     8.5 C/MHz    155 mW    5.4 J   46.4 I/mJ    34.9 s
 960:  8148     8.5 C/MHz    172 mW    5.3 J   47.4 I/mJ    30.7 s
1075:  9116     8.5 C/MHz    197 mW    5.4 J   46.2 I/mJ    27.4 s
1190: 10105     8.5 C/MHz    220 mW    5.4 J   46.0 I/mJ    24.8 s
1305: 11084     8.5 C/MHz    242 mW    5.5 J   45.8 I/mJ    22.6 s
1401: 11888     8.5 C/MHz    262 mW    5.5 J   45.4 I/mJ    21.0 s
1516: 12859     8.5 C/MHz    297 mW    5.8 J   43.2 I/mJ    19.5 s
1632: 13840     8.5 C/MHz    335 mW    6.1 J   41.3 I/mJ    18.1 s
1747: 14827     8.5 C/MHz    369 mW    6.2 J   40.1 I/mJ    16.9 s
1862: 15800     8.5 C/MHz    395 mW    6.3 J   40.0 I/mJ    15.8 s
1977: 16786     8.5 C/MHz    443 mW    6.6 J   37.9 I/mJ    14.9 s
2073: 17566     8.5 C/MHz    488 mW    6.9 J   36.0 I/mJ    14.2 s
2169: 18395     8.5 C/MHz    620 mW    8.4 J   29.7 I/mJ    13.6 s
2265: 19223     8.5 C/MHz    621 mW    8.1 J   30.9 I/mJ    13.0 s
2361: 20040     8.5 C/MHz    672 mW    8.4 J   29.8 I/mJ    12.5 s
2457: 20852     8.5 C/MHz    696 mW    8.3 J   29.9 I/mJ    12.0 s
2553: 21684     8.5 C/MHz    738 mW    8.5 J   29.3 I/mJ    11.5 s
2649: 22458     8.5 C/MHz    793 mW    8.8 J   28.3 I/mJ    11.1 s
2745: 23314     8.5 C/MHz    875 mW    9.4 J   26.6 I/mJ    10.7 s
2841: 24103     8.5 C/MHz    928 mW    9.6 J   26.0 I/mJ    10.4 s

[1] https://github.com/kdrag0n/freqbench
[2] https://www.eembc.org/coremark/
[3] https://github.com/kdrag0n/freqbench/tree/master/results/sm8250/k30s

Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20210112013255.415253-2-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:29:11 -06:00
Danny Lin
b4791e6955 arm64: dts: qcom: sm8250: Define CPU topology 
sm8250 has a big.LITTLE CPU setup with DynamIQ, so all cores are within
the same CPU cluster and LLC (Last-Level Cache) domain. Define this
topology to help the scheduler make decisions.

Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20210112013255.415253-1-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:29:02 -06:00
Stephan Gerhold
3716a583fe arm64: dts: qcom: msm8916-samsung-a2015: Fix sensors 
When the BMC150 accelerometer/magnetometer was added to the device tree,
the sensors were working without specifying any regulator supplies,
likely because the regulators were on by default and then never turned off.

For some reason, this is no longer the case for pm8916_l17, which prevents
the sensors from working in some cases.

Now that the bmc150_accel/bmc150_magn drivers can enable necessary
regulators, declare the necessary regulator supplies to make the sensors
work again.

Fixes: 079f81acf1 ("arm64: dts: qcom: msm8916-samsung-a2015: Add accelerometer/magnetometer")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210111175358.97171-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:27:49 -06:00
Steev Klimaszewski
6be4ba5467 arm64: dts: sdm850: Add OPP tables for 2.84 and 2.96GHz 
Running cpufreq-hw driver on Lenovo Yoga C630 laptop, the following
warning messages will be seen.

[    3.415340] cpu cpu4: Voltage update failed freq=2841600
[    3.418755] cpu cpu4: failed to update OPP for freq=2841600
[    3.422949] cpu cpu4: Voltage update failed freq=2956800
[    3.427086] cpu cpu4: failed to update OPP for freq=2956800

This is because the cpufreq-hw lookup table of SDM850 provides these two
set-points, but they are missing from OPP table in DT.  Let's create
sdm850.dtsi to add the OPP for them, so that the warning will be gone.

Signed-off-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210112090640.20062-1-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:25:12 -06:00
Caleb Connolly
288ef8a426 arm64: dts: sdm845: add oneplus6/6t devices 
Add initial support for the OnePlus 6 (enchilada) and 6T (fajita) based
on the sdm845-mtp DT with the following functionality:

 * Touch
 * Display
 * GPU
 * Wlan and Bluetooth
 * USB peripheral mode
 * Remoteproc

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210114203057.64541-2-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-15 08:14:20 -06:00
Dmitry Baryshkov
74097d805e arm64: dts: qcom: sm8250: correct sdhc_2 xo clk 
sdhc_2 uses 19200000 Hz clock rather than wrongly specified xo_board
(39400000 Hz). Specify correct clock to fix DLL setup for SDR104 mode.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: c4cf0300be ("arm64: dts: qcom: sm8250: Add support for SDC2")
Link: https://lore.kernel.org/r/20210109011252.3436533-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-14 21:50:24 -06:00
Dmitry Baryshkov
c2c76ddb14 arm64: dts: qcom: qrb5165-rb5: add HDMI audio playback 
Add support for audio output over the HDMI output using Tertiary I2S
and LT9611UXC DSI-to-HDMI bridge.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210115024713.92574-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-01-14 21:11:39 -06:00