Imre Deak
937d02cc79
drm/i915/mtl: Fix HDMI/DP PLL clock selection
...
Select the HDMI specific PLL clock only for HDMI outputs.
Fixes: 62618c7f11 ("drm/i915/mtl: C20 PLL programming")
Cc: Mika Kahola <mika.kahola@intel.com >
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231213220526.1828827-1-imre.deak@intel.com
2023-12-15 09:45:03 +02:00
Ville Syrjälä
8cd53c6b20
drm/i915: Simplify intel_ddi_compute_min_voltage_level()
...
Drop the redundant dev_priv parameters from
intel_ddi_compute_min_voltage_level() to make life easier.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-9-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
2023-12-13 20:50:42 +02:00
Ville Syrjälä
0656afab88
drm/i915/mtl: Calculate the correct voltage level from port_clock
...
On MTL we need to bump the voltage level to only 1 (not 2)
when port clock exceeds 594MHz. Make it so.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-8-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
2023-12-13 20:50:24 +02:00
Ville Syrjälä
46bdb77d8b
drm/i915: Split intel_ddi_compute_min_voltage_level() into platform variants
...
The mess inside intel_ddi_compute_min_voltage_level() is illegible.
Clean it up a bit by splitting the internals into per-platform
functions.
TODO: make it a vfunc?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-7-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
2023-12-13 20:50:16 +02:00
Ville Syrjälä
273361f54e
drm/i915/mtl: Fix voltage_level for cdclk==480MHz
...
Allow MTL to use voltage level 1 for 480MHz cdclk,
instead of the voltage level 2 that it's currently using.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-6-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
2023-12-13 20:50:09 +02:00
Ville Syrjälä
f23fe4d7d7
drm/i915/cdclk: Rewrite cdclk->voltage_level selection to use tables
...
The cdclk->voltage_level if ladders are hard to read, especially as
they're written the other way around compared to how bspec lists
the limits. Let's rewrite them to use simple arrays that gives us
the max cdclk for each voltage level.
v2: Bump the jsl/ehl max cdclk in the table to 652.8 MHz to
accommodate JSL machines in CI that boot with high cdclk
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231211221759.29725-1-ville.syrjala@linux.intel.com
2023-12-13 20:49:40 +02:00
Ville Syrjälä
e1a914aef2
drm/i915/cdclk: Remove the assumption that cdclk divider==2 when using squashing
...
Currently we have a hardcoded assumption that the cdclk divider
(2*cd2x divider) is always 2 when squashing is used. While that
is true for all current platforms it might not hold in the future.
So eliminate the assumption and calculate the correct divider
from the other parameters.
v2: s/cd2x divider/cdclk divider/ (Gustavo)
s/clock/unsquashed_cdclk/ (Gustavo)
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231211221636.29658-1-ville.syrjala@linux.intel.com
2023-12-13 20:49:18 +02:00
Ville Syrjälä
2581547335
drm/i915/cdclk: Give the squash waveform length a name
...
Replace the slightly magic 'size = 16' with a bit more descriptive
name. We'll have another user for this value later on.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-3-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
2023-12-13 20:46:16 +02:00
Ville Syrjälä
e2e1916008
drm/i915/cdclk: s/-1/~0/ when dealing with unsigned values
...
cdclk_pll_is_unknown() used ~0 when checking for the "VCO is
unknown" value, but the assignment uses -1. They are the same
in the end, but let's use the same ~0 form on both sides for
consistency.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-2-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
2023-12-13 20:46:02 +02:00
Ville Syrjälä
e93bffc2ac
drm/i915: Reject async flips with bigjoiner
...
Currently async flips are busted when bigjoiner is in use.
As a short term fix simply reject async flips in that case.
Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9769
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231211081134.2698-1-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
2023-12-13 20:45:43 +02:00
Mika Kahola
3203009fe5
drm/i915/display: Wait for PHY readiness not needed for disabling sequence
...
When going through the disconnection flow we don't need to wait for PHY
readiness and hence we can skip the wait part. For disabling the function
returns false as an indicator that the power is not enabled. After all,
we are not even using the return value when Type-C is disconnecting.
v2: Cleanup for increased readibility (Imre)
BSpec: 65380
For VLK-53734
Signed-off-by: Mika Kahola <mika.kahola@intel.com >
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231212115130.485911-1-mika.kahola@intel.com
2023-12-13 09:54:20 +02:00
Ankit Nautiyal
baf31a20fa
drm/i915/display: Get bigjoiner config before dsc config during readout
...
Currently we get bigjoiner config after the dsc get config, during HW
readout.
Since dsc_get_config now uses bigjoiner flags/pipes to compute DSC PPS
parameter pic_width, this results in a state mismatch when Bigjoiner
and DSC are used together.
So call get bigjoiner config before calling dsc get config function.
Fixes: 8b70b56917 ("drm/i915/vdsc: Fill the intel_dsc_get_pps_config function")
Cc: Suraj Kandpal <suraj.kandpal@intel.com >
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Cc: Animesh Manna <animesh.manna@intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231122064627.905828-1-ankit.k.nautiyal@intel.com
2023-12-13 12:06:12 +05:30
Andrzej Hajda
15d03119ed
drm/i915/display: do not use cursor size reduction on MTL
...
Cursor size reduction is not supported since MTL.
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com >
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231124-cur_size_reduction-v1-1-30495dba475f@intel.com
2023-12-11 15:10:25 -05:00
Jani Nikula
23b392b94a
drm/i915/edp: don't write to DP_LINK_BW_SET when using rate select
...
The eDP 1.5 spec adds a clarification for eDP 1.4x:
> For eDP v1.4x, if the Source device chooses the Main-Link rate by way
> of DPCD 00100h, the Sink device shall ignore DPCD 00115h[2:0].
We write 0 to DP_LINK_BW_SET (DPCD 100h) even when using
DP_LINK_RATE_SET (DPCD 114h). Stop doing that, as it can cause the panel
to ignore the rate set method.
Moreover, 0 is a reserved value for DP_LINK_BW_SET, and should not be
used.
v2: Improve the comments (Ville)
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9081
Tested-by: Animesh Manna <animesh.manna@intel.com >
Reviewed-by: Uma Shankar <uma.shankar@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231205180551.2476228-1-jani.nikula@intel.com
2023-12-11 11:49:09 +02:00
Ville Syrjälä
362a8dba85
drm/i915: Drop irqsave/restore for flip_done_handler()
...
Since flip_done_handler() is always called from the irq handler
we can skip the irqsave/restore dance.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230928152450.30109-2-ville.syrjala@linux.intel.com
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com >
2023-12-09 04:14:28 +02:00
Ville Syrjälä
6128becaea
drm/i915: Stop accessing crtc->state from the flip done irq
...
Assuming crtc->state is pointing at the correct thing for the
async flip commit is nonsense. If we had already queued up multiple
commits this would point at the very lates crtc state even if the
older commits hadn't even happened yet.
Instead properly stage/arm the event like we do for async flips.
Since we don't need to arm multiple of these at the same time we
don't need a list like the normal vblank even processing uses.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230928152450.30109-1-ville.syrjala@linux.intel.com
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com >
2023-12-09 04:13:57 +02:00
Radhakrishna Sripada
872ee9cc02
drm/i915/mtl: Rename the link_bit_rate to clock in C20 pll_state
...
With the cleanup of the misleading clock value to avoid extra
calculations to convert between link_bit_rate and clock, use
one standard "clock" field for the c20 pll which works with
crtc_state->port_clock field.
Cc: Clint Taylor <clinton.a.taylor@intel.com >
Cc: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207221025.2032207-4-radhakrishna.sripada@intel.com
2023-12-08 10:59:52 -08:00
Radhakrishna Sripada
1103672fd6
drm/i915/mtl: Remove misleading "clock" field from C20 pll_state
...
The field link_bit_rate serves as the actual clock value for the C20
pll_state structure. Remove the misleading clock field. The subsequent
patch would rename the link_bit_rate as the clock field.
Cc: Clint Taylor <clinton.a.taylor@intel.com >
Cc: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207221025.2032207-3-radhakrishna.sripada@intel.com
2023-12-08 10:59:52 -08:00
Radhakrishna Sripada
877fd09a12
drm/i915/mtl: Use port clock compatible numbers for C20 phy
...
In C20 pll_state link_bit_rate and clock fields are bit redundant. Since
many of the helpers assume the clock values, which are different from
link_bit_rate for dp2.0, convert the helpers to use the numbers that
are compatible with link_bit_rate.
Currently link_bit_rate is compatible with crtc_state->port_clock. The
function intel_c20pll_calc_port_clock returns the number which is
compatible with crtc_state->port_clock. In order to avoid extra
conversions b/ween clock and link_bit_rate, remove "clock" field from the
C20 pll_state and then rename "link_bit_rate" as "clock".
While at it rely on crtc_state->port_clock during C20 Pll programming.
Cc: Clint Taylor <clinton.a.taylor@intel.com >
Cc: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207221025.2032207-2-radhakrishna.sripada@intel.com
2023-12-08 10:59:51 -08:00
Ville Syrjälä
c6117b33a1
drm/i915/tv: Drop redundant null checks
...
Neither 'tv_mode' or 'color_conversion' can be NULL,
so drop the pointless checks.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:27 +02:00
Ville Syrjälä
e81f48512a
drm/i915: s/cstate/crtc_state/ in intel_get_frame_time_us()
...
Use standard variable name 'crtc_state' instead of 'cstate'.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:23 +02:00
Ville Syrjälä
7f4f756df7
drm/i915: Drop redunant null check from intel_get_frame_time_us()
...
intel_get_frame_time_us() is never called with a NULL crtc_state so
drop the redundant check.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:20 +02:00
Ville Syrjälä
a599d302ae
drm/i915: Drop NULL fb check from intel_fb_uses_dpt()
...
intel_fb_uses_dpt() should not be called with a NULL fb, so
drop the check.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:18 +02:00
Ville Syrjälä
ed1566a982
drm/i915: Drop crtc NULL check from intel_crtc_active()
...
intel_crtc_active() is never called with a NULL crtc. Drop
the redundant NULL check.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:16 +02:00
Ville Syrjälä
f175de44d0
drm/i915: Drop redundant NULL check
...
intel_bios_get_dsc_params() is only called from
gen11_dsi_dsc_compute_config() and it always passes a non-NULL
crtc_state in. Drop the redundant check.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:13 +02:00
Ville Syrjälä
e05a67fdd3
drm/i915: Streamline intel_dsc_pps_read()
...
intel_dsc_pps_read() is rather convoluted. Make it legible.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:11 +02:00
Ville Syrjälä
e81144106e
drm/i915: Fix intel_atomic_setup_scalers() plane_state handling
...
Since the plane_state variable is declared outside the scaler_users
loop in intel_atomic_setup_scalers(), and it's never reset back to
NULL inside the loop we may end up calling intel_atomic_setup_scaler()
with a non-NULL plane state for the pipe scaling case. That is bad
because intel_atomic_setup_scaler() determines whether we are doing
plane scaling or pipe scaling based on plane_state!=NULL. The end
result is that we may miscalculate the scaler mode for pipe scaling.
The hardware becomes somewhat upset if we end up in this situation
when scanning out a planar format on a SDR plane. We end up
programming the pipe scaler into planar mode as well, and the
result is a screenfull of garbage.
Fix the situation by making sure we pass the correct plane_state==NULL
when calculating the scaler mode for pipe scaling.
Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207193441.20206-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2023-12-08 20:32:08 +02:00
Ville Syrjälä
2c12eb36f8
drm/i915: Fix remapped stride with CCS on ADL+
...
On ADL+ the hardware automagically calculates the CCS AUX surface
stride from the main surface stride, so when remapping we can't
really play a lot of tricks with the main surface stride, or else
the AUX surface stride would get miscalculated and no longer
match the actual data layout in memory.
Supposedly we could remap in 256 main surface tile units
(AUX page(4096)/cachline(64)*4(4x1 main surface tiles per
AUX cacheline)=256 main surface tiles), but the extra complexity
is probably not worth the hassle.
So let's just make sure our mapping stride is calculated from
the full framebuffer stride (instead of the framebuffer width).
This way the stride we program into PLANE_STRIDE will be the
original framebuffer stride, and thus there will be no change
to the AUX stride/layout.
Cc: stable@vger.kernel.org
Cc: Imre Deak <imre.deak@intel.com >
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231205180308.7505-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com >
2023-12-08 20:32:03 +02:00
Jouni Högander
10690b8a49
drm/i915/display: Add intel_fb_bo_framebuffer_fini
...
Xe needs intel_fb_bo_framebuffer_fini for taking care of unpinning the fb
and taking reference. In i915 this can be empty.
Also move intel_frontbuffer_get to be done after
intel_fb_bo_framebuffer_init to have reasonable sequences:
intel_fb_bo_framebuffer_init
intel_frontbuffer_get
...
intel_frontbuffer_put
intel_fb_bo_framebuffer_fini
v2: Empty function instead of define
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231207083451.2184562-1-jouni.hogander@intel.com
2023-12-07 17:31:02 +02:00
Maarten Lankhorst
7054b551de
drm/i915/display: Use i915_gem_object_get_dma_address to get dma address
...
Works better for xe like that. obj is no longer const.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231204134946.16219-1-maarten.lankhorst@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com >
2023-12-07 12:38:25 +01:00
Jani Nikula
f270b7087d
drm/i915: use octal permissions in display debugfs
...
Octal permissions are preferred over the symbolics ones.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231205134143.2427661-3-jani.nikula@intel.com
2023-12-07 12:58:51 +02:00
Jani Nikula
77bdb83f0d
drm/i915: pass struct intel_connector to connector debugfs fops
...
Prefer struct intel_connector over struct drm_connector, and unify the
declarations in the fops.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231205134143.2427661-2-jani.nikula@intel.com
2023-12-07 12:58:47 +02:00
Jani Nikula
922181a52d
drm/i915: use intel_connector in intel_connector_debugfs_add()
...
Prefer struct intel_connector over struct drm_connector.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231205134143.2427661-1-jani.nikula@intel.com
2023-12-07 12:58:37 +02:00
Jani Nikula
261200eb70
drm/i915/rpm: add rpm_to_i915() helper around container_of()
...
Reduce the duplication.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231205121545.2338665-1-jani.nikula@intel.com
2023-12-07 12:44:45 +02:00
Luca Coelho
dcdf1bbe82
drm/i915: handle uncore spinlock when not available
...
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Ville Syrjala <ville.syrjala@linux.intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Luca Coelho <luciano.coelho@intel.com >
Reviewed-by: Jouni Högander <jouni.hogander@intel.com >
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231201100032.1367589-1-luciano.coelho@intel.com
2023-12-07 12:07:58 +02:00
Ville Syrjälä
01a39f1c4f
drm/i915: Fix ADL+ tiled plane stride when the POT stride is smaller than the original
...
plane_view_scanout_stride() currently assumes that we had to pad the
mapping stride with dummy pages in order to align it. But that is not
the case if the original fb stride exceeds the aligned stride used
to populate the remapped view, which is calculated from the user
specified framebuffer width rather than the user specified framebuffer
stride.
Ignore the original fb stride in this case and just stick to the POT
aligned stride. Getting this wrong will cause the plane to fetch the
wrong data, and can lead to fault errors if the page tables at the
bogus location aren't even populated.
TODO: figure out if this is OK for CCS, or if we should instead increase
the width of the view to cover the entire user specified fb stride
instead...
Cc: Imre Deak <imre.deak@intel.com >
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231204202443.31247-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
2023-12-05 19:55:19 +02:00
Hans de Goede
4de77156a2
drm/i915/dsi: Use devm_gpiod_get() for all GPIOs
...
soc_gpio_set_value() already uses devm_gpiod_get(), lets be consistent
and use devm_gpiod_get() for all GPIOs.
This allows removing the intel_dsi_vbt_gpio_cleanup() function,
which only function was to put the GPIO-descriptors.
Signed-off-by: Hans de Goede <hdegoede@redhat.com >
Reviewed-by: Andy Shevchenko <andy@kernel.org >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231201161130.23976-1-hdegoede@redhat.com
2023-12-04 16:17:23 +01:00
Andy Shevchenko
1116efbff3
drm/i915/display: Don't use "proxy" headers
...
The driver uses math.h and not util_macros.h.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231129140129.699767-1-andriy.shevchenko@linux.intel.com
2023-12-04 12:14:03 +02:00
Jani Nikula
687eb09b1d
drm/i915/syncmap: squelch a sparse warning
...
The code is fine, really, but tweak it to get rid of the sparse warning:
drivers/gpu/drm/i915/selftests/i915_syncmap.c:80:54: warning: dubious: x | !y
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231129173506.1194437-1-jani.nikula@intel.com
2023-12-04 12:06:26 +02:00
Jouni Högander
5f449ed05d
drm/i915/display: Split i915 specific code away from intel_fb.c
...
We are preparing for Xe driver. Backing object implementation is differing
between i915 and Xe. Split i915 specific code into separate source file
built only for i915.
v9:
- Use ERR_CAST
v8:
- return original error code from intel_fb_bo_lookup_valid_bo on failure
v7:
- drop #include <drm/drm_plane.h>
- s/user_mode_cmd/mode_cmd/
- Use passed i915 pointer instead of to_i915(obj->base.dev)
v6: Add missing intel_fb_bo.[ch]
v5:
- Keep drm_any_plane_has_format check in intel_fb.c
- Use mode_cmd instead of user_mode_cmd for intel_fb_bo_lookup_valid_bo
v4: Move drm_any_plane_has_format check into intel_fb_bo.c
v3: Fix failure handling in intel_framebuffer_init
v2: Couple of fixes to error value handling
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231203114840.841311-5-jouni.hogander@intel.com
2023-12-04 07:26:29 +02:00
Jouni Högander
ae424921a5
drm/i915/display: Handle invalid fb_modifier in intel_fb_modifier_to_tiling
...
Lookup_modifier is returning INTEL_PLANE_CAP_TILING_4 on invalid
fb_modifier value. Use lookup_modifier_or_null in
intel_fb_modifier_to_tiling and return I915_TILING_NONE in case
lookup_modifier_or_null returns null.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231203114840.841311-4-jouni.hogander@intel.com
2023-12-04 07:26:29 +02:00
Jouni Högander
6383f69bd2
drm/i915/display: Convert intel_fb_modifier_to_tiling as non-static
...
We are about to split i915 specific code from intel_fb.c. Convert
intel_fb_modifier_to_tiling as non-static to allow calling it from split
code.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231203114840.841311-3-jouni.hogander@intel.com
2023-12-04 07:26:28 +02:00
Jouni Högander
72207699ff
drm/i915/display: use intel_bo_to_drm_bo in intel_fb.c
...
We are preparing for Xe driver. I915 and Xe object implementation are
differing. Do not use i915_gem_object->base directly. Instead use
intel_bo_to_drm_bo.
Also use drm_gem_object_put instead of i915_gem_object_put. This should be
ok as i915_gem_object_put is really just doing __drm_gem_object_put.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231203114840.841311-2-jouni.hogander@intel.com
2023-12-04 07:26:28 +02:00
Jouni Högander
c952bf11ac
drm/i915/display: use intel_bo_to_drm_bo in intel_fbdev
...
We are preparing for Xe driver. I915 and Xe object implementation are
differing. Do not use i915_gem_object->base directly. Instead use
intel_bo_to_drm_bo.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231115090719.3210079-3-jouni.hogander@intel.com
2023-12-01 17:26:24 +02:00
Jouni Högander
80d20fd991
drm/i915/display: split i915 specific code from intel_fbdev
...
Split out code from intel_fbdev that can not be share between i915 and
xe. Create new i915 specific source/header file intel_fbdev_fb.[ch] which
contains this code.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231115090719.3210079-2-jouni.hogander@intel.com
2023-12-01 17:26:23 +02:00
Mika Kahola
561322c3bc
drm/i915/display: Skip state verification with TBT-ALT mode
...
With TBT-ALT mode we are not programming C20 chip PLL's and
hence we don't need to check state verification. We don't
need to program DP link signal levels i.e.pre-emphasis and
voltage swing either.
This patch fixes dmesg errors like this one
"[drm] ERROR PHY F Write 0c06 failed after 3 retries."
Signed-off-by: Mika Kahola <mika.kahola@intel.com >
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231129122221.1109084-1-mika.kahola@intel.com
2023-12-01 12:21:46 +02:00
Jani Nikula
9f82f1655f
drm/i915: add bool type checks in PIPE_CONF_CHECK_*
...
Avoid bool/int mismatches in state checker macros.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231129173317.1192269-2-jani.nikula@intel.com
2023-12-01 10:42:38 +02:00
Jani Nikula
00cb022753
drm/i915: use PIPE_CONF_CHECK_BOOL() for bool members
...
Don't treat bools as integers.
v2: Rebase
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231129173317.1192269-1-jani.nikula@intel.com
2023-12-01 10:42:26 +02:00
Clint Taylor
562f33836f
drm/i915/dgfx: DGFX uses direct VBT pin mapping
...
DDC pin mapping for DGFX cards uses direct VBT pin mapping
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128190329.1335562-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2023-11-29 14:49:29 -08:00
Balasubramani Vivekanandan
0f82a1b948
drm/i915/display: Fix IP version of the WAs
...
WAs 14011508470, 14011503030 were applied on IP versions beyond which
they are applicable. Fixed the IP version checks for these workarounds.
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231128102451.825242-1-balasubramani.vivekanandan@intel.com
2023-11-29 11:51:50 -08:00