With a newer bootloader SATA might be used in a mPCI slot using a mSATA
card. Enable the SATA controller on the Kontron K-Box LS-230-A which
comes with such a slot.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The RTC interrupt is incorrect and prevents the RTC driver
initialising. In any case, the PCF2127 driver wants an active low
interrupt, which neither the GIC nor the GPIO blocks support.
There is an ISPPT block in the LX2160A, but this is not supported
in mainline kernels. So, just delete the interrupt.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On the i.MX8MN Beacon SOM, there is an RTC chip which is fed power
from the baseboard during power off. The SNVS RTC integrated into
the SoC is not fed power. Depending on the order the modules are
loaded, this can be a problem if the external RTC isn't rtc0.
Make the alias for rtc0 point to the external RTC all the time and
rtc1 point to the SVNS in order to correctly hold date/time over
a power-cycle.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The WiFi chip is capable of communication at SDR104 speeds.
Enable 100Mhz and 200MHz pinmux to support this.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add initial support for dynamic frequency scaling of the main NOC
on imx8mq.
Make DDRC the parent of the NOC (using passive governor) so that the
main NOC is automatically scaled together with DDRC by default.
Support for proactive scaling via interconnect will come on top.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is a new variant 1 of this board available. It features up to four
SerDes lanes for customer use. Add a new device tree which features just
the basic peripherals. A customer will then have to modify or append to
this device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Gateworks Venice GW71xx-0x/GW72xx-0x/GW73xx-0x are development
kits consisting of a GW700x SoM and a Baseboard. Future SoM's such
as the GW701x will create additional combinations.
The GW700x SoM contains:
- i.MX 8M Mini SoC
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller (eeprom/pushbutton/reset/voltage-monitor)
- GbE PHY connected to the i.MX 8M Mini FEC
- Power Management IC
The GW71xx Baseboard contains:
- 1x MiniPCIe Socket with USB2.0, PCIe, and SIM
- 1x RJ45 GbE (i.MX 8M Mini FEC)
- I/O connector with 1x-SPI/1x-I2C/1x-UART/4x-GPIO signals
- PCIe Clock generator
- GPS and accelerometer
- 1x USB 2.0 Front Panel connector
- wide range power supply
The GW72xx Baseboard contains:
- 2x MiniPCIe Socket with USB2.0, PCIe, and SIM
- 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x)
- 1x MicroSD connector
- 1x USB 2.0 Front Panel connector
- 1x SPI connector
- 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of:
RS232 w/ flow-control, RS485, RS422
- PCIe Clock generator
- GPS and accelerometer
- Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S)
- I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C
- wide range power supply
The GW73xx Baseboard contains:
- 3x MiniPCIe Socket with USB2.0, PCIe, and SIM
- 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x)
- 1x MicroSD connector
- 1x USB 2.0 Front Panel connector
- 1x SPI connector
- 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of:
RS232 w/ flow-control, RS485, RS422
- WiFi/BT
- PCIe Clock generator
- GPS and accelerometer
- Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S)
- I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C
- wide range power supply
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" node, and add a
nvmem node which provides soc unique ID to efuse@30350000.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add compatible string to .dtsi files for binding of imx8_soc_info and
device.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have constants, use them. This is just a mechanical change.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is a workaround for a hardware bug in the r3 revision that basically would
stop the system due to traffic on the i2c1 bus. A cpu voltage change would
trigger such traffic and that's what is avoided in order to work around it.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order for the touchscreen interrupt line to work, describe it properly.
Otherwise it can work if defaults are ok, but we cannot be sure.
Fixes: 8f0216b006 ("arm64: dts: Add a device tree for the Librem 5 phone")
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This makes sure the clock tree setup for the dphy is not dependent on
other components.
Without this change bringing up the display can fail like
kernel: phy phy-30a00300.dphy.2: Invalid CM/CN/CO values: 165/217/1
kernel: phy phy-30a00300.dphy.2: for hs_clk/ref_clk=451656000/593999998 ~ 165/217
if LCDIF doesn't set up that part of the clock tree first. This was
noticed when testing the Librem 5 devkit with defconfig. It doesn't
happen when modules are built in.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The wlf,wm8962 driver does not use the clock-names property.
Drop it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The board has it's own RTC chip which is backed by the (optional)
battery and hence preserves data/time on poweroff when that is inserted.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
BUCK3 needs a regulator-enable-ramp-delay since otherwise the board
freezes on etnaviv probe. With this pgc_gpu suspends and resumes as
expected. This must have been always broken since gpcv2 support was
enabled.
We also enable all the regulators needed for Deep Sleep Mode (DSM) as
always-on:
- VDD_SOC supplied by BUCK1
- VDDA_1P8 supplied by BUCK7
- VDDA_0P9 supplied by LDO4
- VDDA_DRAM supplied by LDO3
- NVCC_DRAM supplied by BUCK8
- VDD_DRAM supplied by BUCK5
Finally LDO5 and LDO6 provide VDD_PHY_1V8 and VDD_PHY_0V9 used by the
SOCs MIPI, HDMI and USB IP cores. While we would in theory be able to
turn these off (and I've tested that or LDO6 and mipi with USB disabled)
it is of little practical use atm since USB doesn't runtime suspend so
let's revisit this at a later point.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add sound-spdif card nodes which are supported on imx8mn-evk board.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add sound-wm8524 card nodes which are supported on imx8mn-evk board.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Configure clock rate for audio plls. audio pll1 is used
as parent clock for clocks that is multiple of 8kHz.
audio pll2 is used as parent clock for clocks that is
multiple of 11kHz.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The eSDHC driver has converted to use asynchronous probe.
Let's use fixed index mmcN for eSDHC controllers, so that
we can ignore the effect on usage, and avoid problem on
previous use cases with fixed index mmcblkN.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add interrupt line for RTC node, which is low level active.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Beacon Embeddedworks is launching a development kit based on the
i.MX8M Nano SoC. The kit consists of a System on Module (SOM)
+ baseboard. The SOM has the SoC, eMMC, and Ethernet. The baseboard
has an wm8962 audio CODEC, a PDM microphone, and a single USB OTG.
The baseboard is capable of two different, mutually exclusive video
outputs, so the common items are in the baseboard file. When
the video becomes available, LVDS output will be added to this kit
file, and a second kit file will be added to support HDMI.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit 36e2c7421f ("fs: don't allow splice read/write without
explicit ops") we've required that file operation structures explicitly
enable splice support, rather than falling back to the default handlers.
Most /proc files use the indirect 'struct proc_ops' to describe their
file operations, and were fixed up to support splice earlier in commits
40be821d627c..b24c30c67863, but the mountinfo files interact with the
VFS directly using their own 'struct file_operations' and got missed as
a result.
This adds the necessary support for splice to work for /proc/*/mountinfo
and friends.
Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com>
Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Pull NTB fixes from Jon Mason:
"Bug fix for IDT NTB and Intel NTB LTR management support"
* tag 'ntb-5.11' of git://github.com/jonmason/ntb:
ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
ntb: idt: fix error check in ntb_hw_idt.c
Pull crypto fixes from Herbert Xu:
"Fix a number of autobuild failures due to missing Kconfig
dependencies"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: qat - add CRYPTO_AES to Kconfig dependencies
crypto: keembay - Add dependency on HAS_IOMEM
crypto: keembay - CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on ARCH_KEEMBAY
Pull objtool fix from Ingo Molnar:
"Fix a segfault that occurs when built with Clang"
* tag 'objtool-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
objtool: Fix seg fault with Clang non-section symbols
