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Author SHA1 Message Date
Aurabindo Pillai
8198ace7a0 drm/amd/display: Add register definitions for Beige Goby 
[Why&How]
Adds registers definitions required for Beige Goby initial support.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Chris Park <Chris.Park@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:55 -04:00
Jiansong Chen
2db8378f09 drm/amdgpu: fix GCR_GENERAL_CNTL offset for beige_goby 
beige_goby has similar gc_10_3 ip with sienna_cichlid,
so follow its registers offset setting.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:53 -04:00
Chengming Gui
ece3cbadb4 drm/amd/amdgpu: Enable gfxoff for beige_goby 
Enable gfxoff in driver side based on SMC#73.3

v2: fix typo 'Eanble' --> 'Enable'

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:50 -04:00
Chengming Gui
ac79f42a72 drm/amd/pm: Use the PPTable from VBIOS for beige_goby 
Switch from softPPTable to VBIOS PPTable.

v2: drop extra parens (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:48 -04:00
Tao Zhou
d69d278fc7 drm/amdgpu: add cgls for beige_goby 
Enable cgls to improve the runtime power efficiency.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:45 -04:00
Veerabadhran Gopalakrishnan
e47e4c0e4f drm/amdgpu: enabled VCN3.0 CG for BEIGE GOBY 
Enable VCN CG for BEIGE GOBY

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:33 -04:00
Tao Zhou
a764bef36d drm/amdgpu: enable ih CG for beige_goby 
Enable ih clock gating for beige_goby.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:30 -04:00
Tao Zhou
170c193ffd drm/amdgpu: enable hdp CG and LS for beige_goby 
Enable hdp MGCG and LS for beige_goby.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:28 -04:00
Tao Zhou
5d36b865e4 drm/amdgpu: enable mc CG and LS for beige_goby 
Enable mc CG and LS for beige_goby.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:25 -04:00
Tao Zhou
147de218c2 drm/amdgpu: enable athub/mmhub PG for beige_goby 
Enable athub/mmhub power gating for beige_goby.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:22 -04:00
Tao Zhou
d75caec8a4 drm/amdgpu: support athub cg setting for beige_goby 
Enable athub cg for beige_goby.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:19 -04:00
Tao Zhou
bc6bd46bc3 drm/amdgpu: enable GFX clock gating for beige_goby 
Enable GFX MGCG, CGCG and 3DCG for beige_goby.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:15 -04:00
Chengming Gui
7077b19a38 drm/amd/pm: use macro to get pptable members 
Use macro to get the pptable members for different pptable structures.

v2: abstract the table operations especially get the table members
	to simplify cover the two different pptable structures.
v3: move pptable operations related structures and functions into ppt.c
v4: use macro to simplify the operation to get pptable members
v5: fix parameter reference error and add dump pptable support for
beige_goby

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Evan Quan <Evan.Quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:10 -04:00
Chengming Gui
fbe8115c6a drm/amd/pm: update smu11 driver interface header for beige_goby 
Use new struct name to identify beige_goby pptable
due to extra added fields.

v2: squash in updates (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Evan Quan <Evan.Quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:06 -04:00
Chengming Gui
5ed7715dbb drm/amd/pm: add mode1 support for beige_goby 
Add mode1 reset as the default reset method for beige_goby

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:04 -04:00
Chengming Gui
09c31c778d drm/amd/amdgpu: update golden_setting_10_3_5 for beige_goby 
add mmCGTT_SPI_{RA0/RA1}_CLK_CTRL setting

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:01 -04:00
Veerabadhran Gopalakrishnan
f703d4b6f2 drm/amdgpu: Enable VCN for Beige Goby 
Enabled VCN support for Beige Goby chip

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:58 -04:00
Hawking Zhang
3df8ecc8a1 drm/amdgpu: add gc_10_3_5 golden setting for beige_goby 
execute gc_10_3_5 golden registers one-time initialization

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:53 -04:00
Alex Deucher
77a3e25102 drm/amdgpu: add mmhub client support for beige goby 
For decoding GPUVM page faults.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:50 -04:00
Chengming Gui
c072981910 drm/amd/amdgpu: add psp support for beige_goby 
add general PSP support for beige_goby

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:47 -04:00
Chengming Gui
4d3526690a drm/amd/amdgpu: add smu support for beige_goby 
Use soft-pptable for beige_goby

v2: fix format

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:44 -04:00
Chengming Gui
c86eb51705 drm/amdkfd: add kfd2kgd funcs for beige_goby kfd support 
Add the function pointer.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:42 -04:00
Chengming Gui
5cf607cc35 drm/amdkfd: support beige_goby KFD 
Add KFD support for beige_goby
v2: fix asic name typo
v3: squash in updates (Alex)
v4: squash in needs_atomics fix (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:40 -04:00
Chengming Gui
0e5f4b0988 drm/amd/amdgpu: Use IP discovery table for beige goby 
Rather than gpu info firmware.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:36 -04:00
Chengming Gui
afee60e4c5 drm/amd/amdgpu: support cp_fw_write_wait for beige_goby 
Same as dimgrey_cavefish to support WAIT_REG_MEM packet.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:34 -04:00
Chengming Gui
5663da86c9 drm/amd/amdgpu: add virtual display support for beige_goby 
Add virtual ip block for beige_goby

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:30 -04:00
Chengming Gui
67b35b08e7 drm/amd/amdgpu: configure beige_goby gfx according to gfx 10.3's definition 
The gfx version of beige_goby is 10.3,
identical to sienna_cichlid,
follow the way of sienna_cichlid

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:28 -04:00
Chengming Gui
8760403e19 drm/amd/amdgpu: add sdma ip block for beige_goby 
Enable sdma block for beige_goby, same as sienna_cichlid

v2: share the same setting of sdma instance num with vangogh

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Suggested-by: Alexander Deucher <Alexander.Deucher@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:26 -04:00
Chengming Gui
898319ca1e drm/amd/amdgpu: add gfx ip block for beige_goby 
Enable gfx block for beige_goby, same as dimgrey_cavefish

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:23 -04:00
Chengming Gui
a1dede364b drm/amd/amdgpu: add ih ip block for beige_goby 
Enable ih block for beige_goby, same as dimgrey_cavefish

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:19 -04:00
Chengming Gui
2d527ea6fd drm/amd/amdgpu: add gmc ip block for beige_goby 
Enable gmc block for beige_goby, same as sienna_cichlid

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:17 -04:00
Chengming Gui
aa2caa2ad6 drm/amd/amdgpu: add common ip block for beige_goby 
Same as dimgrey_cavefish
v2: fix comments typo

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:14 -04:00
Chengming Gui
ece6fb068d drm/amd/amdgpu: add mmhub support for beige_goby 
Same as dimgrey_cavefish

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:11 -04:00
Chengming Gui
fd5b4b44e4 drm/amd/amdgpu: initialize IP offset for beige_goby 
Add ip offset definition for beige_goby and initialize it

v2: squash in fixes (Alex)
V3: fix permissions on file (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:09 -04:00
Chengming Gui
8573035a95 drm/amd/amdgpu: add common support for beige_goby 
Add external id and set clock gating for beige_goby

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:06 -04:00
Chengming Gui
d2bfc50de2 drm/amd/amdgpu: add gmc support for beige_goby 
Same as dimgrey_cavefish

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:40:03 -04:00
Chengming Gui
f7b97efef6 drm/amd/amdgpu: add support for beige_goby firmware 
Add support for beige_goby cp/rlc firmware

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:59 -04:00
Chengming Gui
b41f5b7ab0 drm/amd/amdgpu: set asic family and ip blocks for beige_goby 
Same as navi series

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:57 -04:00
Chengming Gui
2542e3c654 drm/amd/amdgpu: set fw load type for beige_goby 
Use direct load for beige_goby

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:49 -04:00
Chengming Gui
6f1695918c drm/amd/amdgpu: add beige_goby asic type 
Add chip type for beige_goby

v2: fix enum count (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:45 -04:00
Aric Cyr
6b8dd1337a drm/amd/display: 3.2.136 
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:43 -04:00
Anthony Koo
41a9e02bb0 drm/amd/display: [FW Promotion] Release 0.0.66 
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:39 -04:00
Wyatt Wood
3ca402375a drm/amd/display: Refactor and add visual confirm for HW Flip Queue 
[Why]
Visual confirm will indicate if driver is programming
the surface address.
Refactor is required because much of the visual confirm
logic is buried deep in the mpcc files.
In addition, visual confirm is not updated during fast updates.

[How]
In order to have visual confirm for driver flips, visual confirm
needs to be updated on every frame, including fast updates.
Add a new hw sequencer interface update_visual_confirm_color,
and a new mpc function pointer set_bg_color.

v2: drop unused variable (Alex)

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:36 -04:00
Nikola Cornij
60d177fdf8 drm/amd/display: Use the correct max downscaling value for DCN3.x family 
[why]
As per spec, DCN3.x can do 6:1 downscaling and DCN2.x can do 4:1. The
max downscaling limit value for DCN2.x is 250, which means it's
calculated as 1000 / 4 = 250. For DCN3.x this then gives 1000 / 6 = 167.

[how]
Set maximum downscaling limit to 167 for DCN3.x

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:32 -04:00
Wayne Lin
bbc49fc032 drm/amd/display: Avoid get/put vblank when stream disabled 
[Why]
amdgpu_dm_crtc_set_crc_source() will call
amdgpu_dm_crtc_configure_crc_source() to enable/disable CRC
generation. However, configuration will be deferred to stream enabled.
If stream is not enabled, current flow will still try to get/put vblank
refcount.

[How]
Return EINVAL to skip actions on vblank refcount when stream is not
enabled.

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Chao-kai Wang <Stylon.Wang@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:28 -04:00
Zhan Liu
67c268a50a drm/amd/display: Correct DPCD revision for eDP v1.4 
[Why]
eDP version and DPCD revision are different. Per VESA
spec, "The DPCD revision for eDP v1.4 is 13h".

SUPPORTED_LINK_RATES is valid since eDP v1.4 (DPCD_REV_13).

[How]
Correct DPCD_REV for eDP v1.4.

Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:25 -04:00
Bhawanpreet Lakha
3bb68cec4d drm/amd/display: Add Overflow check to skip MALL 
[Why]
In some small modes (<200pixels) the stutter period is really big and will cause
overflow. In these cases we shouldnt try to enable MALL as it will exceeds range
of hysteresis timer (this can be seen in some IGT tests where the
plane size is small)

[How]
Compare the stutter_period with the frame time and if we will overflow
there is no point in trying to enable MALL (and see the ASSERT) so we
early exist in this case

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:19 -04:00
Wayne Lin
d98af2725d drm/amd/display: Refactor suspend/resume of Secure display 
[Why]
Once set ROI and do suspend/resume, current flow will not enable
OTG_CRC_CTL again due to we'll defer crc configuration when stream
is enabled.

[How]
Remove current suspend/resume function and have logic implemented into
amdgpu_dm_atomic_commit_tail()

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Chao-kai Wang <Stylon.Wang@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:16 -04:00
Wenjing Liu
f1900a9b0f drm/amd/display: consider channel coding in configure lttpr mode 
[why]
Some lttpr configuration steps are exclusive to 8b/10b channel
coding mode. We need to take channel conding into account.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Acked-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:13 -04:00
Wenjing Liu
37f270c6d8 drm/amd/display: rename perform_link_training_int function 
[why]
The function's name doesn't represent what it actaully does.
The function implements necessary steps for our hardware to
transition from link training mode back to video idle mode.
Therefore, rename the function as dp_transition_to_video_idle
so everyone can understand it.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:39:10 -04:00