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Linus Walleij
7ebfe10ec3 pinctrl: loongson2: Fix some const correctness 
The kernel robot using sparse is complaining like this:

drivers/pinctrl/pinctrl-loongson2.c:212:21: sparse:
 sparse: incorrect type in argument 1 (different address spaces) @@
 expected void const volatile [noderef] __iomem *addr @@
 got void *[noderef] __iomem reg @@
(...)

I think the problem is simply that the register base is defined
as void * __iomem instead of void __iomem * and this is because
of the way const correctness works with pointer infix order.

Fix it up. I think.

Reported-by: kernel test robot <lkp@intel.com>
Cc: zhanghongchen <zhanghongchen@loongson.cn>
Cc: Yinbo Zhu <zhuyinbo@loongson.cn>
Fixes: f73f88acbc ("pinctrl: pinctrl-loongson2: add pinctrl driver support")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-25 11:41:01 +01:00
ZhangPeng
5ead932898 pinctrl: pinconf-generic: add missing of_node_put() 
of_node_put() needs to be called when jumping out of the loop, since
for_each_available_child_of_node() will increase the refcount of node.

Fixes: c7289500e2 ("pinctrl: pinconf-generic: scan also referenced phandle node")
Signed-off-by: ZhangPeng <zhangpeng362@huawei.com>
Link: https://lore.kernel.org/r/20221125070156.3535855-1-zhangpeng362@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-25 10:49:28 +01:00
ZhangPeng
a8acc11643 pinctrl: k210: call of_node_put() 
Since for_each_available_child_of_node() will increase the refcount of
node, we need to call of_node_put() manually when breaking out of the
iteration.

Fixes: d4c34d09ab ("pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver")
Signed-off-by: ZhangPeng <zhangpeng362@huawei.com>
Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Link: https://lore.kernel.org/r/20221122075853.2496680-1-zhangpeng362@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-22 09:35:27 +01:00
Geert Uytterhoeven
ac8a616c32 pinctrl: starfive: Use existing variable gpio 
Use the existing variable "gpio", instead of obtaining the hwirq number
again.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Link: https://lore.kernel.org/r/3b6b8597792a393d0f21b8489dd933663dfd2b90.1669045778.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-22 09:25:30 +01:00
Neil Armstrong
c8b2eb7a38 dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching 
The current pattern for SX1503 and SX1509Q with 16 GPIOs only matches
"gpio0", "gpio1", and "gpio5" instead of "gpio0" to "gpio15" included.

Fix these patterns to match the whole 16 GPIO line names.

Fixes: 29c10bcec5 ("dt-bindings: pinctrl: convert semtech,sx150xq bindings to dt-schema")
Reported-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20221121-sx150xq_bindings_fixup-v1-0-e754f183b611@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-22 09:24:03 +01:00
Niyas Sait
c21dd79e99 pinconf-generic: fix style issues in pin_config_param doc 
Fixes following issues introduced in a  previous commit
to clarify values for pin config pull up and down types.

- replace spaces with tabs to be consistent with rest of the doc
- use capitalization for unit (ohms -> Ohms)

Signed-off-by: Niyas Sait <niyas.sait@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20221117123542.1154252-1-niyas.sait@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-21 14:38:28 +01:00
Ren Zhijie
c0f358fde3 pinctrl: pinctrl-loongson2: fix Kconfig dependency 
If CONFIG_PINCTRL_LOONGSON2=y and CONFIG_OF is not set,
gcc complained about undefined reference:

drivers/pinctrl/pinctrl-loongson2.o: In function `pinconf_generic_dt_node_to_map_all':
pinctrl-loongson2.c:(.text+0x1c4): undefined reference to
`pinconf_generic_dt_node_to_map'

To fix this error, add depends on OF to
config PINCTRL_LOONGSON2.

Fixes: f73f88acbc ("pinctrl: pinctrl-loongson2: add pinctrl driver support")
Signed-off-by: Ren Zhijie <renzhijie2@huawei.com>
Link: https://lore.kernel.org/r/20221121132608.230645-1-renzhijie2@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-21 14:36:03 +01:00
Linus Walleij
d53f77d77f Merge tag 'renesas-pinctrl-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel 
pinctrl: renesas: Updates for v6.2

  - Use dynamic GPIO base on combined pincctrl/gpio controllers on
    SH/R-Mobile SoCs,
  - Miscellaneous improvements.
 2022-11-20 23:34:45 +01:00
Linus Walleij
91dd31146f Merge tag 'intel-pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel 
intel-pinctrl for v6.2-1

* Add Intel Moorefield pin control driver
* Deduplicate COMMUNITY() macro in the Intel pin control drivers
* Switch Freescale GPIO driver to use fwnode instead of of_node
* Miscellaneous clenups here and there

The following is an automated git shortlog grouped by driver:

alderlake:
 -  Deduplicate COMMUNITY macro code

cannonlake:
 -  Deduplicate COMMUNITY macro code

device property:
 -  Introduce fwnode_device_is_compatible() helper

icelake:
 -  Deduplicate COMMUNITY macro code

intel:
 -  Add Intel Moorefield pin controller support
 -  Use temporary variable for struct device
 -  Use str_enable_disable() helper

merrifield:
 -  Use temporary variable for struct device

qcom:
 -  lpass-lpi: Add missed bitfield.h

soc:
 -  fsl: qe: Switch to use fwnode instead of of_node

sunrisepoint:
 -  Deduplicate COMMUNITY macro code

tigerlake:
 -  Deduplicate COMMUNITY macro code
 2022-11-18 09:20:20 +01:00
Geert Uytterhoeven
80d34260f3 pinctrl: renesas: gpio: Use dynamic GPIO base if no function GPIOs 
Since commit 502df79b86 ("gpiolib: Warn on drivers still using
static gpiobase allocation") in gpio/for-next, one or more warnings are
printed during boot on systems where the pin controller also provides
GPIO functionality:

    gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.

Fix this for ARM-based SH/R-Mobile SoCs by:
  1. Taking into account a non-zero GPIO base in the various GPIO chip
     callbacks,
  2. Switching to dynamic allocation of the GPIO base when support for
     legacy function GPIOs is not enabled.

On SuperH SoCs using legacy function GPIOs, the GPIO bases of the GPIO
controller and the GPIO function controller must not be changed, as all
board files rely on the fixed GPIO_* and GPIO_FN_* definitions provided
by the various <cpu/sh*.h> header files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/df2cf30ac4c3cbee726799f32b727c1ebe62819c.1668000684.git.geert+renesas@glider.be
 2022-11-17 20:34:51 +01:00
Niyas Sait
196270c5d6 pinconf-generic: clarify pull up and pull down config values 
PIN_CONFIG_BIAS_PULL_DOWN and PIN_CONFIG_BIAS_PULL_UP values can
be custom or an SI unit such as ohms

Signed-off-by: Niyas Sait <niyas.sait@linaro.org>
Link: https://lore.kernel.org/r/20221115175415.650690-3-niyas.sait@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-17 10:29:54 +01:00
Yinbo Zhu
457ff9fb29 dt-bindings: pinctrl: add loongson-2 pinctrl 
Add the Loongson-2 pinctrl binding with DT schema format using
json-schema.

Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Link: https://lore.kernel.org/r/20221114024942.8111-2-zhuyinbo@loongson.cn
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-17 10:26:06 +01:00
zhanghongchen
f73f88acbc pinctrl: pinctrl-loongson2: add pinctrl driver support 
The Loongson-2 SoC has a few pins that can be used as GPIOs or take
multiple other functions. Add a driver for the pinmuxing.

There is currently no support for GPIO pin pull-up and pull-down.

Signed-off-by: zhanghongchen <zhanghongchen@loongson.cn>
Co-developed-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Link: https://lore.kernel.org/r/20221114024942.8111-1-zhuyinbo@loongson.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-17 10:24:08 +01:00
Sebastian Reichel
da67eff50c dt-bindings: pinctrl: rockchip: further increase max amount of device functions 
Apparently RK3588 pinctrl has 13 different device functions, but dt-validate
only checks for pin configuration being referenced so I did not notice.

Fixes: ed1f77b783 ("dt-bindings: pinctrl: rockchip: increase max amount of device functions")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20221021172012.87954-1-sebastian.reichel@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-17 10:18:48 +01:00
Linus Walleij
9aad576944 Merge tag 'qcom-pinctrl-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel 
Qualcomm pinctrl Devicetree bindings changes for v6.2, part two

Continuation of refactoring and improving Qualcomm pin controller bindings:
1. Narrow compatible combinations in PMIC MPP.
2. Convert several bindings from TXT to DT schema format: QCS404,
   IPQ8074, MSM8660, MSM8916, MSM8960 and MSM8976.
 2022-11-17 10:11:10 +01:00
Neil Armstrong
29c10bcec5 dt-bindings: pinctrl: convert semtech,sx150xq bindings to dt-schema 
This converts the Semtech SX150Xq bindings to dt-schemas, add necessary
bindings documentation to cover all differences between HW variants
and current bindings usage.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221005-mdm9615-sx1509q-yaml-v3-0-e8b349eb1900@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-17 09:58:01 +01:00
Krzysztof Kozlowski
86bfee318b dt-bindings: pinctrl: qcom,msm8976: convert to dtschema 
Convert Qualcomm MSM8976 pin controller bindings to DT schema.  Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').

Changes during conversion: update the list of non-mux pins (like sdc1)
to match Linux driver.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20221110085230.15108-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-11-16 08:56:02 +01:00
Biju Das
41a87e789c pinctrl: renesas: rzg2l: remove unnecessary check from rzg2l_dt_node_to_map() 
This patch removes the unnecessary check from rzg2l_dt_node_to_map()
as the ret value is already negative.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221108191309.3908415-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-11-15 14:09:19 +01:00
Biju Das
d871ea8591 pinctrl: renesas: rzv2m: remove unnecessary check from rzv2m_dt_node_to_map() 
This patch removes the unnecessary check from rzv2m_dt_node_to_map()
as the ret value is already negative.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221108183223.3902097-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-11-15 14:09:16 +01:00
Andy Shevchenko
06de519345 pinctrl: Move for_each_maps() to namespace and hide iterator inside 
First of all, while for_each_maps() is private to pin control subsystem
it's still better to have it put into a namespace.

Besides that, users are not relying on iterator variable, so hide it
inside for-loop.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20221111120048.42968-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-14 14:19:33 +01:00
Thierry Reding
5a00473607 pinctrl: tegra: Separate Tegra194 instances 
Tegra194 has two separate instances of the pin controller, one called
AON (in the always-on domain) and another called "main". Instead of
treating them as a single pin controller, split them up into two
separate controllers. Doing so allows the mapping between the pinmux
and GPIO controllers to be trivial identity mappings and more cleanly
separates the AON from the main IP blocks.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20221104142345.1562750-4-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-14 14:16:46 +01:00
Krzysztof Kozlowski
51cd31ae20 dt-bindings: pinctrl: qcom,msm8960: convert to dtschema 
Convert Qualcomm MSM8960 pin controller bindings to DT schema.  Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221109105140.48196-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-11-14 10:38:25 +01:00
Krzysztof Kozlowski
a4c54f830d dt-bindings: pinctrl: qcom,ipq8074: convert to dtschema 
Convert Qualcomm IPQ8074 pin controller bindings to DT schema.  Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221108142357.67202-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-11-14 10:38:09 +01:00
Krzysztof Kozlowski
aa191ab79a dt-bindings: pinctrl: qcom,msm8660: convert to dtschema 
Convert Qualcomm MSM8660 pin controller bindings to DT schema.  Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107185931.22075-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-11-11 08:59:36 +01:00
Andy Shevchenko
802e19a066 pinctrl: Put space between type and data in compound literal 
It's slightly better to read when compound literal data and type
are separated by a space.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/r/20221109152356.39868-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 10:53:25 +01:00
Wei Li
c12c19877b dt-bindings: pinctrl: Correct the header guard of mt6795-pinfunc.h 
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to
__DTS_MT6795_PINFUNC_H what corresponding with the file name.

Fixes: 81557a7156 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Signed-off-by: Wei Li <liwei391@huawei.com>
Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Jesse Taube
52d13b1d93 pinctrl: freescale: Fix i.MXRT1050 pad names 
The pad names for the i.MXRT1050 were incorrect. Fix them.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Link: https://lore.kernel.org/r/20221107071511.2764628-7-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Jesse Taube
3029752f83 dt-bindings: mmc: fsl-imx-esdhc: add i.MXRT1170 compatible 
Add i.MXRT1170 compatible string to Documentation.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-6-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Jesse Taube
2670918043 dt-bindings: serial: fsl-lpuart: add i.MXRT1170 compatible 
Add i.MXRT1170 compatible string to Documentation.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-5-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Jesse Taube
552766813d dt-bindings: timer: gpt: Add i.MXRT compatible Documentation 
Both the i.MXRT1170 and 1050 have the same GPT timer as "fsl,imx6dl-gpt"
Add i.MXRT to the compatible list.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-4-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Jesse Taube
333f36d1bd dt-bindings: pinctrl: Fix file path for pinfunc include 
Reference to pinfunc.h was wrong. Fix it.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Link: https://lore.kernel.org/r/20221107071511.2764628-3-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Jesse Taube
5da7374e8f dt-bindings: arm: imx: Add i.MXRT compatible Documentation 
Recently the imxrt1050 was added but the cpu compatible node wasn't
added. Add both i.MXRT1170 and 1050 compatibles to fsl.yaml.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-2-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Sam Shih
2c58d8dc9c pinctrl: mediatek: add pull_type attribute for mediatek MT7986 SoC 
Commit fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
add SoC specify 'pull_type' attribute for bias configuration.

This patch add pull_type attribute to pinctrl-mt7986.c, and make
bias_set_combo and bias_get_combo available to mediatek MT7986 SoC.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-7-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Sam Shih
fae82621ac pinctrl: mediatek: extend pinctrl-moore to support new bias functions 
Commit fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo
and mtk_pinconf_bias_get_combo, and make the functions able to support
almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c.

This patch enables pinctrl_moore to support these functions.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-6-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Sam Shih
3476b354c6 pinctrl: mediatek: fix the pinconf register offset of some pins 
Correct the bias-pull-up, bias-pull-down and bias-disable register
offset of mt7986 pin-42 to pin-49, in the original driver, the
relative offset value was erroneously decremented by 1.

Fixes: 360de67280 ("pinctrl: mediatek: add support for MT7986 SoC")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-5-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:43 +01:00
Sam Shih
e66e66f17e dt-bindings: pinctrl: mt7986: add generic bias-pull* support 
Since the bias-pull-{up,down} attribute already defines in pinctrl driver
of mediatek MT7986 SoC, this patch updates bindings to support mediatek
common bias-pull* function.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221106080114.7426-4-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:42 +01:00
Frank Wunderlich
c115e7f51e dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC 
Fix mmc and uart pins after uart splitting.

Some pinmux pins of the mt7986 pinctrl driver is composed of multiple
pinctrl groups, the original binding only allows one pinctrl group
per dts node, this patch sets "maxItems" for these groups and add new
examples to the binding documentation.

Fixes: 65916a1ca9 ("dt-bindings: pinctrl: update bindings for MT7986 SoC")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221106080114.7426-3-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:42 +01:00
Frank Wunderlich
d77a82d677 dt-bindings: pinctrl: update pcie/pwm/spi bindings for MT7986 SoC 
Allow multiple items for pcie, pwm and spi function.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221106080114.7426-2-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:42 +01:00
Jonathan Neuschäfer
6c98ac4212 pinctrl: nuvoton: wpcm450: Fix handling of inverted MFSEL bits 
SCS3SEL and KBCCSEL use inverted logic: Whereas in other fields 0
selects the GPIO function and 1 selects the special function, in these
two fields, 0 selects the special function and 1 selects the GPIO
function.

Adjust the code to handle this quirk.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-3-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:42 +01:00
Jonathan Neuschäfer
4f1d423cd2 pinctrl: nuvoton: wpcm450: Refactor MFSEL setting code 
In preparation for the next patch, which makes the logic around
setting/resetting bits in MFSEL a little more complicated, move that
code to a new function

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-2-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-10 09:19:42 +01:00
Siarhei Volkau
4829297c9b docs/pinctrl: fix runtime pinmuxing example 
The example declares "struct pinctrl *p" but refers to
"foo->p" which isn't declared in the context of the example.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221101205159.1468069-3-lis8215@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:53 +01:00
Siarhei Volkau
c1542be1ef docs/pinctrl: fix pinctrl_select_state examples 
The function requires two arguments.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221101205159.1468069-2-lis8215@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:53 +01:00
Jonathan Neuschäfer
97775ebbe8 pinctrl: nuvoton: wpcm450: Convert irqchip to IRQCHIP_IMMUTABLE 
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning for irqchips that are not marked with
IRQCHIP_IMMUTABLE.

Convert the pinctrl-wpcm450 driver to an immutable irqchip.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221031222833.201322-1-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:53 +01:00
Yassine Oudjana
1e2607a004 dt-bindings: pinctrl: mediatek,pinctrl-mt6795: Improve interrupts description 
Clarify the meaning of sysirq to avoid confusion.

Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221028153505.23741-7-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:53 +01:00
Yassine Oudjana
e7000166e0 dt-bindings: pinctrl: mediatek,pinctrl-mt6795: Fix interrupt count 
The document currently states a maximum of 1 interrupt, but the DT
has 2 specified causing a dtbs_check error. Replace the maximum limit
with a minimum and add per-interrupt descriptions to pass the check.

Fixes: 81557a7156 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221028153505.23741-6-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:53 +01:00
Yassine Oudjana
6c873654bd dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Add MT6797 
Combine MT6797 pin controller document into MT6779 one. reg and
reg-names property constraints are set using conditionals.
A conditional is also used to make interrupt-related properties
required on the MT6779 pin controller only, since the MT6797
controller doesn't support interrupts (or not yet, at least).
drive-strength and slew-rate properties which weren't described
in the MT6779 document before are brought in from the MT6797 one.
Both pin controllers share a common driver core so they should
both support these properties.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221028153505.23741-5-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:53 +01:00
Yassine Oudjana
7e63d92d2c dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Make gpio-ranges optional 
The pin controller can function without specifying gpio-ranges so remove
it from required properties. This is also done in preparation for adding
other pin controllers which currently don't have the gpio-ranges property
defined where they are used in DTS. This allows dtbs_check to pass on
those device trees.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221028153505.23741-4-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:52 +01:00
Yassine Oudjana
c5a402a329 dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Improve description 
The current description mentions having to put the pin controller
node under a syscon node, but this is not the case in the current
MT6779 device tree. This is not actually needed, so replace the
current description with something more generic that describes
the use of the hardware block.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221028153505.23741-3-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-11-09 09:27:52 +01:00
Andy Shevchenko
b14ef61314 pinctrl: intel: Add Intel Moorefield pin controller support 
This driver adds pinctrl support for Intel Moorefield. The IP block
which is called Family-Level Interface Shim is a separate entity in SoC.
The GPIO driver, which supports this pinctrl interface, will be
submitted separately.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
 2022-11-08 16:28:17 +02:00
Krzysztof Kozlowski
5dca9dd7ff dt-bindings: pinctrl: qcom,qcs404: convert to dtschema 
Convert Qualcomm QCS404 pin controller bindings to DT schema.  Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').

Changes during conversion: add sdc1_rclk pins (used in qcs404-evb.dtsi).

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221104161131.57719-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-11-08 11:50:16 +01:00