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Author SHA1 Message Date
Geert Uytterhoeven
7bb9e42435 arm64: dts: renesas: white-hawk: Move aliases and chosen 
The serial console port on White Hawk is located on the CPU board.
Hence move the aliases and chosen nodes containing serial console
configuration from the main White Hawk DTS file to the DTS file that
describes the CPU board.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b03b74f4b5ee3c3e828e753beb334ec43162c132.1662715538.git.geert+renesas@glider.be
 2022-09-19 13:53:46 +02:00
Geert Uytterhoeven
848c82db56 arm64: dts: renesas: r8a779g0: Add RAVB nodes 
Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on
the Renesas R-Car V4H (R8A779G0) SoC.

Based on a larger patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/980e7a62d8dc3a1e2387a2d93a6296625b105506.1662715538.git.geert+renesas@glider.be
 2022-09-19 13:53:46 +02:00
Geert Uytterhoeven
6672f84001 arm64: dts: renesas: white-hawk-cpu: Add push switches 
Describe the three Push Switches on the White Hawk CPU board, so
they can be used for user input.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e18d0d5087a514db611295f5d1e13c950cf7dae7.1662715538.git.geert+renesas@glider.be
 2022-09-19 13:53:46 +02:00
Geert Uytterhoeven
60dc0e87fb arm64: dts: renesas: white-hawk-cpu: Add GP LEDs 
Describe the three General Purpose LEDs on the White Hawk CPU board, so
they can be used as indicator LEDs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/007acd941ef925057f1f9b925ed4e339dbd29a74.1662715538.git.geert+renesas@glider.be
 2022-09-19 13:53:46 +02:00
Geert Uytterhoeven
120c7a5838 arm64: dts: renesas: r8a779g0: Add GPIO nodes 
Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/81176a5e12a5828cdcdd4b107d0b2e5970232c31.1662715538.git.geert+renesas@glider.be
 2022-09-19 13:53:42 +02:00
Geert Uytterhoeven
9c1277a25f arm64: dts: renesas: white-hawk: Add Ethernet sub-board 
Add a DTS file for the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1)
sub-board (RTP8A779G0ASKB0SE0SA000), and include it from the main
r8a779g0-white-hawk.dts.

For now its contents are limited to the Board ID EEPROM.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/991600919513dd05a9a7d9c170c6924baf14d1a2.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:35 +02:00
Geert Uytterhoeven
78c84f4680 arm64: dts: renesas: white-hawk: Add CSI/DSI sub-board 
Add a DTS file for the R-Car V4H White Hawk CSI/DSI sub-board
(RTP8A779G0ASKB0SC0SA000), and include it from the main
r8a779g0-white-hawk.dts.

For now its contents are limited to the Board ID EEPROM.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/265f7782743c539c57906e8207785f8b0d80d5d0.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:35 +02:00
Geert Uytterhoeven
77643815b0 arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMs 
Enable the I2C0 bus on the White Hawk CPU board, and describe the I2C
EEPROMs present on the White Hawk CPU and BreakOut boards.

Based on a larger patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d01cada6f2d3e44dd6cb26cfa8e4ce6382f1fbff.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:34 +02:00
Geert Uytterhoeven
ff77ba0514 arm64: dts: renesas: r8a779g0: Add I2C nodes 
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4H
(R8A779G0) SoC.

Extracted from a larger patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/272fd18fed2d7addfbdb7945ae2134988a7c3a7e.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:34 +02:00
Geert Uytterhoeven
7a8d590de8 arm64: dts: renesas: white-hawk-cpu: Add serial port pin control 
Complete the description of the serial console and the external serial
clock by adding pin control.

Based on larger patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/74c862ef6e46b4af398d9b371ff38fae17b3db05.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:34 +02:00
Geert Uytterhoeven
4cebce2577 arm64: dts: renesas: r8a779g0: Add pinctrl device node 
Add a device node for the Pin Function Controller on the Renesas R-Car
V4H (R8A779G0) SoC.

Based on a larger patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ecddcadd2fad46b1cf4c9be3ec750f360b9730e4.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:34 +02:00
Geert Uytterhoeven
495e36c3a3 arm64: dts: renesas: white-hawk-cpu: Enable watchdog timer 
Enable the watchdog timer on the White Hawk CPU board.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/77a0e29d965032115de1f07ceecb2d5d07db74eb.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:34 +02:00
Geert Uytterhoeven
a43306faee arm64: dts: renesas: r8a779g0: Add RWDT node 
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car V4H (R8A779G0) SoC.

Based on a patch in the BSP by Thanh Quan.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/187904c279be6654ea3deb11b7250b64dd18c3b5.1662715538.git.geert+renesas@glider.be
 2022-09-18 14:53:34 +02:00
Biju Das
5b8adc815b ARM: dts: r9a06g032-rzn1d400-db: Enable CAN1 
The CN10/CN11 on RZ/N1-EB board are headers to add jumpers to select which
CAN interface to route to the real CAN connector J16.

For a normal use case either we need to wire CAN1 or CAN2, but not both.

This patch enables CAN1 and disables CAN2 by default assuming CN10/CN11
is wired for CAN1.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220902062752.56841-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-09-09 12:17:13 +02:00
Biju Das
8419e21aff ARM: dts: r9a06g032: Add CAN{0,1} nodes 
Add CAN{0,1} nodes to R9A06G032 (RZ/N1) SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220830164518.1381632-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-09-09 12:17:13 +02:00
Geert Uytterhoeven
e357955558 MAINTAINERS: Merge ARM/Renesas ARM64 and ARM/SH-Mobile ARM architectures 
There is not much point in having separate entries for the ARM/Renesas
ARM64 and ARM/SH-Mobile ARM architectures, as they have the same
maintainers, use the same development collaboration infrastructure, and
share many files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/a869b8afdc47aa637ebeefcc1ca7bc61244f34b9.1660898008.git.geert+renesas@glider.be
 2022-09-09 12:17:13 +02:00
Geert Uytterhoeven
46ddb8e9e7 Merge tag 'renesas-fixes-for-v6.0-tag1' into renesas-arm-dt-for-v6.1 
Renesas fixes for v6.0

  - Fix the serial console on the Renesas White Hawk development board.
 2022-09-09 12:13:39 +02:00
Kuninori Morimoto
6f67580ca9 arm64: dts: renesas: Add V3H2 Condor-I board support 
This patch adds r8a77980A V3H2 (= r8a77980 ES2) Condor-I board
basic support.

Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87y1v64nko.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-09-02 10:45:12 +02:00
Kuninori Morimoto
6f06a74d7d arm64: dts: renesas: Add r8a77980a.dtsi 
This patch adds r8a77980A V3H2 (= r8a77980 ES2) basic SoC
support. It is using r8a77980 (= V3H) setting as-is for now.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87zgfm4nkw.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-09-02 10:45:12 +02:00
Kuninori Morimoto
33eef07529 arm64: dts: renesas: Add condor-common.dtsi 
We have V3H Condor board, and will have V3H2 Condor-I board.
This patch adds condor-common.dtsi to share the common settings
between these boards.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/871qsy625m.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-09-02 10:45:12 +02:00
Lad Prabhakar
c77543ae7b arm64: dts: renesas: Drop clock-names property from RPC node 
With 'unevaluatedProperties' support implemented, there are a number of
warnings when running dtbs_check:

arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected)
	From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml

The main problem is that the DT bindings do not allow clock-names.
So just drop the clock-names properties from the SoC DTSI files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-09-02 10:44:49 +02:00
Duc Nguyen
1cc6987e50 arm64: dts: renesas: r8a779f0: Add MSIOF nodes 
Add MSIOF nodes for R-Car S4-8.

Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
[thanh: added DMA]
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
[wsa: removed mso clock from clocks-property]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220829124130.2412-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-30 09:54:25 +02:00
Wolfram Sang
13079557ec arm64: dts: renesas: r8a774a1: Put I2C aliases to board files 
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-7-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:17:08 +02:00
Geert Uytterhoeven
8d580c0f53 arm64: dts: renesas: r8a774e1: Rename i2c_dvfs to iic_pmic 
As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to
"iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware
Rev. 1.00.

See also commit a636d8037e ("arm64: dts: renesas: rzg2: Rename
i2c_dvfs to iic_pmic"), which apparently forgot to update RZ/G2H.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7d60653d4d63904dc025a133297a53eb885fa064.1661525361.git.geert+renesas@glider.be
 2022-08-29 09:17:08 +02:00
Wolfram Sang
1d35135672 arm64: dts: renesas: r8a779a0: Put I2C aliases to board files 
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:17:08 +02:00
Wolfram Sang
fb2a16097c arm64: dts: renesas: r8a77990: Put I2C aliases to board files 
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:17:08 +02:00
Wolfram Sang
efab8210e0 arm64: dts: renesas: r8a77980: Put I2C aliases to board files 
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:17:08 +02:00
Wolfram Sang
8cc5dcfaba arm64: dts: renesas: r8a77970: Put I2C aliases to board files 
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:17:08 +02:00
Wolfram Sang
59c1485353 arm64: dts: renesas: r8a779{51|60|65}: Put I2C aliases to board files 
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:17:08 +02:00
Phil Edworthy
39ffd3307f arm64: dts: renesas: rzv2m evk: Enable i2c 
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-4-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:16:56 +02:00
Phil Edworthy
54ac6794df arm64: dts: renesas: r9a09g011: Add i2c nodes 
Add device nodes for the I2C controllers that are not assigned to the
ISP.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-29 09:16:56 +02:00
Geert Uytterhoeven
ab2866f12c arm64: dts: renesas: r8a779g0: Fix HSCIF0 interrupt number 
The interrupt number for the HSCIF0 serial port, which serves as the
serial console on the White Hawk board, is incorrect, causing userspace
to hang immediately as soon as it tries to print something.
Kernel output is unaffected, as it is printed using polling.

Fixes: 987da486d8 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/751dcef40d4534e856ed49b1d5b3a3e8d365ec42.1661419377.git.geert+renesas@glider.be
 2022-08-29 09:12:12 +02:00
Phil Edworthy
73ca80daf7 arm64: dts: renesas: r9a09g011: Add pinctrl node 
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804190846.128370-1-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
72a482dbae arm64: dts: renesas: r9a07g043: Fix SCI{Rx,Tx} interrupt types 
As per the RZ/G2UL Hardware User's Manual (Rev.1.00 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: cf40c9689e ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
13dec051c7 arm64: dts: renesas: r9a07g054: Fix SCI{Rx,Tx} interrupt types 
As per the RZ/V2L Hardware User's Manual (Rev.1.00 Nov, 2021),
the interrupt type of SCI{Rx,Tx} is edge triggered.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: 7c2b8198f4 ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
f3b7bc89c9 arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types 
As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: f9a2adcc9e ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes")
Link: https://lore.kernel.org/r/20220802101534.1401342-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
56f0a373f0 arm64: dts: renesas: r9a07g043: Fix audio clk node names 
Replace the clk node names audio-clk{1,2} with audio{1,2}-clk as per
the device tree specification.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220729084527.388023-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
34fac90f36 arm64: dts: renesas: r9a07g054: Add DMA support to RSPI 
Add DMA properties to RSPI nodes to support DMA operation.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
a43026b811 arm64: dts: renesas: r9a07g044: Add DMA support to RSPI 
Add DMA properties to RSPI nodes to support DMA operation.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:03 +02:00
Biju Das
200d8e0119 arm64: dts: renesas: r9a07g043: Add DMA support to RSPI 
Add DMA properties to RSPI nodes to support DMA operation.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:02 +02:00
Wolfram Sang
7adc69f8ac arm64: dts: renesas: r8a779f0: Add TMU nodes 
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220726210110.1444-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-22 09:46:02 +02:00
Lad Prabhakar
ffd8824174 arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for ETH{0/1} 
The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ3 for ETH0
and ETH1 respectively.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220722151155.21100-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-16 09:37:02 +02:00
Lad Prabhakar
80c4ece67b dt-bindings: interrupt-controller: Add macros for NMI and IRQ0-7 interrupts present on RZ/G2L SoC 
Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on
RZ/G2L (and alike) SoC's so that these can be used in the first cell of
interrupt specifiers.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-16 09:37:01 +02:00
Geert Uytterhoeven
ee8898fd7a arm64: dts: renesas: Add Renesas R8A779MB SoC support 
Add support for the Renesas R-Car H3Ne-1.7G (R8A779MB) SoC, which is a
different grading of the R-Car H3-N (R8A77951) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/862a5eecc850cbb90af86a56513b644b638fb62b.1656072871.git.geert+renesas@glider.be
 2022-08-16 09:31:35 +02:00
Lad Prabhakar
b2c9af5f47 arm64: dts: renesas: r9a07g054: Update pinctrl node to handle GPIO interrupts 
Add required properties in pinctrl node to handle GPIO interrupts.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-15 11:12:29 +02:00
Lad Prabhakar
379478ab09 arm64: dts: renesas: r9a07g054: Add IRQC node 
Add IRQC node to R9A07G054 (RZ/V2L) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-15 11:12:29 +02:00
Lad Prabhakar
989fd5a7fb arm64: dts: renesas: r9a07g044: Update pinctrl node to handle GPIO interrupts 
Add required properties in pinctrl node to handle GPIO interrupts.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-15 11:12:29 +02:00
Lad Prabhakar
5edc51af5b arm64: dts: renesas: r9a07g044: Add IRQC node 
Add IRQC node to R9A07G044 (RZ/G2L) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-15 11:12:28 +02:00
Wolfram Sang
d227fcc390 arm64: dts: renesas: r8a779f0: Add CMT support 
This patch adds CMT{0|1|2|3} device nodes for R-Car S4-8 (r8a779f0) SoC.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220713101447.3804-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-15 11:12:28 +02:00
Wolfram Sang
1ada3e53b7 arm64: dts: renesas: spider-cpu: Enable eMMC0 
This enables the on-board eMMC on the Spider board. Switch SW3 has to be
in the default (neutral) position. Other settings will not be supported
upstream!

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220711134656.277730-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-08-15 11:12:12 +02:00