Commit Graph

1073093 Commits

Author SHA1 Message Date
Arnd Bergmann
7743b59fc0 Merge tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.18 kernel cycle:

- Add battery thermal zones so we can monitor the battery temperature
- Enable charging options on AB8505
- Fix up all the AB8500 and AB8505 nodes in accordance with the new
  schema.
- Fix the mounting matrix for the Janice phone.

* tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ux500: Correct Janice accel mount matrix
  ARM: dts: ux500: Update AB850[05] nodes
  ARM: dts: AB8505: Enable charging options
  ARM: dts: ux500: Add battery thermal zones and NTCs

Link: https://lore.kernel.org/r/CACRpkdaDcEqtSnWzRBnBHVweh2n=Dj3meHG9LND+K0Czb9ORGg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:33:18 +01:00
Arnd Bergmann
8e9e1aeed2 Merge tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.18

  - Document support for the new RZ/V2L SoC and the RZ/V2L SMARC EVK
    board.

* tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: power: renesas,rzg2l-sysc: Document RZ/V2L SoC
  dt-bindings: arm: renesas: Document Renesas RZ/V2L SoC on SMARC EVK

Link: https://lore.kernel.org/r/cover.1644587209.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:30:43 +01:00
Arnd Bergmann
3b34d3a919 Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18

  - External interrupt (INTC-EX) support for the R-Car V3U SoC,
  - Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
    RZ/V2L SMARC EVK development boards,
  - Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
    and Condor development boards,
  - NAND support for the RZ/N1D SoC,
  - DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
  - LVDS support for the R-Car M3-W+ SoC,
  - HDMI output and 9-axis sensor support for the Kingfisher (ULCB
    extension) board,
  - MAX96712 GMSL serializer support for the Falcon development board,
  - MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
    SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
  arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
  arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
  arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
  arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
  arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
  arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
  arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
  dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
  arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
  arm64: dts: renesas: rcar-gen3: Add MOST devices
  arm64: dts: renesas: Miscellaneous whitespace fixes
  arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
  arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
  arm64: dts: renesas: ulcb-kf: Add KF HDMI output
  arm64: dts: renesas: r8a77961: Add lvds0 device node
  arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
  ARM: dts: r9a06g032: Describe the NAND controller
  arm64: dts: renesas: Add GMSL cameras .dtsi
  ...

Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:23:12 +01:00
Arnd Bergmann
4d9b86eb38 Merge tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung pinctrl DTS and driver changes for v5.18

Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.

The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
   depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
   of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
   bank names to new naming, required by dtschema.
   This also includes few cleanups around DTS which are here to avoid
   any merge conflicts.

The Samsung pinctrl driver changes are backwards compatible.  However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.

* tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
  arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
  ARM: dts: s5pv210: align pinctrl with dtschema
  ARM: dts: s3c64xx: align pinctrl with dtschema
  ARM: dts: s3c24xx: align pinctrl with dtschema
  arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
  arm64: dts: exynos: align pinctrl with dtschema in Exynos7
  arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
  ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
  ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
  ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
  ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
  ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
  ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
  ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
  ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
  ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
  ARM: dts: exynos: override pins by label in Peach Pi
  ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
  ARM: dts: exynos: override pins by label in Peach Pit
  ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
  ...

Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:21:48 +01:00
Arnd Bergmann
ab2dad6f9e Merge tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA dts updates for v5.18, part 1
- Cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings

* tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (22 commits)
  ARM: dts: socfpga: cyclone5: align regulator node with dtschema
  ARM: dts: socfpga: arria10: align regulator node with dtschema
  arm64: dts: agilex: align pl330 node name with dtschema
  arm64: dts: stratix10: align pl330 node name with dtschema
  arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema
  arm64: dts: agilex: align mmc node names with dtschema
  arm64: dts: agilex: add board compatible for N5X DK
  arm64: dts: agilex: add board compatible for SoCFPGA DK
  arm64: dts: stratix10: align regulator node names with dtschema
  arm64: dts: stratix10: align mmc node names with dtschema
  arm64: dts: stratix10: move ARM timer out of SoC node
  arm64: dts: stratix10: add board compatible for SoCFPGA DK
  ARM: dts: arria10: add board compatible for SoCFPGA DK
  ARM: dts: arria10: add board compatible for Mercury AA1
  ARM: dts: arria5: add board compatible for SoCFPGA DK
  dt-bindings: clock: intel,stratix10: convert to dtschema
  dt-bindings: intel: document Agilex based board compatibles
  dt-bindings: altera: document Stratix 10 based board compatibles
  dt-bindings: altera: document VT compatibles
  dt-bindings: altera: document Arria 10 based board compatibles
  ...

Link: https://lore.kernel.org/r/20220211112556.98940-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:19:06 +01:00
Arnd Bergmann
7e2d8a61c6 Merge tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.18

1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
 - Add necessary clock controller inputs on Exynos7.
 - Add USB DWC3 supplies.
 - Drop old syscon phandle on Exynos5433.
3. Add initial Exynos850 support and WinLink E850-96 board using it.

* tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7
  arm64: dts: exynos: drop unneeded syscon phandle in Exynos5433 LPASS
  arm64: dts: exynos: align pl330 node name with dtschema
  arm64: dts: exynos: Add initial E850-96 board support
  arm64: dts: exynos: Add initial Exynos850 SoC support
  arm64: dts: exynos: add USB DWC3 supplies to Espresso board
  arm64: dts: exynos: add necessary clock inputs in Exynos7
  arm64: dts: exynos: Align MAX77843 nodes with dtschema on TM2

Link: https://lore.kernel.org/r/20220209145226.184375-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:15:06 +01:00
Arnd Bergmann
76990b47e8 Merge tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.18

1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
 - Add necessary clock controller inputs on Exynos5260.
 - Drop unsupported regulators on Odroid XU.
 - Add USB DWC3 supplies.
 - Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
   S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
   Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
   10.1).

* tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (22 commits)
  ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
  ARM: dts: exynos: add charger and battery to p4note
  ARM: dts: exynos: update dma node name with dtschema
  ARM: dts: exynos: use define for TMU clock on Exynos4412
  ARM: dts: exynos: drop old thermal properties from Exynos4210
  ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
  ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
  ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
  ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
  ARM: dts: exynos: add USB DWC3 supplies to Arndale
  ARM: dts: exynos: Add support for Samsung Klimt WiFi
  dt-bindings: arm: samsung: document Klimt WiFi board binding
  ARM: dts: exynos: Add support for Samsung Chagall WiFi
  dt-bindings: arm: samsung: document Chagall WiFi board binding
  ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
  ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
  ...

Link: https://lore.kernel.org/r/20220209145226.184375-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:13:51 +01:00
Arnd Bergmann
9d28fe1bec Merge tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Tesla FSD ARM64 changes for v5.18

Add Tesla FSD SoC ARM64 platform: bindings, DTSI+DTS, maintainer's entry
and defconfig change.  This brings and enables this new platform.

This includes clock controller bindings (header files with clock IDs)
which are shared also with Tesla FSD SoC clock controller pull request.

* tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: fsd: Add SPI device nodes
  arm64: defconfig: Enable Tesla FSD SoC
  arm64: dts: fsd: Add initial pinctrl support
  arm64: dts: fsd: Add initial device tree support
  dt-bindings: clock: Document FSD CMU bindings
  dt-bindings: clock: Add bindings definitions for FSD CMU blocks
  dt-bindings: arm: add Tesla FSD ARM SoC
  dt-bindings: add vendor prefix for Tesla

Link: https://lore.kernel.org/r/20220204154112.133723-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:12:12 +01:00
Linus Walleij
cbc72c0f27 ARM: dts: ux500: Correct Janice accel mount matrix
The Z axis is actually correct: do not invert it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11 22:49:26 +01:00
Linus Walleij
218b2f8885 ARM: dts: ux500: Update AB850[05] nodes
The new YAML device tree bindings gives new and proper names
to several of the AB850[05] nodes and redefines the way we
use numbering on PWMs to use reg.

Update all the DTS nodes accordingly.

Add the missing thermal node to the AB8505.

Drop the debugfs nodes because these are not real devices.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11 22:49:22 +01:00
Linus Walleij
1afc8a287f ARM: dts: AB8505: Enable charging options
These are not disabled on the AB8500 and after testing we
see they work fine, so enable them on AB8505 too.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11 22:49:13 +01:00
Dinh Nguyen
0f7b715101 ARM: dts: socfpga: cyclone5: align regulator node with dtschema
Fixes dtbs_check warnings like:

'3-3-v-regulator' does not match any of the regexes: '.*-names$'

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>:wq
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 20:58:10 -06:00
Dinh Nguyen
bd702d3a85 ARM: dts: socfpga: arria10: align regulator node with dtschema
Fixes dtbs_check warnings like:

'3-3-v-regulator' does not match any of the regexes: '.*-names$'

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: fix compile error
2022-02-09 20:58:10 -06:00
Krzysztof Kozlowski
e3e4ffe113 arm64: dts: agilex: align pl330 node name with dtschema
Fixes dtbs_check warnings like:

  pdma@ffda0000: $nodename:0: 'pdma@ffda0000' does not match '^dma-controller(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 20:58:10 -06:00
Krzysztof Kozlowski
180be1b7a3 arm64: dts: stratix10: align pl330 node name with dtschema
Fixes dtbs_check warnings like:

  pdma@ffda0000: $nodename:0: 'pdma@ffda0000' does not match '^dma-controller(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 20:58:10 -06:00
Krzysztof Kozlowski
814927744e arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema
Align the LED node names with dtschema to silence dtbs_check warnings
like:

    leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:47 -06:00
Krzysztof Kozlowski
9ffc4e03dc arm64: dts: agilex: align mmc node names with dtschema
The Synopsys DW MSHC bindings require node name to be 'mmc':

  dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
fae3aa6c82 arm64: dts: agilex: add board compatible for N5X DK
The Intel SoCFPGA N5X SoC Development Kit is a board with
Agilex, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
50ae688a08 arm64: dts: agilex: add board compatible for SoCFPGA DK
The Intel SoCFPGA Agilex 10 SoC Development Kit is a board with
Agilex, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
327a96a1cb arm64: dts: stratix10: align regulator node names with dtschema
The devicetree specification requires that node name should be generic.
The dtschema complains if name does not match pattern, so make the
0.33 V regulator node name more generic.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
8b794ab207 arm64: dts: stratix10: align mmc node names with dtschema
The Synopsys DW MSHC bindings require node name to be 'mmc':

  dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
79f1db278f arm64: dts: stratix10: move ARM timer out of SoC node
The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI).  This fixes dtbs_check warning:

  arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dt.yaml: soc: timer:
    {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 13, 3848], [1, 14, 3848], [1, 11, 3848], [1, 10, 3848]]} should not be valid under {'type': 'object'}
    From schema: dtschema/schemas/simple-bus.yaml

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
1c0bd03532 arm64: dts: stratix10: add board compatible for SoCFPGA DK
The Altera SoCFPGA Stratix 10 SoC Development Kit is a board with
Stratix 10, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
40b01ca3c7 ARM: dts: arria10: add board compatible for SoCFPGA DK
The Altera SoCFPGA Arria 10 SoC Development Kit is a board with Arria 10,
so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
b6662bf5a3 ARM: dts: arria10: add board compatible for Mercury AA1
The Enclustra Mercury AA1 is a module with Arria 10, so it needs its own
compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
0d108c3970 ARM: dts: arria5: add board compatible for SoCFPGA DK
The Altera SoCFPGA Arria V SoC Development Kit is a board with Arria 5,
so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
ad7f9f3ad1 dt-bindings: clock: intel,stratix10: convert to dtschema
Convert the Intel Stratix 10 clock controller bindings to DT schema format.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
abca30aa14 dt-bindings: intel: document Agilex based board compatibles
Add new compatible for Agilex based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
f8aa14dd36 dt-bindings: altera: document Stratix 10 based board compatibles
Add new compatible for Stratix 10 based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
53d50b4f6f dt-bindings: altera: document VT compatibles
Add new compatible for SoCFPGA VT boards/designs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
15dc346c7a dt-bindings: altera: document Arria 10 based board compatibles
Add new compatible for Arria 10 based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
8227e63ddf dt-bindings: altera: document Arria 5 based board compatibles
Add new compatible for Arria 5 based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Krzysztof Kozlowski
b08e569abc dt-bindings: altera: document existing Cyclone 5 board compatibles
Several Cyclone 5 SoCFPGA based boards have additional board compatibles
which are not documented in the bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Biju Das
5c65ad1278 arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
This patch replaces EMMC/SDHI macros with SW_SD0_DEV_SEL DIP-Switch
macro for eMMC/SDHI device selection.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220204143132.3608-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:48:28 +01:00
Biju Das
46da632734 arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
On RZ/G2LC SMARC EVK, CAN0 is not populated.

CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].

This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:59 +01:00
Biju Das
fa00d6dc19 arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
SCIF1 interface is available on PMOD1 connector (CN7) on carrier board.

This patch adds pinmux and scif1 node to carrier board dtsi file for
RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:59 +01:00
Biju Das
2ed3b5d954 arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
RZ/G2LC SoM uses DIP-SWitch SW1 for various pin multiplexing functions.

This patch describes DIP-SWitch SW1 settings on SoM and adds the
corresponding macros for enabling pinmux functionality on RZ/G2LC
SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:59 +01:00
Biju Das
726fd78119 arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
RZ/{G2L,V2L} and G2LC SoC use the same carrier board, but the SoM is
different.

Different pin mapping is possible on SoM. For eg:- RZ/G2L SMARC EVK
uses SCIF2, whereas RZ/G2LC uses SCIF1 for the serial interface available
on PMOD1.

This patch adds support for handling the pin mapping differences by moving
definitions common to RZ/G2L and RZ/G2LC to a common dtsi file.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:58 +01:00
Linus Torvalds
dfd42facf1 Linux 5.17-rc3 v5.17-rc3 2022-02-06 12:20:50 -08:00
Linus Torvalds
d8ad2ce873 Merge tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4
Pull ext4 fixes from Ted Ts'o:
 "Various bug fixes for ext4 fast commit and inline data handling.

  Also fix regression introduced as part of moving to the new mount API"

* tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4:
  fs/ext4: fix comments mentioning i_mutex
  ext4: fix incorrect type issue during replay_del_range
  jbd2: fix kernel-doc descriptions for jbd2_journal_shrink_{scan,count}()
  ext4: fix potential NULL pointer dereference in ext4_fill_super()
  jbd2: refactor wait logic for transaction updates into a common function
  jbd2: cleanup unused functions declarations from jbd2.h
  ext4: fix error handling in ext4_fc_record_modified_inode()
  ext4: remove redundant max inline_size check in ext4_da_write_inline_data_begin()
  ext4: fix error handling in ext4_restore_inline_data()
  ext4: fast commit may miss file actions
  ext4: fast commit may not fallback for ineligible commit
  ext4: modify the logic of ext4_mb_new_blocks_simple
  ext4: prevent used blocks from being allocated during fast commit replay
2022-02-06 10:34:45 -08:00
Linus Torvalds
18118a4298 Merge tag 'perf-tools-fixes-for-v5.17-2022-02-06' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Fix display of grouped aliased events in 'perf stat'.

 - Add missing branch_sample_type to perf_event_attr__fprintf().

 - Apply correct label to user/kernel symbols in branch mode.

 - Fix 'perf ftrace' system_wide tracing, it has to be set before
   creating the maps.

 - Return error if procfs isn't mounted for PID namespaces when
   synthesizing records for pre-existing processes.

 - Set error stream of objdump process for 'perf annotate' TUI, to avoid
   garbling the screen.

 - Add missing arm64 support to perf_mmap__read_self(), the kernel part
   got into 5.17.

 - Check for NULL pointer before dereference writing debug info about a
   sample.

 - Update UAPI copies for asound, perf_event, prctl and kvm headers.

 - Fix a typo in bpf_counter_cgroup.c.

* tag 'perf-tools-fixes-for-v5.17-2022-02-06' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  perf ftrace: system_wide collection is not effective by default
  libperf: Add arm64 support to perf_mmap__read_self()
  tools include UAPI: Sync sound/asound.h copy with the kernel sources
  perf stat: Fix display of grouped aliased events
  perf tools: Apply correct label to user/kernel symbols in branch mode
  perf bpf: Fix a typo in bpf_counter_cgroup.c
  perf synthetic-events: Return error if procfs isn't mounted for PID namespaces
  perf session: Check for NULL pointer before dereference
  perf annotate: Set error stream of objdump process for TUI
  perf tools: Add missing branch_sample_type to perf_event_attr__fprintf()
  tools headers UAPI: Sync linux/kvm.h with the kernel sources
  tools headers UAPI: Sync linux/prctl.h with the kernel sources
  perf beauty: Make the prctl arg regexp more strict to cope with PR_SET_VMA
  tools headers cpufeatures: Sync with the kernel sources
  tools headers UAPI: Sync linux/perf_event.h with the kernel sources
  tools include UAPI: Sync sound/asound.h copy with the kernel sources
2022-02-06 10:18:23 -08:00
Linus Torvalds
c3bf8a1440 Merge tag 'perf_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Borislav Petkov:

 - Intel/PT: filters could crash the kernel

 - Intel: default disable the PMU for SMM, some new-ish EFI firmware has
   started using CPL3 and the PMU CPL filters don't discriminate against
   SMM, meaning that CPL3 (userspace only) events now also count EFI/SMM
   cycles.

 - Fixup for perf_event_attr::sig_data

* tag 'perf_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel/pt: Fix crash with stop filters in single-range mode
  perf: uapi: Document perf_event_attr::sig_data truncation on 32 bit architectures
  selftests/perf_events: Test modification of perf_event_attr::sig_data
  perf: Copy perf_event_attr::sig_data on modification
  x86/perf: Default set FREEZE_ON_SMI for all
2022-02-06 10:11:14 -08:00
Linus Torvalds
aeabe1e074 Merge tag 'objtool_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull objtool fix from Borislav Petkov:
 "Fix a potential truncated string warning triggered by gcc12"

* tag 'objtool_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  objtool: Fix truncated string warning
2022-02-06 10:04:43 -08:00
Linus Torvalds
b72e40b192 Merge tag 'irq_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fix from Borislav Petkov:
 "Remove a bogus warning introduced by the recent PCI MSI irq affinity
  overhaul"

* tag 'irq_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  PCI/MSI: Remove bogus warning in pci_irq_get_affinity()
2022-02-06 10:00:40 -08:00
Linus Torvalds
898b5841ae Merge tag 'edac_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC fixes from Borislav Petkov:
 "Fix altera and xgene EDAC drivers to propagate the correct error code
  from platform_get_irq() so that deferred probing still works"

* tag 'edac_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/xgene: Fix deferred probing
  EDAC/altera: Fix deferred probing
2022-02-06 09:57:39 -08:00
Changbin Du
fceb62124d perf ftrace: system_wide collection is not effective by default
The ftrace.target.system_wide must be set before invoking
evlist__create_maps(), otherwise it has no effect.

Fixes: 53be502822 ("perf ftrace: Add 'latency' subcommand")
Signed-off-by: Changbin Du <changbin.du@gmail.com>
Acked-by: Namhyung Kim <namhyung@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220127132010.4836-1-changbin.du@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-02-06 09:19:51 -03:00
Rob Herring
407eb43ae8 libperf: Add arm64 support to perf_mmap__read_self()
Add the arm64 variants for read_perf_counter() and read_timestamp().
Unfortunately the counter number is encoded into the instruction, so the
code is a bit verbose to enumerate all possible counters.

Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Tested-by: John Garry <john.garry@huawei.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: https://lore.kernel.org/r/20220201214056.702854-1-robh@kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-perf-users@vger.kernel.org
2022-02-06 09:14:27 -03:00
Arnaldo Carvalho de Melo
4f2492731a tools include UAPI: Sync sound/asound.h copy with the kernel sources
Picking the changes from:

  06feec6005 ("ASoC: hdmi-codec: Fix OOB memory accesses")

Which entails no changes in the tooling side as it doesn't introduce new
SNDRV_PCM_IOCTL_ ioctls.

To silence this perf tools build warning:

  Warning: Kernel ABI header at 'tools/include/uapi/sound/asound.h' differs from latest version at 'include/uapi/sound/asound.h'
  diff -u tools/include/uapi/sound/asound.h include/uapi/sound/asound.h

Cc: Dmitry Osipenko <digetx@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/lkml/Yf+6OT+2eMrYDEeX@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-02-06 09:08:46 -03:00
Ian Rogers
b2b1aa73ad perf stat: Fix display of grouped aliased events
An event may have a number of uncore aliases that when added to the
evlist are consecutive.

If there are multiple uncore events in a group then
parse_events__set_leader_for_uncore_aliase will reorder the evlist so
that events on the same PMU are adjacent.

The collect_all_aliases function assumes that aliases are in blocks so
that only the first counter is printed and all others are marked merged.

The reordering for groups breaks the assumption and so all counts are
printed.

This change removes the assumption from collect_all_aliases
that the events are in blocks and instead processes the entire evlist.

Before:

  ```
  $ perf stat -e '{UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE,UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE},duration_time' -a -A -- sleep 1

   Performance counter stats for 'system wide':

  CPU0                  256,866      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 494,413      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      967      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,738      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  285,161      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 429,920      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      955      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,443      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  310,753      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 416,657      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,231      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,573      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  416,067      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 405,966      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,481      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,447      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  312,911      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 408,154      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,086      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,380      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  333,994      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 370,349      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,287      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,335      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  188,107      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 302,423      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      701      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,070      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  307,221      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 383,642      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,036      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,158      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  318,479      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 821,545      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,028      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,550      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  227,618      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 372,272      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      903      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,456      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  376,783      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 419,827      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,406      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,453      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  286,583      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 429,956      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      999      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,436      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  313,867      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 370,159      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,114      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,291      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  342,083      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 409,111      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,399      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,684      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  365,828      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 376,037      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,378      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,411      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  382,456      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 621,743      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,232      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,955      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  342,316      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 385,067      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,176      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,268      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  373,588      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 386,163      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,394      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,464      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  381,206      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 546,891      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,266      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,712      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  221,176      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 392,069      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      831      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,456      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  355,401      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 705,595      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,235      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,216      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  371,436      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 428,103      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,306      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,442      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  384,352      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 504,200      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,468      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,860      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  228,856      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 287,976      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      832      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,060      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  215,121      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 334,162      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      681      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,026      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  296,179      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 436,083      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,084      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,525      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  262,296      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 416,573      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      986      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,533      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  285,852      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 359,842      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,073      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,326      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  303,379      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 367,222      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,008      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,156      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  273,487      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 425,449      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      932      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,367      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  297,596      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 414,793      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,140      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,601      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  342,365      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 360,422      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,291      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,342      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  327,196      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 580,858      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,122      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,014      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  296,564      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 452,817      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,087      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,694      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  375,002      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 389,393      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,478      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,540      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  365,213      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 594,685      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,401      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,222      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0            1,000,749,060 ns   duration_time

         1.000749060 seconds time elapsed
  ```

After:

  ```
   Performance counter stats for 'system wide':

  CPU0               20,547,434      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36              45,202,862      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                   82,001      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                 159,688      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0            1,000,464,828 ns   duration_time

         1.000464828 seconds time elapsed
  ```

Fixes: 3cdc5c2cb9 ("perf parse-events: Handle uncore event aliases in small groups properly")
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Asaf Yaffe <asaf.yaffe@intel.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kshipra Bopardikar <kshipra.bopardikar@intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Vineet Singh <vineet.singh@intel.com>
Cc: Zhengjun Xing <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20220205010941.1065469-1-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-02-06 09:03:06 -03:00
German Gomez
05b5a9d628 perf tools: Apply correct label to user/kernel symbols in branch mode
In branch mode, the branch symbols were being displayed with incorrect
cpumode labels. So fix this.

For example, before:
  # perf record -b -a -- sleep 1
  # perf report -b

  Overhead  Command  Source Shared Object  Source Symbol               Target Symbol
     0.08%  swapper  [kernel.kallsyms]     [k] rcu_idle_enter          [k] cpuidle_enter_state
 ==> 0.08%  cmd0     [kernel.kallsyms]     [.] psi_group_change        [.] psi_group_change
     0.08%  cmd1     [kernel.kallsyms]     [k] psi_group_change        [k] psi_group_change

After:
  # perf report -b

  Overhead  Command  Source Shared Object  Source Symbol               Target Symbol
     0.08%  swapper  [kernel.kallsyms]     [k] rcu_idle_enter          [k] cpuidle_enter_state
     0.08%  cmd0     [kernel.kallsyms]     [k] psi_group_change        [k] pei_group_change
     0.08%  cmd1     [kernel.kallsyms]     [k] psi_group_change        [k] psi_group_change

Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: German Gomez <german.gomez@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20220126105927.3411216-1-german.gomez@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-02-06 09:03:06 -03:00