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Dmitry Baryshkov
6daee40678 arm64: dts: qcom: sm8350: add PCIe devices 
Add PCIe0 and PCIe1 (and corresponding PHY) devices found on SM8350
platform. The PCIe0 is a 1-lane Gen3 host, PCIe1 is a 2-lane Gen3 host.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221118233242.2904088-8-dmitry.baryshkov@linaro.org
 2023-01-16 21:00:51 -06:00
Bjorn Andersson
bb45bb9705 arm64: dts: qcom: sc8280xp: Use MMCX for all DP controllers 
While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this
relationship and sometimes invokes sync_state on the rpmhpd (MMCX)
before the DisplayPort controller has had a chance to probe.

The result when this happens is that the power is lost to the multimedia
subsystem between the probe of msm_drv and the DisplayPort controller -
which results in an irrecoverable state.

While this is an implementation problem, this aligns the power domain
setting of the one DP instance with that of all the others.

Fixes: 57d6ef683a ("arm64: dts: qcom: sc8280xp: Define some of the display blocks")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112135055.3836555-1-quic_bjorande@quicinc.com
 2023-01-12 10:00:38 -06:00
Johan Hovold
e15a815884 arm64: dts: qcom: sc8280xp-crd: allow vreg_l3b to be disabled 
The vreg_l3b supply is used by the eDP, UFS and USB1 PHYs which are now
described by the devicetree so that the regulator no longer needs to be
marked always-on.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112074503.12185-1-johan+linaro@kernel.org
 2023-01-12 09:34:13 -06:00
Mukesh Ojha
1f731bbf71 arm64: dts: qcom: sm8450: Add TCSR halt register space 
Add TCSR register space and refer it from scm node, so that
it can be used by SCM driver.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1673513697-30173-2-git-send-email-quic_mojha@quicinc.com
 2023-01-12 09:34:05 -06:00
Bjorn Andersson
fe07640280 arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers 
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level,
not doing so results in occasional lockups. This was previously hidden
by the fact that the display stack incorrectly voted for CX (instead of
MMCX).

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112135117.3836655-1-quic_bjorande@quicinc.com
 2023-01-12 09:32:04 -06:00
Dmitry Baryshkov
6af6827fb0 arm64: dts: qcom: sm8250: drop the virtual ipa-virt device 
Drop the virtual ipa-virt device. The interconnects it provided are
going to be represented as <&rpmhcc RPMH_IPA_CLK> clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109002935.244320-13-dmitry.baryshkov@linaro.org
 2023-01-11 14:34:13 -06:00
Dmitry Baryshkov
88efcc060e arm64: dts: qcom: sm8150: drop the virtual ipa-virt device 
Drop the virtual ipa-virt device. The interconnects it provided are
going to be represented as <&rpmhcc RPMH_IPA_CLK> clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109002935.244320-12-dmitry.baryshkov@linaro.org
 2023-01-11 14:34:13 -06:00
Luca Weiss
7592ba4d3e arm64: dts: qcom: pm7250b: Add BAT_ID vadc channel 
Add a node describing the ADC5_BAT_ID_100K_PU channel with the
properties taken from downstream kernel.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106-pm7250b-bat_id-v1-2-82ca8f2db741@fairphone.com
 2023-01-11 13:37:38 -06:00
Stephan Gerhold
389d2c9926 arm64: dts: qcom: msm8916: Add DMA for all I2C controllers 
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi
the DMA channels are already assigned to the SPI controllers but
missing for I2C. Add them there as well.

This also fixes confusing errors in dmesg for each I2C controller:
  i2c_qup 78b6000.i2c: tx channel not available

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107110958.5762-3-stephan@gerhold.net
 2023-01-11 13:35:55 -06:00
Stephan Gerhold
0154d3594a arm64: dts: qcom: msm8916: Enable blsp_dma by default 
Adding the "dmas" to the I2C controllers prevents probing them if
blsp_dma is disabled (infinite probe deferral). Avoid this by enabling
blsp_dma by default - it's an integral part of the SoC that is almost
always used (even if just for UART).

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107110958.5762-2-stephan@gerhold.net
 2023-01-11 13:35:55 -06:00
Lin, Meng-Bo
599a259a4b arm64: dts: qcom: msm8916-gplus-fl8005a: Add flash LED 
FL8005A uses Qualcomm GPIO flash LEDs which is compatible with
SGM3140 Flash LED driver. Add it to the device tree.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107133235.139947-1-linmengbo0689@protonmail.com
 2023-01-11 13:35:02 -06:00
Lin, Meng-Bo
143b4b845f arm64: dts: qcom: msm8916-gplus-fl8005a: Add touchscreen 
FL8005A uses a Focaltech FT5402 touchscreen that is connected to
blsp_i2c5. Add it to the device tree.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107133223.139893-1-linmengbo0689@protonmail.com
 2023-01-11 13:35:02 -06:00
Lin, Meng-Bo
662a90c4e7 arm64: dts: qcom: msm8916-gplus-fl8005a: Add initial device tree 
GPLUS FL8005A is a tablet using the MSM8916 SoC released in 2015.

Add a device tree for with initial support for:

- GPIO keys
- GPIO LEDs
- pm8916-vibrator
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- WCNSS (WiFi/BT)
- Regulators

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107133210.139839-1-linmengbo0689@protonmail.com
 2023-01-11 13:35:01 -06:00
Dmitry Baryshkov
2e3015c2d1 arm64: dts: qcom: msm8996: mark apcs as clock provider 
Now as we added the APCS clock controller support, mark apcs device as
clock provider by adding #clock-cells property.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111191634.2509616-1-dmitry.baryshkov@linaro.org
 2023-01-11 13:30:33 -06:00
Johan Hovold
aab961de74 arm64: dts: qcom: sa8540p-pmics: rename pmic labels 
The SA8540P PMICs are named PMM8540. Rename the devicetree source labels
to reflect this.

Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111160335.7175-3-johan+linaro@kernel.org
 2023-01-11 13:13:55 -06:00
Johan Hovold
32c028fccb arm64: dts: qcom: sa8540p-pmics: add missing interrupt include 
Add the missing interrupt-controller include which is needed by the RTC
node.

Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111160335.7175-2-johan+linaro@kernel.org
 2023-01-11 13:13:55 -06:00
Johan Hovold
f48c70b111 arm64: dts: qcom: sc8280xp-x13s: enable eDP display 
Enable the eDP display on MDSS0 DP3, including backlight control.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111133128.31813-1-johan+linaro@kernel.org
 2023-01-11 13:10:22 -06:00
Bjorn Andersson
5715698507 arm64: dts: qcom: sa8295-adp: Enable DP instances 
The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.

Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link them all together.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111035906.2975494-4-quic_bjorande@quicinc.com
 2023-01-11 13:09:41 -06:00
Bjorn Andersson
4a883a8d80 arm64: dts: qcom: sc8280xp-crd: Enable EDP 
The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
and link it together with the backlight control.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111035906.2975494-3-quic_bjorande@quicinc.com
 2023-01-11 13:09:23 -06:00
Bjorn Andersson
57d6ef683a arm64: dts: qcom: sc8280xp: Define some of the display blocks 
Define the display clock controllers, the MDSS instances, the DP phys
and connect these together.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111035906.2975494-2-quic_bjorande@quicinc.com
 2023-01-11 13:08:40 -06:00
Bjorn Andersson
4df6e8fbe6 Revert "dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11" 
This reverts commit 92ad27fb92, as this
was applied to the wrong branch and causes merge conflicts.
 2023-01-10 23:04:59 -06:00
Dmitry Baryshkov
1de4e112b9 arm64: dts: qcom: msm8996-oneplus-common: drop vdda-supply from DSI PHY 
14nm DSI PHY has the only supply, vcca. Drop the extra vdda-supply.

Fixes: 5a134c940c ("arm64: dts: qcom: msm8996: add support for oneplus3(t)")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109042406.312047-1-dmitry.baryshkov@linaro.org
 2023-01-10 22:57:13 -06:00
Marijn Suijten
4ce03bb80f arm64: dts: qcom: sdm845-tama: Add volume up and camera GPIO keys 
Tama has four GPIO-wired keys: two for camera focus and shutter /
snapshot, and two more for volume up and down.  As per the comment these
used to not work because the necessary pin bias was missing, which is
now set via pinctrl on pm8998_gpios.

The missing bias has also been added to the existing volume down button,
which receives a node name and label cleanup at the same time to be more
consistent with other DTS and the newly added buttons.  Its deprecated
gpio-key,wakeup property has also been replaced with wakeup-source.

Note that volume up is also available through the usual PON RESIN node,
but unlike other platforms only triggers when the power button is held
down at the same time making it unsuitable to serve as KEY_VOLUMEUP.

Fixes: 30a7f99bef ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109234133.365644-1-marijn.suijten@somainline.org
 2023-01-10 22:53:44 -06:00
Dmitry Baryshkov
19e509d5ea arm64: dts: qcom: sdm845: make DP node follow the schema 
Drop the #clock-cells (probably a leftover from the times before the DP
PHY split)

Fixes: eaac4e55a6 ("arm64: dts: qcom: sdm845: add displayport node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230110042126.702147-1-dmitry.baryshkov@linaro.org
 2023-01-10 22:53:25 -06:00
Konrad Dybcio
83fe4b9efb arm64: dts: qcom: msm8998: Use RPM XO 
Feed GCC and SDHC_2 with the RPM XO instead of the fixed-clock one.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230110143642.986799-1-konrad.dybcio@linaro.org
 2023-01-10 22:53:11 -06:00
Manivannan Sadhasivam
ff384ab56f arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1 
Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs
received from endpoint devices to the CPU using GIC-ITS MSI controller.
Add support for it.

Currently, BDF (0:0.0) and BDF (1:0.0) are enabled and with the
msi-map-mask of 0xff00, all the 32 devices under these two busses can
share the same Device ID.

The GIC-ITS MSI implementation provides an advantage over internal MSI
implementation using Locality-specific Peripheral Interrupts (LPI) that
would allow MSIs to be targeted for each CPU core.

It should be noted that the MSIs for BDF (1:0.0) only works with Device
ID of 0x5980 and 0x5a00. Hence, the IDs are swapped.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # Xperia 1 IV (WCN6855)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102105821.28243-4-manivannan.sadhasivam@linaro.org
 2023-01-10 22:52:00 -06:00
Krzysztof Kozlowski
66b14154e2 arm64: dts: qcom: add missing space before { 
Add missingh whitespace between node name/label and opening {.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221230140133.57885-2-krzysztof.kozlowski@linaro.org
 2023-01-10 22:49:18 -06:00
Dmitry Baryshkov
ef6868a2d6 arm64: dts: qcom: msm8998: get rid of test clock 
The test clock apparently it's not used by anyone upstream. Remove it.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-17-dmitry.baryshkov@linaro.org
 2023-01-10 22:45:05 -06:00
Krzysztof Kozlowski
5eafe69af4 arm64: dts: qcom: sm8450: correct Soundwire wakeup interrupt name 
The bindings expect second Soundwire interrupt to be "wakeup" (Linux
driver takes by index):

  sm8450-hdk.dtb: soundwire-controller@33b0000: interrupt-names:1: 'wakeup' was expected

Fixes: 14341e76db ("arm64: dts: qcom: sm8450: add Soundwire and LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223132121.81130-1-krzysztof.kozlowski@linaro.org
 2023-01-10 22:41:48 -06:00
Eric Chanudet
ceb01bb895 arm64: dts: qcom: pm8941-rtc add alarm register 
A few descriptions including a qcom,pm8941-rtc describe two reg-names
for the "rtc" and "alarm" register banks, but only one offset.
For consistency with reg-names, add the "alarm" register offset.
No functional change is expected from this.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-5-echanude@redhat.com
 2023-01-10 22:41:03 -06:00
Eric Chanudet
e1deaa8437 arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics 
Include the dtsi to use a single pmic descriptions.
Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-4-echanude@redhat.com
 2023-01-10 22:41:03 -06:00
Eric Chanudet
650fed7806 arm64: dts: qcom: sa8450p-pmics: add rtc node 
Add the rtc block on the first pmic to enable the rtc for sa8540p-ride.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-3-echanude@redhat.com
 2023-01-10 22:41:03 -06:00
Eric Chanudet
2e1cec6e1b arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics 
pm8450a.dtsi was introduced for the descriptions of pmics used on
sa8540p based boards. Rename the dtsi to make this relationship
explicit.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-2-echanude@redhat.com
 2023-01-10 22:41:03 -06:00
Konrad Dybcio
8503babc3d arm64: dts: qcom: sm8350: Drop standalone smem node 
SM8350 is one of the last SoCs whose DTSI escaped the smem node
conversion. Use the newer memory-node binding instead of a memory *and*
smem node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219162618.873117-1-konrad.dybcio@linaro.org
 2023-01-10 22:40:43 -06:00
Dmitry Baryshkov
7438bb31ba arm64: dts: qcom: sm8450-hdk: add missing PMIC includes 
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks
and thermal sensors available to the user of the platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-6-dmitry.baryshkov@linaro.org
 2023-01-10 22:40:37 -06:00
Vinod Koul
30464456a1 arm64: dts: qcom: sm8450-hdk: add pmic files 
SM8450 HDK features bunch of PMICs, add the PMICs which we have already
upstream files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-5-dmitry.baryshkov@linaro.org
 2023-01-10 22:40:36 -06:00
Dmitry Baryshkov
69d46573ca arm64: dts: qcom: sm8450-qrd: add missing PMIC includes 
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks
and thermal sensors available to the user of the platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-4-dmitry.baryshkov@linaro.org
 2023-01-10 22:40:36 -06:00
Vinod Koul
b070c7493b arm64: dts: qcom: sm8450-qrd: add pmic files 
SM8450 QRD features bunch of PMICs, add the PMICs which we have already
upstream files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-3-dmitry.baryshkov@linaro.org
 2023-01-10 22:40:36 -06:00
Krzysztof Kozlowski
1364acc3f6 arm64: dts: qcom: replace underscores in node names 
Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens.  In few places adjust the name to
match other nodes (e.g. xxx-regulator).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org
 2023-01-10 22:25:21 -06:00
Owen Yang
f6df873315 arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie with NVMe 
Add DT for sc7280-herobrine-zombie with NVMe

Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214114706.2.I1a0c709f8ec86cc5b38f0fe9f9b26694b1eb69d6@changeid
 2023-01-10 22:25:04 -06:00
Konrad Dybcio
71b7c2df31 arm64: dts: qcom: sm8450: Add fallback CCI compatible 
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-5-konrad.dybcio@linaro.org
 2023-01-10 22:24:32 -06:00
Konrad Dybcio
dd45008b74 arm64: dts: qcom: sm8250: Add fallback CCI compatible 
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-4-konrad.dybcio@linaro.org
 2023-01-10 22:24:32 -06:00
Konrad Dybcio
84c611c5bc arm64: dts: qcom: sdm845: Add fallback CCI compatible 
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-3-konrad.dybcio@linaro.org
 2023-01-10 22:24:31 -06:00
Konrad Dybcio
6d88aafa6f arm64: dts: qcom: msm8916: Add fallback CCI compatible 
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-2-konrad.dybcio@linaro.org
 2023-01-10 22:24:31 -06:00
Konrad Dybcio
7ca5618520 arm64: dts: qcom: sm8450-nagara: Disable empty i2c bus 
As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip). Since it's the only subdevice of its I2C host bus, disable
said bus to save some power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-3-konrad.dybcio@linaro.org
 2023-01-10 22:24:01 -06:00
Konrad Dybcio
71b4fb83a9 arm64: dts: qcom: sm8350-sagami: Disable empty i2c bus 
As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip). Since it's the only subdevice of its I2C host bus, disable
said bus to save some power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-2-konrad.dybcio@linaro.org
 2023-01-10 22:24:01 -06:00
Konrad Dybcio
2a87b55555 arm64: dts: qcom: sm8250-edo: Remove misleading comments 
As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip).

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-1-konrad.dybcio@linaro.org
 2023-01-10 22:24:01 -06:00
Srinivasa Rao Mandadapu
76ee8cd530 arm64: dts: qcom: sc7180: Set performance state for audio 
Set a performance state for audio clks so that the minimally
correct corner voltage is picked when audio is active.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1670932566-22923-1-git-send-email-quic_srivasam@quicinc.com
 2023-01-10 22:23:45 -06:00
Krzysztof Kozlowski
bb99820dd2 arm64: dts: qcom: rename AOSS QMP nodes 
The Always On Subsystem (AOSS) QMP is not a power domain controller
since commit 1357804562 ("arm64: dts: qcom: sc7180: Use QMP property
to control load state") and few others.  In fact, it was never a power
domain controller but rather control of power state of remote
processors.  This power state control is now handled differently, thus
the AOSS QMP nodes do not have power-domain-cells:

  sc7280-idp.dtb: power-controller@c300000: '#power-domain-cells' is a required property
  From schema: Documentation/devicetree/bindings/power/power-domain.yaml

AOSS QMP is an interface to the actuall AOSS subsystem responsible for
some of power management functions, thus let's call the nodes as
"power-management".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-4-krzysztof.kozlowski@linaro.org
 2023-01-10 22:22:33 -06:00
Krzysztof Kozlowski
76d9e8b4d5 arm64: dts: qcom: sc8280xp: correct SPMI bus address cells 
The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-3-krzysztof.kozlowski@linaro.org
 2023-01-10 22:22:33 -06:00