Commit Graph

1185189 Commits

Author SHA1 Message Date
Bjorn Andersson
6c0237db15 dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Add ports and orientation-switch
The QMP combo phy can be connected to a TCPM, a USB controller and a
DisplayPort controller for handling USB Type-C orientation switching
and propagating HPD signals.

Extend the binding to allow these connections to be described.

Tested-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450
Tested-by: Johan Hovold <johan+linaro@kernel.org>	# X13s
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230515032743.400170-2-quic_bjorande@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:17:18 +05:30
Vinod Koul
940797d6d5 Merge branch 'fixes' into next
This brings in the Qcom qmp patch fixes into next as well
2023-05-19 23:16:43 +05:30
Frank Li
afa9294912 dt-bindings: phy: cdns,salvo: add property cdns,usb2-disconnect-threshold-microvolt
Add cdns,usb2-disconnect-threshold-microvolt property to address fake USB
disconnection issue during enumeration or suspend state for difference
platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230517161646.3418250-7-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:14:07 +05:30
Frank Li
e8c3336134 phy: cadence: salvo: Add cdns,usb2-disconnect-threshold-microvolt property
Add cdns,usb2-disconnect-threshold-microvolt property to address fake USB
disconnection issue during enumeration or suspend state for difference
platform.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230517161646.3418250-6-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:14:06 +05:30
Peter Chen
3ad5cebe9c phy: cadence: salvo: add .set_mode API
For NXP platform design, the PHY can't know VBUS well, it causes the FSM
in controller seeing the disconnection at L1 use case. With .set_mode API
introduced, the controller driver could force PHY seeing B Session VALID
when it is at the device mode (VBUS is there), and keep FSM working well.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230517161646.3418250-5-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:14:06 +05:30
Peter Chen
fe5516651e phy: cadence: salvo: add bist fix
Very limited parts may fail to work on full speed mode (both host and
device modes) for USB3 port due to higher threshold in full speed receiver
of USB2.0 PHY.

One example failure symptom is, the enumeration is failed when connecting
full speed USB mouse to USB3 port, especially under high temperature.

The workaround is to configure threshold voltage value of single ended
receiver by setting USB2.0 PHY register AFE_RX_REG5[2:0] to 3'b101.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230517161646.3418250-4-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:14:06 +05:30
Peter Chen
1492498d13 phy: cadence: salvo: decrease delay value to zero for txvalid
For USB2 L1 use cases, some hosts may start transferring less than 20us
after End of Resume, it causes the host seeing corrupt packet from the
device side. The reason is the delay time between PHY powers up and
txvalid is 20us. To fix it, we change the delay value as 0us.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230517161646.3418250-3-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:14:06 +05:30
Peter Chen
88bc4cda5e phy: cadence: salvo: add access for USB2PHY
There is an offset for USB2PHY in SALVO phy, add offset parameter for read
and write API to cover both USB2 and USB3 PHY control.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230517161646.3418250-2-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:14:06 +05:30
Bhupesh Sharma
1178c93c0a phy: qcom-qmp-usb: add support for updated qcm2290 / sm6115 binding
Add support for the new qcm2290 / sm6115 binding.

The USB QMP phy on these devices supports 2 lanes. Note that the
binding now does not describe every register subregion and instead
the driver holds the corresponding offsets.

While at it also include support for PCS_MISC region which was left
out earlier.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20230516150511.2346357-3-bhupesh.sharma@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-17 13:44:02 +05:30
Bhupesh Sharma
2daece5eb5 dt-bindings: phy: qcom,qmp-usb: Drop legacy bindings and move to newer one (SM6115 & QCM2290)
'qcom,msm8996-qmp-usb3-phy.yaml' defines bindings for several PHYs
which predate USB -> USB+DP migration. Since SM6115 and QCM2290
nodes for USB QMP phy are being added to dtsi files by followup patches,
move these bindings instead to the newer style
'qcom,sc8280xp-qmp-usb3-uni-phy.yaml' file.

Since no device trees use these bindings presently, so we have no ABI breakages
with this patch.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20230516150511.2346357-2-bhupesh.sharma@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-17 13:44:02 +05:30
Siddharth Vadapalli
8d087a09c7 phy: ti: gmii-sel: Enable USXGMII mode for J784S4
TI's J784S4 SoC supports USXGMII mode with the CPSW9G instance's MAC
ports 1 and 2. Add USXGMII mode to the extra_modes member of J784S4's
SoC data.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230331062521.529005-3-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 20:01:44 +05:30
Siddharth Vadapalli
efd658807d phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J784S4
Each of the CPSW9G ports in TI's J784S4 SoC support modes such as QSGMII.

Add a new compatible for it and allow the usage of "ti,qsgmii-main-ports"
property for J784S4.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230331062521.529005-2-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 20:01:43 +05:30
Siddharth Vadapalli
2de2e49b32 phy: ti: gmii-sel: Enable SGMII mode for J721E
TI's J721E SoC supports SGMII mode with the CPSW9G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the list of the
corresponding extra_modes member.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230309063514.398705-4-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 20:00:52 +05:30
Siddharth Vadapalli
178b651521 phy: ti: gmii-sel: Enable SGMII mode for J7200
TI's J7200 SoC supports SGMII mode with the CPSW5G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the list of the
corresponding extra_modes member.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230309063514.398705-3-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 20:00:52 +05:30
Siddharth Vadapalli
6a30118842 phy: ti: gmii-sel: Add support for SGMII mode
Add support to configure the CPSW MAC's PHY in SGMII mode if the SoC
supports it. The extra_modes member of the phy_gmii_sel_soc_data struct
corresponding to the SoC is used to determine whether or not the SoC
supports SGMII mode.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230309063514.398705-2-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 20:00:51 +05:30
Yang Li
1541fbaca0 phy: freescale: imx8m-pcie: Use devm_platform_ioremap_resource()
Convert platform_get_resource(),devm_ioremap_resource() to a single
call to devm_platform_ioremap_resource(), as this is exactly what this
function does.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/20230428052758.38636-1-yang.lee@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:51:24 +05:30
Krzysztof Kozlowski
2a881183dc phy: qcom-snps: correct struct qcom_snps_hsphy kerneldoc
Update kerneldoc of struct qcom_snps_hsphy to fix:

  drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c:135: warning: Function parameter or member 'update_seq_cfg' not described in 'qcom_snps_hsphy'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230507144818.193039-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:48:55 +05:30
Neil Armstrong
b949193011 phy: amlogic: phy-meson-g12a-mipi-dphy-analog: fix CNTL2_DIF_TX_CTL0 value
Use the same CNTL2_DIF_TX_CTL0 value used by the vendor, it was reported
fixing timings issues.

Fixes: 2a56dc650e ("phy: amlogic: Add G12A Analog MIPI D-PHY driver")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v4-10-2592c29ea263@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:48:10 +05:30
Tom Rix
03262a3f5b phy: mediatek: rework the floating point comparisons to fixed point
gcc on aarch64 reports
drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c: In function ‘mtk_hdmi_pll_set_rate’:
drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:240:52: error: ‘-mgeneral-regs-only’
  is incompatible with the use of floating-point types
  240 |         else if (tmds_clk >= 54 * MEGA && tmds_clk < 148.35 * MEGA)

Floating point should not be used, so rework the floating point comparisons
to fixed point.

Signed-off-by: Tom Rix <trix@redhat.com>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20230502145005.2927101-1-trix@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:48:06 +05:30
David Yang
fdab47868e phy: hisilicon: Allow building phy-hisi-inno-usb2 on ARM32
Support for inno-usb2-phy on Hi3798MV100 was added into existing driver,
while Hi3798MV100 is a A9 ARM32-only SoC.

Signed-off-by: David Yang <mmyangfl@gmail.com>
Link: https://lore.kernel.org/r/20230509060449.1151113-3-mmyangfl@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:44:29 +05:30
David Yang
3940ffc654 phy: hisilicon: Add inno-usb2-phy driver for Hi3798MV100
Adopt existing phy-hisi-inno-usb2 driver to Hi3798MV100, with a slightly
different TEST register convention.

Signed-off-by: David Yang <mmyangfl@gmail.com>
Link: https://lore.kernel.org/r/20230509060449.1151113-2-mmyangfl@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:44:29 +05:30
Artur Weber
f64df08226 phy: Revert "phy: Remove SOC_EXYNOS4212 dep. from PHY_EXYNOS4X12_USB"
Support for the Exynos4212 SoC was originally dropped as there were
no boards using it. We will be adding a device that uses it, so add
it back.

This reverts commit fee7e1d50c.

Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230501195525.6268-9-aweber.kernel@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 19:38:39 +05:30
Varadarajan Narayanan
a8874ada13 phy: qcom: qmp: Update IPQ9574 USB Phy initialization Sequence
Updated USB QMP PHY Init sequence based on HPG for IPQ9574.
Reused clock and reset list from existing targets.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/4f15c21f28e2a1332fbdb04d60641cbbf05c6f15.1683630932.git.quic_varada@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 18:25:59 +05:30
Varadarajan Narayanan
5eaba7b5de phy: qcom-qusb2: add QUSB2 support for IPQ9574
Add the phy init sequence for the Super Speed ports found
on IPQ9574.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/7c67e9e92227add6544009092adbd400c3cb47db.1683630932.git.quic_varada@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 18:25:59 +05:30
Varadarajan Narayanan
b225e9124b dt-bindings: phy: qcom,qmp-usb: Add IPQ9574 USB3 PHY
* Add dt-bindings for USB3 PHY found on Qualcomm IPQ9574

* Making power-domains as optional since IPQ9574 doesn't have GDSCs

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/064614c5b28f6d813634ad14a59b0bf94ac334b7.1683630932.git.quic_varada@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 18:25:58 +05:30
Varadarajan Narayanan
fc1ec000b6 dt-bindings: phy: qcom,qusb2: Document IPQ9574 compatible
Document the compatible string used for the qusb2 phy in IPQ9574.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/d55c95a6bfeef3f49fdbcde9bc97157374e81a65.1683630932.git.quic_varada@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16 18:25:58 +05:30
Daniel Machon
7a503071e0 phy: sparx5-serdes: add skip_cmu_cfg check when configuring lanes
Add a check for skip_cmu_cfg when configuring the serdes lane.  All
individual serdeses are reset upon first configuration. Resetting the
serdes involves reconfiguring it with preset values. The serdesmode is
required to determine the clock-providing CMU, therefore make sure the
serdes is not reconfigured if the serdesmode is not set.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-8-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:01 +05:30
Daniel Machon
2db7289f59 phy: sparx5-serdes: remove power up of all CMUs
CMUs should not be powered up by default anymore, so remove responsible
code.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-7-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:01 +05:30
Daniel Machon
96bb166425 phy: sparx5-serdes: power on CMUs individually
Power on the CMU instance, that provides the clock for the serdes, given the
specified serdes mode and index. The CMU instance is looked up, using a
preset map of serdes mode and index to CMU index.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-6-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:01 +05:30
Daniel Machon
044f3a1a8d phy: sparx5-serdes: power down all CMUs by default
All CMUs are powered up initially. This uses needless power. This patch
makes sure all CMUs are powered down by default. This involves
configuring a number reference clock and power-down registers of the
CMU.

Individual CMUs are later powered up, when the serdes lanes are
configured.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-5-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:01 +05:30
Daniel Machon
238a583fe4 phy: sparx5-serdes: reorder CMU functions
Reorder CMU functions, as some of them are now required by the serdes
functions. No functional changes.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-4-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:01 +05:30
Daniel Machon
3d61a1f83e phy: sparx5-serdes: configure optimal quiet mode for serdes lanes
All the serdes lanes of the sparx5 will transition between normal mode
and quiet mode, depending on activity. Make sure that the quiet mode is
configured optimally for all lanes initially. Although not much, this
will save a small amount of power.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-3-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:01 +05:30
Daniel Machon
86c2cfb1ab phy: sparx5-serdes: add registers required for SD/CMU power down
Add registers required to configure serdeses and CMUs for initial power
down.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-2-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:13:00 +05:30
Swapnil Jakhade
72a5ce33b8 phy: cadence-torrent: Add USB + DP multilink configuration
Add USB + DP no SSC multilink configuration sequences.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20230418173157.25607-5-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:07:01 +05:30
Swapnil Jakhade
ede775a87b phy: cadence-torrent: Add PCIe + DP multilink configuration for 100MHz refclk
Add multilink DP configuration support for 100MHz reference clock rate.
This is the only clock rate supported currently for multilink PHY
configurations. Also, add PCIe + DP multiprotocol multilink register
configuration sequences for 100MHz refclk with no SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20230418173157.25607-4-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:07:01 +05:30
Swapnil Jakhade
c756cc1621 phy: cadence-torrent: Prepare driver for multilink DP support
This patch prepares driver for multilink DP support as well as for
multiprotocol PHY configurations involving DP as one of the required
protocols. This needs changes in functions configuring default single
link DP with master lane 0 to support non-zero master lane values and
associated PLL configurations.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20230418173157.25607-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:07:01 +05:30
Swapnil Jakhade
1b0524fc21 phy: cadence-torrent: Add function to get PLL to be configured for DP
Torrent PHY PLL0 or PLL1 is used for DP depending on the single link or
multilink protocol configuration for which PHY is configured. In multilink
configurations with other protocols, either PLL0 or PLL1 will be used
for DP. For single link DP, both PLLs need to be configured at POR.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20230418173157.25607-2-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 17:07:01 +05:30
Bartosz Golaszewski
d8c66cbbdd dt-bindings: phy: qmp-ufs: tweak clock and clock-names for sa8775p
maxItems is already globally set to 3. To make the binding easier to read
and remove redundancy, set minItems to 3 for sa8775p as this platform
requires exactly three clocks.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230419120914.173715-1-brgl@bgdev.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 15:52:50 +05:30
Krzysztof Kozlowski
d96a432cc8 dt-bindings: phy: qcom,edp-phy: allow power-domains
At least on SC8280XP the eDP PHY is part of power domain:

  sc8280xp-crd.dtb: phy@220c2a00: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230416151233.346336-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 15:48:38 +05:30
Shazad Hussain
8bd2d6e11c phy: qcom-qmp: Add SA8775P USB3 UNI phy
The SA8775P platform has 5nm USB3 UNI phy attached to the USB0 and USB1
controllers.

Add QMP PHY config, pcs entries and support for the new compatible for
SA8775P platform.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230428130824.23803-5-quic_shazhuss@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 15:00:26 +05:30
Shazad Hussain
bfd73c859e dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY binding
Add compatible string for Qualcomm QMP Super Speed (SS) UNI PHY found
in SA8775P.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230428130824.23803-4-quic_shazhuss@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 15:00:26 +05:30
Shazad Hussain
66dc9a2cf5 dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
Document the compatible string for USB phy found in Qualcomm SA8775P SoC

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230428130824.23803-3-quic_shazhuss@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 15:00:25 +05:30
Shazad Hussain
70e5df1138 dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
Add the compatible string for SA8775P SoC from Qualcomm.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230428130824.23803-2-quic_shazhuss@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 15:00:25 +05:30
Stanislav Jakubek
a8025faec7 dt-bindings: phy: brcm,kona-usb2-phy: convert to YAML
Convert Broadcom Kona family USB 2.0 PHY bindings to DT schema.

Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230427190725.GA7730@standask-GA-A55M-S2HP
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 14:58:47 +05:30
Dmitry Rokosov
58247b9fed phy: amlogic: enable/disable clkin during Amlogic USB PHY init/exit
Previously, all Amlogic boards used the XTAL clock as the default board
clock for the USB PHY input, so there was no need to enable it.
However, with the introduction of new Amlogic SoCs like the A1 family,
the USB PHY now uses a gated clock. Hence, it is necessary to enable
this gated clock during the PHY initialization sequence, or disable it
during the PHY exit, as appropriate.

Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230426102922.19705-2-ddrokosov@sberdevices.ru
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 14:57:37 +05:30
Johan Hovold
e42f110700 phy: qcom-qmp-pcie-msm8996: fix init-count imbalance
The init counter is not decremented on initialisation errors, which
prevents retrying initialisation.

Add the missing decrement on initialisation errors so that the counter
reflects the state of the device.

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org      # 4.12
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230502103810.12061-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 14:39:42 +05:30
Johan Hovold
9bf03a0cbd phy: qcom-qmp-combo: fix init-count imbalance
The init counter is not decremented on initialisation errors, which
prevents retrying initialisation and can lead to the runtime suspend
callback attempting to disable resources that have never been enabled.

Add the missing decrement on initialisation errors so that the counter
reflects the state of the device.

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org	# 4.12
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230502103810.12061-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 14:39:42 +05:30
Linus Torvalds
ac9a78681b Linux 6.4-rc1 v6.4-rc1 2023-05-07 13:34:35 -07:00
Linus Torvalds
f085df1be6 Merge tag 'perf-tools-for-v6.4-3-2023-05-06' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Pull perf tool updates from Arnaldo Carvalho de Melo:
 "Third version of perf tool updates, with the build problems with with
  using a 'vmlinux.h' generated from the main build fixed, and the bpf
  skeleton build disabled by default.

  Build:

   - Require libtraceevent to build, one can disable it using
     NO_LIBTRACEEVENT=1.

     It is required for tools like 'perf sched', 'perf kvm', 'perf
     trace', etc.

     libtraceevent is available in most distros so installing
     'libtraceevent-devel' should be a one-time event to continue
     building perf as usual.

     Using NO_LIBTRACEEVENT=1 produces tooling that is functional and
     sufficient for lots of users not interested in those libtraceevent
     dependent features.

   - Allow Python support in 'perf script' when libtraceevent isn't
     linked, as not all features requires it, for instance Intel PT does
     not use tracepoints.

   - Error if the python interpreter needed for jevents to work isn't
     available and NO_JEVENTS=1 isn't set, preventing a build without
     support for JSON vendor events, which is a rare but possible
     condition. The two check error messages:

        $(error ERROR: No python interpreter needed for jevents generation. Install python or build with NO_JEVENTS=1.)
        $(error ERROR: Python interpreter needed for jevents generation too old (older than 3.6). Install a newer python or build with NO_JEVENTS=1.)

   - Make libbpf 1.0 the minimum required when building with out of
     tree, distro provided libbpf.

   - Use libsdtc++'s and LLVM's libcxx's __cxa_demangle, a portable C++
     demangler, add 'perf test' entry for it.

   - Make binutils libraries opt in, as distros disable building with it
     due to licensing, they were used for C++ demangling, for instance.

   - Switch libpfm4 to opt-out rather than opt-in, if libpfm-devel (or
     equivalent) isn't installed, we'll just have a build warning:

       Makefile.config:1144: libpfm4 not found, disables libpfm4 support. Please install libpfm4-dev

   - Add a feature test for scandirat(), that is not implemented so far
     in musl and uclibc, disabling features that need it, such as
     scanning for tracepoints in /sys/kernel/tracing/events.

  perf BPF filters:

   - New feature where BPF can be used to filter samples, for instance:

      $ sudo ./perf record -e cycles --filter 'period > 1000' true
      $ sudo ./perf script
           perf-exec 2273949 546850.708501:       5029 cycles:  ffffffff826f9e25 finish_wait+0x5 ([kernel.kallsyms])
           perf-exec 2273949 546850.708508:      32409 cycles:  ffffffff826f9e25 finish_wait+0x5 ([kernel.kallsyms])
           perf-exec 2273949 546850.708526:     143369 cycles:  ffffffff82b4cdbf xas_start+0x5f ([kernel.kallsyms])
           perf-exec 2273949 546850.708600:     372650 cycles:  ffffffff8286b8f7 __pagevec_lru_add+0x117 ([kernel.kallsyms])
           perf-exec 2273949 546850.708791:     482953 cycles:  ffffffff829190de __mod_memcg_lruvec_state+0x4e ([kernel.kallsyms])
                true 2273949 546850.709036:     501985 cycles:  ffffffff828add7c tlb_gather_mmu+0x4c ([kernel.kallsyms])
                true 2273949 546850.709292:     503065 cycles:      7f2446d97c03 _dl_map_object_deps+0x973 (/usr/lib/x86_64-linux-gnu/ld-linux-x86-64.so.2)

   - In addition to 'period' (PERF_SAMPLE_PERIOD), the other
     PERF_SAMPLE_ can be used for filtering, and also some other sample
     accessible values, from tools/perf/Documentation/perf-record.txt:

        Essentially the BPF filter expression is:

        <term> <operator> <value> (("," | "||") <term> <operator> <value>)*

     The <term> can be one of:
        ip, id, tid, pid, cpu, time, addr, period, txn, weight, phys_addr,
        code_pgsz, data_pgsz, weight1, weight2, weight3, ins_lat, retire_lat,
        p_stage_cyc, mem_op, mem_lvl, mem_snoop, mem_remote, mem_lock,
        mem_dtlb, mem_blk, mem_hops

     The <operator> can be one of:
        ==, !=, >, >=, <, <=, &

     The <value> can be one of:
        <number> (for any term)
        na, load, store, pfetch, exec (for mem_op)
        l1, l2, l3, l4, cxl, io, any_cache, lfb, ram, pmem (for mem_lvl)
        na, none, hit, miss, hitm, fwd, peer (for mem_snoop)
        remote (for mem_remote)
        na, locked (for mem_locked)
        na, l1_hit, l1_miss, l2_hit, l2_miss, any_hit, any_miss, walk, fault (for mem_dtlb)
        na, by_data, by_addr (for mem_blk)
        hops0, hops1, hops2, hops3 (for mem_hops)

  perf lock contention:

   - Show lock type with address.

   - Track and show mmap_lock, siglock and per-cpu rq_lock with address.
     This is done for mmap_lock by following the current->mm pointer:

      $ sudo ./perf lock con -abl -- sleep 10
       contended   total wait     max wait     avg wait            address   symbol
       ...
           16344    312.30 ms      2.22 ms     19.11 us   ffff8cc702595640
           17686    310.08 ms      1.49 ms     17.53 us   ffff8cc7025952c0
               3     84.14 ms     45.79 ms     28.05 ms   ffff8cc78114c478   mmap_lock
            3557     76.80 ms     68.75 us     21.59 us   ffff8cc77ca3af58
               1     68.27 ms     68.27 ms     68.27 ms   ffff8cda745dfd70
               9     54.53 ms      7.96 ms      6.06 ms   ffff8cc7642a48b8   mmap_lock
           14629     44.01 ms     60.00 us      3.01 us   ffff8cc7625f9ca0
            3481     42.63 ms    140.71 us     12.24 us   ffffffff937906ac   vmap_area_lock
           16194     38.73 ms     42.15 us      2.39 us   ffff8cd397cbc560
              11     38.44 ms     10.39 ms      3.49 ms   ffff8ccd6d12fbb8   mmap_lock
               1      5.43 ms      5.43 ms      5.43 ms   ffff8cd70018f0d8
            1674      5.38 ms    422.93 us      3.21 us   ffffffff92e06080   tasklist_lock
             581      4.51 ms    130.68 us      7.75 us   ffff8cc9b1259058
               5      3.52 ms      1.27 ms    703.23 us   ffff8cc754510070
             112      3.47 ms     56.47 us     31.02 us   ffff8ccee38b3120
             381      3.31 ms     73.44 us      8.69 us   ffffffff93790690   purge_vmap_area_lock
             255      3.19 ms     36.35 us     12.49 us   ffff8d053ce30c80

   - Update default map size to 16384.

   - Allocate single letter option -M for --map-nr-entries, as it is
     proving being frequently used.

   - Fix struct rq lock access for older kernels with BPF's CO-RE
     (Compile once, run everywhere).

   - Fix problems found with MSAn.

  perf report/top:

   - Add inline information when using --call-graph=fp or lbr, as was
     already done to the --call-graph=dwarf callchain mode.

   - Improve the 'srcfile' sort key performance by really using an
     optimization introduced in 6.2 for the 'srcline' sort key that
     avoids calling addr2line for comparision with each sample.

  perf sched:

   - Make 'perf sched latency/map/replay' to use "sched:sched_waking"
     instead of "sched:sched_waking", consistent with 'perf record'
     since d566a9c2d4 ("perf sched: Prefer sched_waking event when it
     exists").

  perf ftrace:

   - Make system wide the default target for latency subcommand, run the
     following command then generate some network traffic and press
     control+C:

       # perf ftrace latency -T __kfree_skb
     ^C
         DURATION     |      COUNT | GRAPH                                          |
          0 - 1    us |         27 | #############                                  |
          1 - 2    us |         22 | ###########                                    |
          2 - 4    us |          8 | ####                                           |
          4 - 8    us |          5 | ##                                             |
          8 - 16   us |         24 | ############                                   |
         16 - 32   us |          2 | #                                              |
         32 - 64   us |          1 |                                                |
         64 - 128  us |          0 |                                                |
        128 - 256  us |          0 |                                                |
        256 - 512  us |          0 |                                                |
        512 - 1024 us |          0 |                                                |
          1 - 2    ms |          0 |                                                |
          2 - 4    ms |          0 |                                                |
          4 - 8    ms |          0 |                                                |
          8 - 16   ms |          0 |                                                |
         16 - 32   ms |          0 |                                                |
         32 - 64   ms |          0 |                                                |
         64 - 128  ms |          0 |                                                |
        128 - 256  ms |          0 |                                                |
        256 - 512  ms |          0 |                                                |
        512 - 1024 ms |          0 |                                                |
          1 - ...   s |          0 |                                                |
       #

  perf top:

   - Add --branch-history (LBR: Last Branch Record) option, just like
     already available for 'perf record'.

   - Fix segfault in thread__comm_len() where thread->comm was being
     used outside thread->comm_lock.

  perf annotate:

   - Allow configuring objdump and addr2line in ~/.perfconfig., so that
     you can use alternative binaries, such as llvm's.

  perf kvm:

   - Add TUI mode for 'perf kvm stat report'.

  Reference counting:

   - Add reference count checking infrastructure to check for use after
     free, done to the 'cpumap', 'namespaces', 'maps' and 'map' structs,
     more to come.

     To build with it use -DREFCNT_CHECKING=1 in the make command line
     to build tools/perf. Documented at:

       https://perf.wiki.kernel.org/index.php/Reference_Count_Checking

   - The above caught, for instance, fix, present in this series:

        - Fix maps use after put in 'perf test "Share thread maps"':

          'maps' is copied from leader, but the leader is put on line 79
          and then 'maps' is used to read the reference count below - so
          a use after put, with the put of maps happening within
          thread__put.

     Fixed by reversing the order of puts so that the leader is put
     last.

   - Also several fixes were made to places where reference counts were
     not being held.

   - Make this one of the tests in 'make -C tools/perf build-test' to
     regularly build test it and to make sure no direct access to the
     reference counted structs are made, doing that via accessors to
     check the validity of the struct pointer.

  ARM64:

   - Fix 'perf report' segfault when filtering coresight traces by
     sparse lists of CPUs.

   - Add support for 'simd' as a sort field for 'perf report', to show
     ARM's NEON SIMD's predicate flags: "partial" and "empty".

  arm64 vendor events:

   - Add N1 metrics.

  Intel vendor events:

   - Add graniterapids, grandridge and sierraforrest events.

   - Refresh events for: alderlake, aldernaken, broadwell, broadwellde,
     broadwellx, cascadelakx, haswell, haswellx, icelake, icelakex,
     jaketown, meteorlake, knightslanding, sandybridge, sapphirerapids,
     silvermont, skylake, tigerlake and westmereep-dp

   - Refresh metrics for alderlake-n, broadwell, broadwellde,
     broadwellx, haswell, haswellx, icelakex, ivybridge, ivytown and
     skylakex.

  perf stat:

   - Implement --topdown using JSON metrics.

   - Add TopdownL1 JSON metric as a default if present, but disable it
     for now for some Intel hybrid architectures, a series of patches
     addressing this is being reviewed and will be submitted for v6.5.

   - Use metrics for --smi-cost.

   - Update topdown documentation.

  Vendor events (JSON) infrastructure:

   - Add support for computing and printing metric threshold values. For
     instance, here is one found in thesapphirerapids json file:

       {
           "BriefDescription": "Percentage of cycles spent in System Management Interrupts.",
           "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
           "MetricGroup": "smi",
           "MetricName": "smi_cycles",
           "MetricThreshold": "smi_cycles > 0.1",
           "ScaleUnit": "100%"
       },

   - Test parsing metric thresholds with the fake PMU in 'perf test
     pmu-events'.

   - Support for printing metric thresholds in 'perf list'.

   - Add --metric-no-threshold option to 'perf stat'.

   - Add rand (reverse and) and has_pmem (optane memory) support to
     metrics.

   - Sort list of input files to avoid depending on the order from
     readdir() helping in obtaining reproducible builds.

  S/390:

   - Add common metrics: - CPI (cycles per instruction), prbstate (ratio
     of instructions executed in problem state compared to total number
     of instructions), l1mp (Level one instruction and data cache misses
     per 100 instructions).

   - Add cache metrics for z13, z14, z15 and z16.

   - Add metric for TLB and cache.

  ARM:

   - Add raw decoding for SPE (Statistical Profiling Extension) v1.3 MTE
     (Memory Tagging Extension) and MOPS (Memory Operations) load/store.

  Intel PT hardware tracing:

   - Add event type names UINTR (User interrupt delivered) and UIRET
     (Exiting from user interrupt routine), documented in table 32-50
     "CFE Packet Type and Vector Fields Details" in the Intel Processor
     Trace chapter of The Intel SDM Volume 3 version 078.

   - Add support for new branch instructions ERETS and ERETU.

   - Fix CYC timestamps after standalone CBR

  ARM CoreSight hardware tracing:

   - Allow user to override timestamp and contextid settings.

   - Fix segfault in dso lookup.

   - Fix timeless decode mode detection.

   - Add separate decode paths for timeless and per-thread modes.

  auxtrace:

   - Fix address filter entire kernel size.

  Miscellaneous:

   - Fix use-after-free and unaligned bugs in the PLT handling routines.

   - Use zfree() to reduce chances of use after free.

   - Add missing 0x prefix for addresses printed in hexadecimal in 'perf
     probe'.

   - Suppress massive unsupported target platform errors in the unwind
     code.

   - Fix return incorrect build_id size in elf_read_build_id().

   - Fix 'perf scripts intel-pt-events.py' IPC output for Python 2 .

   - Add missing new parameter in kfree_skb tracepoint to the python
     scripts using it.

   - Add 'perf bench syscall fork' benchmark.

   - Add support for printing PERF_MEM_LVLNUM_UNC (Uncached access) in
     'perf mem'.

   - Fix wrong size expectation for perf test 'Setup struct
     perf_event_attr' caused by the patch adding
     perf_event_attr::config3.

   - Fix some spelling mistakes"

* tag 'perf-tools-for-v6.4-3-2023-05-06' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: (365 commits)
  Revert "perf build: Make BUILD_BPF_SKEL default, rename to NO_BPF_SKEL"
  Revert "perf build: Warn for BPF skeletons if endian mismatches"
  perf metrics: Fix SEGV with --for-each-cgroup
  perf bpf skels: Stop using vmlinux.h generated from BTF, use subset of used structs + CO-RE
  perf stat: Separate bperf from bpf_profiler
  perf test record+probe_libc_inet_pton: Fix call chain match on x86_64
  perf test record+probe_libc_inet_pton: Fix call chain match on s390
  perf tracepoint: Fix memory leak in is_valid_tracepoint()
  perf cs-etm: Add fix for coresight trace for any range of CPUs
  perf build: Fix unescaped # in perf build-test
  perf unwind: Suppress massive unsupported target platform errors
  perf script: Add new parameter in kfree_skb tracepoint to the python scripts using it
  perf script: Print raw ip instead of binary offset for callchain
  perf symbols: Fix return incorrect build_id size in elf_read_build_id()
  perf list: Modify the warning message about scandirat(3)
  perf list: Fix memory leaks in print_tracepoint_events()
  perf lock contention: Rework offset calculation with BPF CO-RE
  perf lock contention: Fix struct rq lock access
  perf stat: Disable TopdownL1 on hybrid
  perf stat: Avoid SEGV on counter->name
  ...
2023-05-07 11:32:18 -07:00
Linus Torvalds
17784de648 Merge tag 'core-debugobjects-2023-05-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull debugobjects fix from Thomas Gleixner:
 "A single fix for debugobjects:

  The recent fix to ensure atomicity of lookup and allocation
  inadvertently broke the pool refill mechanism, so that debugobject
  OOMs now in certain situations. The reason is that the functions which
  got updated no longer invoke debug_objecs_init(), which is now the
  only place to care about refilling the tracking object pool.

  Restore the original behaviour by adding explicit refill opportunities
  to those places"

* tag 'core-debugobjects-2023-05-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  debugobject: Ensure pool refill (again)
2023-05-07 11:04:26 -07:00