Ankit Nautiyal
61d340faaa
drm/i915/dp: Check src/sink compressed bpp limit for edp
...
Use checks for src and sink limits before computing compressed bpp for
eDP.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-18-ankit.k.nautiyal@intel.com
2023-08-18 09:42:25 +05:30
Ankit Nautiyal
1c56e9a398
drm/i915/dp: Get optimal link config to have best compressed bpp
...
Currently, we take the max lane, rate and pipe bpp, to get the maximum
compressed bpp possible. We then set the output bpp to this value.
This patch provides support to have max bpp, min rate and min lanes,
that can support the min compressed bpp.
v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)
-Fix the checks for limits->max/min_bpp while iterating over list of
valid DSC bpcs. (Stan)
v3:
-Refactor the code to have pipe bpp/compressed bpp computation and slice
count calculation separately for different cases.
v4:
-Separate the pipe_bpp calculation for eDP and DP.
v5:
-Get rid of magic numbers for max and min bpp,
and improve documentation. (Stan).
-Use functions for {src_sink}_{min_max}_compressed_bpp (Ville).
v6:
-Remove lines to set link config to max.
v7:
-Split the part to separate edp and dp functions for computing DSC BPP
into separate patch.
v8:
-Separate mechanism to get compressed bpp for ICL,TGL and XELPD+.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-17-ankit.k.nautiyal@intel.com
2023-08-18 09:42:24 +05:30
Ankit Nautiyal
a4d30841de
drm/i915/dp: Separate out function to get compressed bpp with joiner
...
Pull the code to get joiner constraints on maximum compressed bpp into
separate function.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-16-ankit.k.nautiyal@intel.com
2023-08-18 09:42:24 +05:30
Ankit Nautiyal
874aa4a3ff
drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC
...
Currently we check if the pipe_bpp selected is >= the
min DSC bpc/bpp requirement. We do not check if it is <= the max DSC
bpc/bpp requirement.
Add checks for max DSC BPC/BPP constraints while computing the
pipe_bpp when DSC is in use.
v2: Fix the commit message.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-15-ankit.k.nautiyal@intel.com
2023-08-18 09:42:23 +05:30
Ankit Nautiyal
9c8160a343
drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp
...
Refactor code to separate functions for eDP and DP for computing
pipe_bpp/compressed bpp when DSC is involved.
This will help to optimize the link configuration for DP later.
v2: Fix checkpatch warning.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-14-ankit.k.nautiyal@intel.com
2023-08-18 09:42:22 +05:30
Ankit Nautiyal
b9a7efcd99
drm/i915/dp: Rename helper to get DSC max pipe_bpp
...
The helper intel_dp_dsc_compute_bpp gives the maximum
pipe bpp that is allowed with DSC.
Rename the this to reflect that it returns max pipe bpp supported
with DSC.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-13-ankit.k.nautiyal@intel.com
2023-08-18 09:42:22 +05:30
Ankit Nautiyal
51dda14868
drm/i915/dp: Avoid left shift of DSC output bpp by 4
...
To make way for fractional bpp support, avoid left shifting the
output_bpp by 4 in helper intel_dp_dsc_get_output_bpp.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-12-ankit.k.nautiyal@intel.com
2023-08-18 09:42:21 +05:30
Ankit Nautiyal
2f4761c665
drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also
...
For DSC the min BPC is 8 for ICL+ and so the min pipe_bpp is 24.
Check this condition for cases where bpc is forced by debugfs flag
dsc_force_bpc. If the check fails, then WARN and ignore the debugfs
flag.
For MST case the pipe_bpp is already computed (hardcoded to be 24),
and this check is not required.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-11-ankit.k.nautiyal@intel.com
2023-08-18 09:42:20 +05:30
Ankit Nautiyal
8a969033ce
drm/i915/dp: Add functions to get min/max src input bpc with DSC
...
Separate out functions for getting maximum and minimum input BPC based
on platforms, when DSC is used.
v2: Use HAS_DSC macro instead of platform check while getting min input
bpc. (Stan)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-10-ankit.k.nautiyal@intel.com
2023-08-18 09:42:20 +05:30
Ankit Nautiyal
e1a211e316
drm/i915/dp: Avoid forcing DSC BPC for MST case
...
For MST the bpc is hardcoded to 8, and pipe bpp to 24.
So avoid forcing DSC bpc for MST case.
v2: Warn and ignore the debug flag than to bail out. (Jani)
v3: Fix dbg message to mention forced bpc instead of bpp.
v4: Fix checkpatch longline warning.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-9-ankit.k.nautiyal@intel.com
2023-08-18 09:42:19 +05:30
Ankit Nautiyal
90bba71a1a
drm/i915/dp: Remove extra logs for printing DSC info
...
DSC compressed bpp and slice counts are already getting printed at the
end of dsc compute config. Remove extra logs.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-8-ankit.k.nautiyal@intel.com
2023-08-18 09:42:18 +05:30
Ankit Nautiyal
7f5ac36526
drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck
...
As per Bsepc:49259, Bigjoiner BW check puts restriction on the
compressed bpp for a given CDCLK, pixelclock in cases where
Bigjoiner + DSC are used.
Currently compressed bpp is computed first, and it is ensured that
the bpp will work at least with the max CDCLK freq.
Since the CDCLK is computed later, lets account for Bigjoiner BW
check while calculating Min CDCLK.
v2: Use pixel clock in the bw calculations. (Ville)
v3: Use helper to account for FEC overhead. (Stan)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-7-ankit.k.nautiyal@intel.com
2023-08-18 09:42:17 +05:30
Ankit Nautiyal
d9f864efb9
drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
...
In Bigjoiner check for DSC, bigjoiner interface bits for DP for
DISPLAY > 13 is 36 (Bspec: 49259).
v2: Corrected Display ver to 13.
v3: Follow convention for conditional statement. (Ville)
v4: Fix check for display ver. (Ville)
v5: Added note for 2 PPC. (Stan)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-6-ankit.k.nautiyal@intel.com
2023-08-18 09:42:17 +05:30
Ankit Nautiyal
8d5284765a
drm/i915/dp: Use consistent name for link bpp and compressed bpp
...
Currently there are many places where we use output_bpp for link bpp and
compressed bpp.
Lets use consistent naming:
output_bpp : The intermediate value taking into account the
output_format chroma subsampling.
compressed_bpp : target bpp for the DSC encoder.
link_bpp : final bpp used in the link.
For 444 sampling without DSC:
link_bpp = output_bpp = pipe_bpp
For 420 sampling without DSC:
output_bpp = pipe_bpp / 2
link_bpp = output_bpp
For 444 sampling with DSC:
output_bpp = pipe_bpp
link_bpp = compressed_bpp, computed with output_bpp (i.e. pipe_bpp in
this case)
For 420 sampling with DSC:
output_bpp = pipe_bpp/2
link_bpp = compressed_bpp, computed with output_bpp
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-5-ankit.k.nautiyal@intel.com
2023-08-18 09:42:16 +05:30
Ankit Nautiyal
fd279d21ed
drm/i915/dp_mst: Use output_format to get the final link bpp
...
The final link bpp used to calculate the m_n values depend on the
output_format. Though the output_format is set to RGB for MST case and
the link bpp will be same as the pipe bpp, for the sake of semantics,
lets calculate the m_n values with the link bpp, instead of pipe_bpp.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-4-ankit.k.nautiyal@intel.com
2023-08-18 09:42:15 +05:30
Ankit Nautiyal
3a4b4809c8
drm/i915/dp: Move compressed bpp check with 420 format inside the helper
...
Move the check for limiting compressed bits_per_pixel for 420,422
formats in the helper to compute bits_per_pixel.
v2: Fix typo in commit message. (Ankit)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-3-ankit.k.nautiyal@intel.com
2023-08-18 09:42:14 +05:30
Ankit Nautiyal
a1476c2a97
drm/i915/dp: Consider output_format while computing dsc bpp
...
While using DSC the compressed bpp is computed assuming RGB output
format. Consider the output_format and compute the compressed bpp
during mode valid and compute config steps.
For DP-MST we currently use RGB output format only, so continue
using RGB while computing compressed bpp for MST case.
v2: Use output_bpp instead for pipe_bpp to clamp compressed_bpp. (Ville)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-2-ankit.k.nautiyal@intel.com
2023-08-18 09:42:13 +05:30
Matt Roper
4ebf43d048
drm/i915: Eliminate has_4tile feature flag
...
We don't really need a feature flag for has_4tile since there's a
well-defined cutover point (DG2) at which all new platforms started
using Tile4 as their Y-major tiling layout. The GT side of the code
already handles Tile4 vs legacy TileY with checks on the IP version
rather than looking at the feature flag, and we can simplify the display
code similarly (which will also make it more self-contained for re-use
in the Xe driver).
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Haridhar Kalvala <haridhar.kalvala@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230810234618.3738870-4-matthew.d.roper@intel.com
2023-08-17 15:41:30 -07:00
Matt Roper
3d623691ca
drm/i915/selftest: Simplify Y-major tiling in blit selftest
...
Rather than picking random tiling formats from a pool that contains both
TileY and Tile4 and then trying to replace one with the other depending
on the platform, it's simpler to just use a single enum value that
represents whatever the platform-appropriate Y-major tiling format is
(i.e., Tile4 on Xe_HP and beyond, legacy TileY on earlier platforms).
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Haridhar Kalvala <haridhar.kalvala@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230810234618.3738870-3-matthew.d.roper@intel.com
2023-08-17 15:41:29 -07:00
Matt Roper
e50086f3d3
drm/i915/dg2: Drop pre-production display workarounds
...
All production DG2 cards have display stepping C0 or later. We can drop
Wa_14013215631 (only applies to pre-C0) and make Wa_14010547955
unconditional (applies to everything B0 and beyond). Also drop the
now-unused IS_DG2_DISPLAY_STEP macro.
Bspec: 44477
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230816214201.534095-9-matthew.d.roper@intel.com
2023-08-17 15:15:38 -07:00
Matt Roper
3d3e027161
drm/i915/dg2: Recognize pre-production hardware
...
The first production SoC steppings for DG2 were C0 (for G10), B1 (for
G11), and A1 (for G12). This corresponds to PCI revision IDs 0x8, 0x5,
and 0x1 respectively. Add this information to the driver's
pre-production detection.
Bspec: 44477
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230816214201.534095-8-matthew.d.roper@intel.com
2023-08-17 15:15:23 -07:00
Gustavo Sousa
226fa3ab8b
drm/i915/cx0: Program vswing only for owned lanes
...
According to the BSpec, voltage swing programming should be done for
owned PHY lanes. Do not program a not-owned PHY lane.
BSpec: 74103, 74104
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230814131331.69516-5-gustavo.sousa@intel.com
2023-08-17 12:25:15 -07:00
Gustavo Sousa
6a62986bb5
drm/i915/cx0: Enable/disable TX only for owned PHY lanes
...
Display must not enable or disable transmitters for not-owned PHY lanes.
BSpec: 64539
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230814131331.69516-4-gustavo.sousa@intel.com
2023-08-17 12:25:14 -07:00
Gustavo Sousa
0f5c2e5bd2
drm/i915: Simplify intel_cx0_program_phy_lane() with loop
...
It is possible to generalize the "disable" value for the transmitters to
be a bit mask based on the port width and the port reversal boolean,
with a small exception for DP-alt mode with "x1" port width.
Simplify the code by using such a mask and a for-loop instead of using
switch-case statements.
v2:
- Use (i < 2) instead of (i / 2 == 0) for PHY lane mask selection.
(Jani)
BSpec: 64539
Cc: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230814131331.69516-3-gustavo.sousa@intel.com
2023-08-17 12:25:14 -07:00
Gustavo Sousa
3a8ecd4c3e
drm/i915/cx0: Add intel_cx0_get_owned_lane_mask()
...
There are more parts of C10/C20 programming that need to take owned
lanes into account. Define the function intel_cx0_get_owned_lane_mask()
and use it. There will be new users of that function in upcoming
changes.
BSpec: 64539
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230814131331.69516-2-gustavo.sousa@intel.com
2023-08-17 12:25:13 -07:00
Anshuman Gupta
2643e6d1f2
drm/i915/dgfx: Enable d3cold at s2idle
...
System wide suspend already has support for lmem save/restore during
suspend therefore enabling d3cold for s2idle and keepng it disable for
runtime PM.(Refer below commit for d3cold runtime PM disable justification)
'commit 66eb93e71astable@vger.kernel.org ".
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8755
Cc: stable@vger.kernel.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Tested-by: Aaron Ma <aaron.ma@canonical.com >
Tested-by: Jianshui Yu <Jianshui.yu@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230816125216.1722002-1-anshuman.gupta@intel.com
2023-08-17 21:13:36 +05:30
Gustavo Sousa
c0eeae2142
drm/i915/display: Remove unused POWER_DOMAIN_MASK
...
That macro became unused with commit 323286c812gustavo.sousa@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230815201344.298573-1-gustavo.sousa@intel.com
2023-08-16 12:14:36 -07:00
Alan Previn
3b918f4f0c
drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS
...
After recent discussions with Mesa folks, it was requested
that we optimize i915's GET_PARAM for the PXP_STATUS without
changing the UAPI spec.
Add these additional optimizations:
- If any PXP initializatoin flow failed, then ensure that
we catch it so that we can change the returned PXP_STATUS
from "2" (i.e. 'PXP is supported but not yet ready')
to "-ENODEV". This typically should not happen and if it
does, we have a platform configuration issue.
- If a PXP arbitration session creation event failed
due to incorrect firmware version or blocking SOC fusing
or blocking BIOS configuration (platform reasons that won't
change if we retry), then reflect that blockage by also
returning -ENODEV in the GET_PARAM:PXP_STATUS.
- GET_PARAM:PXP_STATUS should not wait at all if PXP is
supported but non-i915 dependencies (component-driver /
firmware) we are still pending to complete the init flows.
In this case, just return "2" immediately (i.e. 'PXP is
supported but not yet ready').
Difference from prio revs:
v3: - Rebase with latest tip that has pulled in setting the
gsc fw load to fail if proxy init fails.
v2: - Use a #define for the default readiness timeout (Vivaik).
- Improve comments around the failing of proxy-init.
v1: - Change the commit msg style to be imperative. (Jani)
- Rename timeout to timeout_ms. (Jani)
- Fix is_fw_err_platform_config to use higher order
param (pxp) first. (Jani)
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com >
Reviewed-by: Balasubrawmanian, Vivaik <vivaik.balasubrawmanian@intel.com >
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230802182550.1592926-1-alan.previn.teres.alexis@intel.com
2023-08-15 13:28:18 -07:00
Alan Previn
ac765b7018
drm/i915/pxp/mtl: intel_pxp_init_hw needs runtime-pm inside pm-complete
...
In the case of failed suspend flow or cases where the kernel does not go
into full suspend but goes from suspend_prepare back to resume_complete,
we get called for a pm_complete but without runtime_pm guaranteed.
Thus, ensure we take the runtime_pm when calling intel_pxp_init_hw
from within intel_pxp_resume_complete.
v2: resume_complete and runtime_resume should abstract a common
helper with different wakeref requirements. (Daniele)
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com >
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230802190611.1639371-1-alan.previn.teres.alexis@intel.com
2023-08-15 13:28:13 -07:00
Arun R Murthy
95c23e2085
drm/i915/dp: Fix LT debug print in SDP CRC enable
...
The debug print for enabling SDP CRC16 is applicable only for DP2.0, but
this debug print was not within the uhbr check and was always printed.
Fix this by adding proper checks and returning.
v2: Fix typo in commit message (Ankit)
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com >
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com >
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230808042000.3210715-1-arun.r.murthy@intel.com
2023-08-14 10:19:32 +05:30
Suraj Kandpal
58554dbf09
drm/i915/vdsc: Fix first_line_bpg_offset calculation
...
On checking DSC1.1 Errata and DSC 1.2 spec the current formula
we were using was incorrect to calculate first_line_bpg_offset.
The new fixed formula is derived from C model.
--v2
-Use clamp function in linux/minmax.h [Ankit]
--v3
-remove linux/minmax.h header
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com >
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230804083737.3844575-1-suraj.kandpal@intel.com
2023-08-14 10:18:54 +05:30
Imre Deak
4bed08d99c
drm/i915: Don't change the status of forced connectors during HPD poll detect
...
As described in the previous patch a connector shouldn't change its
status while it's forced to a connected/disconnected state. This can
still happen while running the connector detect function to account for
lost HPD events in a low-power state.
Fix this by reusing the connector detect function which handles a
hotplug event and prevents updating the status for forced connectors as
expected.
Testcase: igt@kms_force_connector_basic@force-connector-state
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Jouni Högander <jouni.hogander@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230809104307.1218058-3-imre.deak@intel.com
2023-08-11 16:08:53 +03:00
Imre Deak
b77d010d82
drm/i915: Don't change the status of forced connectors during hotplug detect
...
DRM display connectors forced to a connected/disconnected state via the
drm_connector::force member shouldn't change their status. Atm, this can
still happen in the connector's detect function when called to handle a
hotplug event. This in turn may lead to the GETCONNECTOR ioctl to report
the incorrect state if it's called to return the connector properties
without doing an actual detection (by calling the ioctl with a non-zero
drm_mode_get_connector::count_modes).
Fix the above by updating the connector state during hotplug detect only
if the connector state is not forced.
Testcase: igt@kms_force_connector_basic@force-connector-state
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Jouni Högander <jouni.hogander@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230809104307.1218058-2-imre.deak@intel.com
2023-08-11 16:08:53 +03:00
Imre Deak
cc018c2626
drm/i915: Avoid endless HPD poll detect loop via runtime suspend/resume
...
The issue fixed in
commit a8ddac7c9fhttps://gitlab.freedesktop.org/drm/intel/-/issues/7940#note_1997403
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Jouni Högander <jouni.hogander@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230809104307.1218058-1-imre.deak@intel.com
2023-08-11 16:08:52 +03:00
Jani Nikula
129ebb54f5
drm/i915/irq: move all PCH irq postinstall calls to display code
...
Unify on making the calls from display code. Need to add an if ladder in
gen8_de_irq_postinstall() for now, but the function looks like it could
be overall be better split by platform. Something for the future.
The display version check for mtp seems a bit suspect, but this matches
current code.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/fe51744aec9e2f465caf0d699b8a15591859f89e.1691509966.git.jani.nikula@intel.com
2023-08-10 15:14:58 +03:00
Jani Nikula
fcc02c754f
drm/i915/irq: add ilk_de_irq_postinstall()
...
Add a dedicated de postinstall function.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/f4a8570881e9be28a2406134b2898b8680f9e765.1691509966.git.jani.nikula@intel.com
2023-08-10 15:14:56 +03:00
Jani Nikula
1007337f54
drm/i915/irq: add dg1_de_irq_postinstall()
...
Add a dedicated de postinstall function.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/cb6bb860fb7596d6b37c3e1e4c7657064d2d747a.1691509966.git.jani.nikula@intel.com
2023-08-10 15:14:53 +03:00
Jani Nikula
1486d040df
drm/i915/irq: add dedicated intel_display_irq_init()
...
Continue splitting display from the rest.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/45c247c9f5104f3e25bd8913644402a11ec3afaf.1691509966.git.jani.nikula@intel.com
2023-08-10 15:14:50 +03:00
Jani Nikula
bf9e1bdaf1
drm/i915: debug log when GMD ID indicates there's no display
...
Debug log similar to the device id based identification of no display.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230804084600.1005818-2-jani.nikula@intel.com
2023-08-10 10:19:32 +03:00
Jani Nikula
1435188307
drm/i915: fix display probe for IVB Q and IVB D GT2 server
...
The current display probe is unable to differentiate between IVB Q and
IVB D GT2 server, as they both have the same device id, but different
subvendor and subdevice. This leads to the latter being misidentified as
the former, and should just end up not having a display. However, the no
display case returns a NULL as the display device info, and promptly
oopses.
As the IVB Q case is rare, and we're anyway moving towards GMD ID,
handle the identification requiring subvendor and subdevice as a special
case first, instead of unnecessarily growing the intel_display_ids[]
array with subvendor and subdevice.
[ 5.425298] BUG: kernel NULL pointer dereference, address: 0000000000000000
[ 5.426059] #PF: supervisor read access in kernel mode
[ 5.426810] #PF: error_code(0x0000) - not-present page
[ 5.427570] PGD 0 P4D 0
[ 5.428285] Oops: 0000 [#1 ] PREEMPT SMP PTI
[ 5.429035] CPU: 0 PID: 137 Comm: (udev-worker) Not tainted 6.4.0-1-amd64 #1 Debian 6.4.4-1
[ 5.429759] Hardware name: HP HP Z220 SFF Workstation/HP Z220 SFF Workstation, BIOS 4.19-218-gb184e6e0a1 02/02/2023
[ 5.430485] RIP: 0010:intel_device_info_driver_create+0xf1/0x120 [i915]
[ 5.431338] Code: 48 8b 97 80 1b 00 00 89 8f c0 1b 00 00 48 89 b7 b0 1b 00 00 48 89 97 b8 1b 00 00 0f b7 fd e8 76 e8 14 00 48 89 83 50 1b 00 00 <48> 8b 08 48 89 8b c4 1b 00 00 48 8b 48 08 48 89 8b cc 1b 00 00 8b
[ 5.432920] RSP: 0018:ffffb8254044fb98 EFLAGS: 00010206
[ 5.433707] RAX: 0000000000000000 RBX: ffff923076e80000 RCX: 0000000000000000
[ 5.434494] RDX: 0000000000000260 RSI: 0000000100001000 RDI: 000000000000016a
[ 5.435277] RBP: 000000000000016a R08: ffffb8254044fb00 R09: 0000000000000000
[ 5.436055] R10: ffff922d02761de8 R11: 00657361656c6572 R12: ffffffffc0e5d140
[ 5.436867] R13: ffff922d00b720d0 R14: 0000000076e80000 R15: ffff923078c0cae8
[ 5.437646] FS: 00007febd19a18c0(0000) GS:ffff92307c000000(0000) knlGS:0000000000000000
[ 5.438434] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 5.439218] CR2: 0000000000000000 CR3: 000000010256e002 CR4: 00000000001706f0
[ 5.440009] Call Trace:
[ 5.440824] <TASK>
[ 5.441611] ? __die+0x23/0x70
[ 5.442394] ? page_fault_oops+0x17d/0x4c0
[ 5.443173] ? exc_page_fault+0x7f/0x180
[ 5.443949] ? asm_exc_page_fault+0x26/0x30
[ 5.444756] ? intel_device_info_driver_create+0xf1/0x120 [i915]
[ 5.445652] ? intel_device_info_driver_create+0xea/0x120 [i915]
[ 5.446545] i915_driver_probe+0x7f/0xb60 [i915]
[ 5.447431] ? drm_privacy_screen_get+0x15c/0x1a0 [drm]
[ 5.448240] local_pci_probe+0x45/0xa0
[ 5.449013] pci_device_probe+0xc7/0x240
[ 5.449748] really_probe+0x19e/0x3e0
[ 5.450464] ? __pfx___driver_attach+0x10/0x10
[ 5.451172] __driver_probe_device+0x78/0x160
[ 5.451870] driver_probe_device+0x1f/0x90
[ 5.452601] __driver_attach+0xd2/0x1c0
[ 5.453293] bus_for_each_dev+0x88/0xd0
[ 5.453989] bus_add_driver+0x116/0x220
[ 5.454672] driver_register+0x59/0x100
[ 5.455336] i915_init+0x25/0xc0 [i915]
[ 5.456104] ? __pfx_i915_init+0x10/0x10 [i915]
[ 5.456882] do_one_initcall+0x5d/0x240
[ 5.457511] do_init_module+0x60/0x250
[ 5.458126] __do_sys_finit_module+0xac/0x120
[ 5.458721] do_syscall_64+0x60/0xc0
[ 5.459314] ? syscall_exit_to_user_mode+0x1b/0x40
[ 5.459897] ? do_syscall_64+0x6c/0xc0
[ 5.460510] entry_SYSCALL_64_after_hwframe+0x72/0xdc
[ 5.461082] RIP: 0033:0x7febd20b0eb9
[ 5.461648] Code: 08 89 e8 5b 5d c3 66 2e 0f 1f 84 00 00 00 00 00 90 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 2f 1f 0d 00 f7 d8 64 89 01 48
[ 5.462905] RSP: 002b:00007fffabb1ba78 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
[ 5.463554] RAX: ffffffffffffffda RBX: 0000561e6304f410 RCX: 00007febd20b0eb9
[ 5.464201] RDX: 0000000000000000 RSI: 00007febd2244f0d RDI: 0000000000000015
[ 5.464869] RBP: 00007febd2244f0d R08: 0000000000000000 R09: 000000000000000a
[ 5.465512] R10: 0000000000000015 R11: 0000000000000246 R12: 0000000000020000
[ 5.466124] R13: 0000000000000000 R14: 0000561e63032b60 R15: 000000000000000a
[ 5.466700] </TASK>
[ 5.467271] Modules linked in: i915(+) drm_buddy video crc32_pclmul sr_mod hid_generic wmi crc32c_intel i2c_algo_bit sd_mod cdrom drm_display_helper cec usbhid rc_core ghash_clmulni_intel hid sha512_ssse3 ttm sha512_generic xhci_pci ehci_pci xhci_hcd ehci_hcd nvme ahci drm_kms_helper nvme_core libahci t10_pi libata psmouse aesni_intel scsi_mod crypto_simd i2c_i801 scsi_common crc64_rocksoft_generic cryptd i2c_smbus drm lpc_ich crc64_rocksoft crc_t10dif e1000e usbcore crct10dif_generic usb_common crct10dif_pclmul crc64 crct10dif_common button
[ 5.469750] CR2: 0000000000000000
[ 5.470364] ---[ end trace 0000000000000000 ]---
[ 5.470971] RIP: 0010:intel_device_info_driver_create+0xf1/0x120 [i915]
[ 5.471699] Code: 48 8b 97 80 1b 00 00 89 8f c0 1b 00 00 48 89 b7 b0 1b 00 00 48 89 97 b8 1b 00 00 0f b7 fd e8 76 e8 14 00 48 89 83 50 1b 00 00 <48> 8b 08 48 89 8b c4 1b 00 00 48 8b 48 08 48 89 8b cc 1b 00 00 8b
[ 5.473034] RSP: 0018:ffffb8254044fb98 EFLAGS: 00010206
[ 5.473698] RAX: 0000000000000000 RBX: ffff923076e80000 RCX: 0000000000000000
[ 5.474371] RDX: 0000000000000260 RSI: 0000000100001000 RDI: 000000000000016a
[ 5.475045] RBP: 000000000000016a R08: ffffb8254044fb00 R09: 0000000000000000
[ 5.475725] R10: ffff922d02761de8 R11: 00657361656c6572 R12: ffffffffc0e5d140
[ 5.476405] R13: ffff922d00b720d0 R14: 0000000076e80000 R15: ffff923078c0cae8
[ 5.477124] FS: 00007febd19a18c0(0000) GS:ffff92307c000000(0000) knlGS:0000000000000000
[ 5.477811] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 5.478499] CR2: 0000000000000000 CR3: 000000010256e002 CR4: 00000000001706f0
Fixes: 69d439818fhttps://gitlab.freedesktop.org/drm/intel/-/issues/8991
Cc: Matt Roper <matthew.d.roper@intel.com >
Cc: Andrzej Hajda <andrzej.hajda@intel.com >
Reviewed-by: Luca Coelho <luciano.coelho@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230804084600.1005818-1-jani.nikula@intel.com
2023-08-10 10:19:10 +03:00
Luca Coelho
757b90bbfa
drm/i915/display: pre-initialize some values in probe_gmdid_display()
...
When intel_display_device_probe() (and, subsequently,
probe_gmdid_display()) returns, the caller expects ver, rel and step
to be initialized. Since there's no way to check that there was a
failure and no_display was returned without some further refactoring,
pre-initiliaze all these values to zero to keep it simple and safe.
Signed-off-by: Luca Coelho <luciano.coelho@intel.com >
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com >
Signed-off-by: Jouni Högander <jouni.hogander@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230601090338.80284-1-luciano.coelho@intel.com
2023-08-08 13:45:56 +03:00
Dnyaneshwar Bhadane
2aa01e4dde
drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines
...
Driver refers to the platform Alderlake S as ADLS_RPLS in places
and RAPTORLAKE_S in some.
v2:
- Unrolled wrapper IS_ADLS_GRAPHICS_STEP
v3:
- Replace IS_RAPTORLAKE_S instead of IS_ADLS_RPLS. (Tvrtko/Lucas).
- Remove unused macro IS_ADLS_GRAPHICS/DISPLAY_STEP
- Change the subject
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-15-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:13 -07:00
Anusha Srivatsa
6373b79302
drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines
...
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-14-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:12 -07:00
Dnyaneshwar Bhadane
e5706c0496
drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines
...
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P
v2:
- Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas)
- Change the subject
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-13-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:12 -07:00
Dnyaneshwar Bhadane
de01a9193a
drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP defines
...
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P.
v2:
- Replace IS_ADLP_RPLP with IS_RAPTORLAKE_P. (Tvrtko/Lucas)
- Change the subject
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-12-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:11 -07:00
Dnyaneshwar Bhadane
cc0c986a38
drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step
...
Driver refers to the platform Alderlake P as ADLP in places
and ALDERLAKE_P in some. Making the consistent change
to avoid confusion of the right naming convention for
the platform.
v2:
- Unrolled wrapper IS_ADLP_GRAPHICS_STEP and Replace
- Added IS_ALDERLAKE_P() && IS_GRAPHICS_STEP() (Jani/Tvrtko).
v3:
- Removed unused macros of display steps.
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-11-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:10 -07:00
Dnyaneshwar Bhadane
48077b0b4e
drm/i915/tgl: s/TGL/TIGERLAKE for platform/subplatform defines
...
Follow consistent naming convention. Replace TGL with
TIGERLAKE.Replace IS_TGL_DISPLAY_STEP with
IS_TIGERLAKE() && IS_DISPLAY_STEP().
v2:
- s/TGL/tgl in the subject prefix(Anusha)
v3:
- Unrolled wrapper IS_TGL_DISPLAY_STEP and Replace
- Replace IS_PLATFORM && DISPLAY_STEP (Jani/Tvrtko).
v4:
- Removed unused macros
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-10-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:09 -07:00
Dnyaneshwar Bhadane
0c65dc0626
drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform defines
...
Follow consistent naming convention. Replace JSL with
JASPERLAKE. Unroll IS_JSL_EHL() define with IS_JASPERLAKE() ||
IS_ELKHARTLAKE() condition. Change in the display step define for
Jasperlake.
v2:
- Change subject prefix skl instead of SKL(Anusha)
v3:
- Remove the use of define IS_JSL_EHL.
- Replace with IS_JASPERLAKE() || IS_ELKHARTLAKE()
- Unrolled wrapper IS_JSL_ELK_DISPLAY_STEP (Jani/Tvrtko)
v4:
- Removed unused macro
v5:
- Resolved valid checkpatch warning(Jani)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-9-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:06 -07:00
Dnyaneshwar Bhadane
e549097972
drm/i915/rkl: s/RKL/ROCKETLAKE for platform/subplatform defines
...
Follow consistent naming convention. Replace RKL with
ROCKETLAKE.Replace IS_RKL_GRAPHICS_STEP with
IS_ROCKETLAKE && IS_DISPLAY_STEP.
v2:
- s/RKL/rkl in the subject prefix(Anusha)
v3:
- Unrolled wrapper IS_RKL_DISPLAY_STEP.
- Replace IS_PLATFORM && IS_DISPLAY_STEP (Jani/Tvrtko)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-8-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:05 -07:00
Dnyaneshwar Bhadane
bd7b85014d
drm/i915/cml: s/CML/COMETLAKE for platform/subplatform defines
...
Follow consistent naming convention. Replace CML with
COMETLAKE.
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-7-dnyaneshwar.bhadane@intel.com
2023-08-07 15:37:05 -07:00
