Rajendra Nayak
6123e7443f
arm64: dts: sdm845: Add sdhc opps and power-domains
...
Add the power domain supporting performance state and the corresponding
OPP tables for the sdhc device on sdm845.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/1593506712-24557-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-13 16:43:47 -07:00
Rajendra Nayak
d91ea1e0e8
arm64: dts: sc7180: Add OPP table for all qup devices
...
qup has a requirement to vote on the performance state of the CX domain
in sc7180 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/1593506712-24557-3-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-13 16:43:21 -07:00
Rajendra Nayak
13cadb34e5
arm64: dts: sdm845: Add OPP table for all qup devices
...
qup has a requirement to vote on the performance state of the CX domain
in sdm845 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Signed-off-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/1593506712-24557-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-13 16:36:19 -07:00
Rajendra Nayak
a24ad4878c
arm64: dts: sc7180: Add qspi opps and power-domains
...
Add the power domain supporting performance state and the corresponding
OPP tables for the qspi device on sc7180
Reviewed-by: Matthias Kaehlcke <mka@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/1593769293-6354-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-13 16:16:12 -07:00
Rajendra Nayak
5b4de2f8b5
arm64: dts: sdm845: Add qspi opps and power-domains
...
Add the power domain supporting performance state and the corresponding
OPP tables for the qspi device on sdm845
Reviewed-by: Matthias Kaehlcke <mka@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/1593769293-6354-3-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-13 16:16:08 -07:00
Sibi Sankar
54b50f2153
arm64: dts: qcom: sdm845: Add cpu OPP tables
...
Add OPP tables required to scale DDR/L3 per freq-domain on SDM845 SoCs.
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Signed-off-by: Sibi Sankar <sibis@codeaurora.org >
Link: https://lore.kernel.org/r/20200702204643.25785-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-09 07:45:44 -07:00
Sibi Sankar
0825761030
arm64: dts: qcom: sc7180: Drop the unused non-MSA SID
...
Having a non-MSA (Modem Self-Authentication) SID bypassed breaks modem
sandboxing i.e if a transaction were to originate from it, the hardware
memory protections units (XPUs) would fail to flag them (any transaction
originating from modem are historically termed as an MSA transaction).
Drop the unused non-MSA modem SID on SC7180 SoCs and cheza so that SMMU
continues to block them.
Tested-by: Douglas Anderson <dianders@chromium.org >
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org >
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Fixes: bec71ba243 ("arm64: dts: qcom: sc7180: Update Q6V5 MSS node")
Fixes: 68aee4af5f ("arm64: dts: qcom: sdm845-cheza: Add iommus property")
Cc: stable@vger.kernel.org
Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org >
Signed-off-by: Sibi Sankar <sibis@codeaurora.org >
Link: https://lore.kernel.org/r/20200630081938.8131-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-08 12:19:35 -07:00
Bjorn Andersson
948f6161c6
arm64: dts: qcom: sdm845: Add IMEM and PIL info region
...
Add a simple-mfd representing IMEM on SDM845 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteprocs.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Link: https://lore.kernel.org/r/20200622191942.255460-6-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-01 22:10:44 -07:00
Bjorn Andersson
809cc57908
arm64: dts: qcom: qcs404: Add IMEM and PIL info region
...
Add a simple-mfd representing IMEM on QCS404 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteprocs.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Link: https://lore.kernel.org/r/20200622191942.255460-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-07-01 22:10:44 -07:00
Sibi Sankar
00e3f891ca
arm64: dts: qcom: sc7180: Add cpu OPP tables
...
Add OPP tables required to scale DDR/L3 per freq-domain on SC7180 SoCs.
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Tested-by: Douglas Anderson <dianders@chromium.org >
Signed-off-by: Sibi Sankar <sibis@codeaurora.org >
Link: https://lore.kernel.org/r/20200626190808.8716-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-30 16:06:41 -07:00
Akash Asthana
e867f429e6
arm64: dts: sc7180: Add interconnect for QUP and QSPI
...
Add interconnect ports for GENI QUPs and QSPI to set bus capabilities.
Signed-off-by: Akash Asthana <akashast@codeaurora.org >
Link: https://lore.kernel.org/r/1592908737-7068-9-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-24 21:51:31 -07:00
Sivaprakash Murugesan
5e09bc51d0
arm64: dts: ipq8074: enable USB support
...
IPQ8074 has two super speed usb ports, add phy and dwc3 nodes
to enable them.
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org >
Link: https://lore.kernel.org/r/1591625479-4483-6-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-24 10:40:14 -07:00
Konrad Dybcio
732c94def0
arm64: dts: qcom: angler: Add qcom,msm-id and pmic-id
...
Add properties required for the bootloader to select
the correct bootloader blob. They have been removed from
the SoC device tree as they should be set on a per-device
basis.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-11-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:22:59 -07:00
Konrad Dybcio
c21e7c0679
arm64: dts: qcom: msm8994: Add PSCI node
...
Add PSCI node to enable multi-processor startup.
Note that not every 8994 device firmware supports PSCI,
and even if, then it can only start the cores and not
shut them down.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-10-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:22:16 -07:00
Konrad Dybcio
a1026ca242
arm64: dts: qcom: msm8994: Add pmu node
...
Add the CPU PMU to get perf support for hardware events.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-9-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:21:55 -07:00
Konrad Dybcio
d3d071a0e5
arm64: dts: qcom: msm8994: Add I2C, SPI and BLSP DMA nodes
...
Add support for I2C and SPI buses to enable peripherals
such as touchscreens or sensors. Also add DMA nodes,
configuration and BLSP2 UART2 interface.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-8-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:20:50 -07:00
Konrad Dybcio
448d9c2216
arm64: dts: qcom: msm8994: Add SDHCI1 node
...
Enable support for SDHCI on msm8994-based devices.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-6-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:17:08 -07:00
Konrad Dybcio
02d8091bbc
arm64: dts: qcom: msm8994: Add a proper CPU map
...
Add a proper CPU map to enable the use of all 8 cores.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-4-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:05:37 -07:00
Konrad Dybcio
b0ad598f8e
arm64: dts: qcom: msm8994: Add SPMI PMIC arbiter device
...
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-3-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:05:05 -07:00
Konrad Dybcio
7c865b09b0
arm64: dts: qcom: msm8994: Modernize the DTS style
...
Following changes have been made:
- remove name, compatible and msm-id
- wrap clocks in clocks{}
- order nodes by name and by address
- clock_gcc -> gcc
- msmgpio -> tlmm
- qcom,smem -> smem
- remove unit-address from smem
- retire msm8994-pins.dtsi
- add some of the missing pins
- make comments C-style
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200623224813.297077-2-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 16:03:20 -07:00
Bjorn Andersson
23a8903785
arm64: dts: qcom: sm8250: Add remoteprocs
...
Add remoteproc nodes for the audio, compute and sensor cores, define
glink for each one and enable them on the MTP with appropriate firmware
defined.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20200622222747.717306-6-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 12:58:21 -07:00
Bjorn Andersson
8770a2a84e
arm64: dts: qcom: sm8250: Add SMP2P nodes
...
SMP2P is used for interrupting and being interrupted about remoteproc
state changes related to the audio, compute and sensor subsystems.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20200622222747.717306-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 12:58:03 -07:00
Bjorn Andersson
087d537aec
arm64: dts: qcom: sm8250: Add QMP AOSS node
...
Add a node for the QMP AOSS.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20200622222747.717306-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 12:57:49 -07:00
Bjorn Andersson
e5361e7554
arm64: dts: qcom: sm8250: Add IPCC
...
Add the IPCC node, used to send and receive IPC signals with
remoteprocs.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20200622222747.717306-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 12:57:35 -07:00
Bjorn Andersson
877666435d
arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11
...
PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels,
rather than as a regulator. As such it's available from the rpmhpd as
the SM8250_LCX power domain.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Fixes: ec13d5c23a ("arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009")
Link: https://lore.kernel.org/r/20200622222747.717306-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 12:56:51 -07:00
Martin Botka
234d7d6b4c
arm64: dts: qcom: Add support for Sony Xperia 10/10 Plus (Ganges platform)
...
Add device tree support for the Sony Xperia 10 and 10
Plus smartphones. They are all based on the Sony Ganges
platform (sdm630/636) and share a lot of common code.
The differences are really minor, so a Ganges-common DTSI
has been created to reduce clutter.
10 - Kirin
10 Plus - Mermaid
This platform is based on SoMC Nile, but there are some
major differences when it comes to pin configuration and
panel setup (among others).
The boards currently support:
* Screen console
* SDHCI
* I2C
* pstore log dump
* GPIO keys
* PSCI idle states
Signed-off-by: Martin Botka <martin.botka1@gmail.com >
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Tested-by: Martin Botka <martin.botka1@gmail.com >
Link: https://lore.kernel.org/r/20200622192558.152828-7-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 00:29:00 -07:00
Konrad Dybcio
e781633b60
arm64: dts: qcom: Add support for Sony Xperia XA2/Plus/Ultra (Nile platform)
...
Add device tree support for the Sony Xperia XA2, XA2 Plus and
XA2 Ultra smartphones. They are all based on the Sony Nile
platform (sdm630) and share a lot of common code. The
differences are really minor, so a Nile-common DTSI
has been created to reduce clutter.
XA2 - Pioneer
XA2 Plus - Voyager
XA2 Ultra - Discovery
The boards currently support:
* Screen console
* SDHCI
* I2C
* pstore log dump
* GPIO keys
* PSCI idle states
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Tested-by: Łukasz Patron <priv.luk@gmail.com >
Link: https://lore.kernel.org/r/20200622192558.152828-6-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 00:28:59 -07:00
Konrad Dybcio
b190fb0106
arm64: dts: qcom: sdm630: Add sdm630 dts file
...
Add devicetree files for SDM630 SoC and its pin configuration.
This commit adds basic nodes like cpu, psci and other required
configuration for booting up from eMMC to the serial console.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200622192558.152828-5-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 00:28:55 -07:00
Konrad Dybcio
4870c76c00
arm64: dts: qcom: pm660(l): Add base dts files
...
Add base DTS files for pm660(l) along with GPIOs, power-on and
rtc nodes.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com >
Link: https://lore.kernel.org/r/20200622192558.152828-4-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-23 00:28:49 -07:00
Dmitry Baryshkov
e5813b1576
arm64: dts: qcom: sm8250: add I2C and SPI nodes
...
Much like SDM845 each serial engine has 4 pins attached. Add all
possible I2C and SPI nodes for all 20 serial engines.
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20200606131300.3874987-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 12:38:03 -07:00
Bjorn Andersson
16951b490b
arm64: dts: qcom: sm8250: Add TLMM pinctrl node
...
Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on
the MTP as firmware does not allow Linux to touch these pins.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20200430181716.3797842-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 12:36:35 -07:00
Dmitry Baryshkov
4c5a410d3b
arm64: dts: qcom: pm8150x: add thermal alarms and thermal zones
...
Add temperature alarm and thermal zone configuration to all three
pm8150 instances. Configuration is largely based on the msm-4.19 tree.
These alarms use main adc of the pmic. Separate temperature adc is not
supported yet.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20200621192824.2069145-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 12:31:59 -07:00
Dmitry Baryshkov
6304b5e960
arm64: dts: qcom: sm8250-mtp: include pmic files
...
Include files describing used PMIC chips, GPIOs, power on, etc nodes.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20200621192824.2069145-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 12:31:59 -07:00
Dmitry Baryshkov
380af2b7d1
arm64: dts: qcom: pm8009: Add base dts file
...
Add base DTS file for pm8009 along with GPIOs and power-on nodes.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20200621192824.2069145-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 12:31:54 -07:00
Sivaprakash Murugesan
cbc142c895
arm64: dts: ipq8074: enable sdhci node
...
Enable mmc device found on ipq8074 devices
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org >
Link: https://lore.kernel.org/r/1591702511-18571-1-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 00:28:33 -07:00
Jack Pham
b33d2868e8
arm64: dts: qcom: sm8150: Add USB and PHY device nodes
...
Add device nodes for the USB3 controller, QMP SS PHY and
SNPS HS PHY.
Signed-off-by: Jack Pham <jackp@codeaurora.org >
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org >
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Tested-by: Vinod Koul <vinod.koul@linaro.org >
Link: https://lore.kernel.org/r/1586566362-21450-3-git-send-email-wcheng@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 00:19:50 -07:00
Amit Kucheria
d2fa630cea
arm64: dts: qcom: sm8150: Add thermal zones and throttling support
...
sm8150 has 27 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle their
frequencies on crossing passive temperature thresholds.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org >
Link: https://lore.kernel.org/r/1cdbebe6f7f69ccd8468a4138b56e8a200289d95.1591684754.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 00:11:08 -07:00
Amit Kucheria
cedddb263e
dt-bindings: thermal: qcom-tsens: Add compatible for sm8150, sm8250
...
Added tsens bindings for sm8150 and sm8250
Acked-by: Rob Herring <robh@kernel.org >
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org >
Link: https://lore.kernel.org/r/c3361043e66139812bd4cd85b917659d85e1564f.1591684754.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 00:11:04 -07:00
Georgi Djakov
366c37978e
arm64: dts: msm8916: Add interconnect provider DT nodes
...
Add nodes for the network-on-chip interconnect buses present on
MSM8916-based platforms.
Tested-by: Stephan Gerhold <stephan@gerhold.net >
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org >
Link: https://lore.kernel.org/r/20200617134515.25229-1-georgi.djakov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-21 00:10:48 -07:00
Rakesh Pillai
1e7594a38f
arm64: dts: qcom: sc7180: Add WCN3990 WLAN module device node
...
Add device node for the ath10k SNOC platform driver probe
and add resources required for WCN3990 on sc7180 soc.
Signed-off-by: Rakesh Pillai <pillair@codeaurora.org >
Link: https://lore.kernel.org/r/1592668635-10894-1-git-send-email-pillair@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:06 -07:00
Dmitry Baryshkov
e0d9accee2
arm64: dts: qcom: sm8250: add watchdog device
...
Add on-SoC watchdog device node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20200604004331.669936-7-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:04 -07:00
Stephan Gerhold
34da47b1ce
arm64: dts: qcom: apq8016-sbc: Replace spaces with tabs
...
apq8016-sbc.dtsi uses spaces on some lines instead of tabs.
Make this consistent by converting them to tabs.
Also remove some redundant comments from the DAI link definitions
- this is already visible from the comment block before the "sound"
node or the device node entries itself.
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Link: https://lore.kernel.org/r/20200605185916.318494-4-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:04 -07:00
Stephan Gerhold
e2ee9edc28
arm64: dts: qcom: msm8916: Pull down PDM GPIOs during sleep
...
The original qcom kernel changed the PDM GPIOs to be pull-down
during sleep at some point. Reportedly this was done because
there was some "leakage at PDM outputs during sleep":
https://source.codeaurora.org/quic/la/kernel/msm-3.10/commit/?id=0f87e08c1cd3e6484a6f7fb3e74e37340bdcdee0
I cannot say how effective this is, but everything seems to work
fine with this change so let's apply the same to mainline just
to be sure.
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Link: https://lore.kernel.org/r/20200605185916.318494-3-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:04 -07:00
Stephan Gerhold
1b6a1a162d
arm64: dts: qcom: msm8916: Replace invalid bias-pull-none property
...
msm8916-pins.dtsi specifies "bias-pull-none" for most of the audio
pin configurations. This was likely copied from the qcom kernel fork
where the same property was used for these audio pins.
However, "bias-pull-none" actually does not exist at all - not in
mainline and not in downstream. I can only guess that the original
intention was to configure "no pull", i.e. bias-disable.
Change it to that instead.
Fixes: 143bb9ad85 ("arm64: dts: qcom: add audio pinctrls")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Link: https://lore.kernel.org/r/20200605185916.318494-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:03 -07:00
Stephan Gerhold
c00b5c280d
arm64: dts: qcom: msm8916: Set #address-cells for lpass
...
As of commit 4ff028f6c1 ("ASoC: qcom: lpass-cpu: Make I2S SD lines
configurable"), lpass now supports children nodes to configure the
MI2S SD lines to use for one of the I2S ports. For example:
lpass@7708000 {
dai@3 {
reg = <MI2S_QUATERNARY>;
qcom,playback-sd-lines = <1>;
};
};
The "reg" property refers to the DAI number in this case,
so we need to set #address-cells and #size-cells appropriately
to avoid DTC warnings.
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org >
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Link: https://lore.kernel.org/r/20200605185916.318494-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:03 -07:00
Jeffrey Hugo
5f7f61e34d
arm64: dts: qcom: lenovo630: Add Modem firmware files
...
By specifying the modem firmware files, we can boot the modem subsystem
which also gives us wifi.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20200528185341.4891-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:03 -07:00
Jeffrey Hugo
5c29f9e6e7
arm64: dts: qcom: msm8998-clamshell: Fix label on l15 regulator
...
The label on the l15 regulator node does not follow the style of the
rest of the regulator nodes. Luckily, no one has used the label yet,
so lets fix it.
Fixes: 2c6d2d3a58 ("arm64: dts: qcom: Add Lenovo Miix 630")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20200528145135.44269-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:03 -07:00
Jeffrey Hugo
41bb1aad51
arm64: dts: qcom: msm8998-mtp: Fix label on l15 regulator
...
The label on the l15 regulator node does not follow the style of the
rest of the regulator nodes. Luckily, no one has used the label yet,
so lets fix it.
Fixes: 31c1f0e33d ("arm64: dts: qcom: msm8998: Add RPM and regulators for MTP")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20200528144814.44143-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:03 -07:00
Stephen Boyd
39cfcf6100
arm64: dts: qcom: sc7180: Move mss node to the right place
...
The modem node has an address of 4080000 and thus should come after tlmm
and before gpu. Move the node to the right place to maintainer proper
address sort order.
Reviewed-by: Sibi Sankar <sibis@codeaurora.org >
Reviewed-by: Evan Green <evgreen@chromium.org >
Cc: Evan Green <evgreen@chromium.org >
Cc: Sibi Sankar <sibis@codeaurora.org >
Fixes: e14a15eba8 ("arm64: dts: qcom: sc7180: Add Q6V5 MSS node")
Signed-off-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20200521010337.229177-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:47:03 -07:00
Jonathan Marek
6b9afd8f96
arm64: dts: qcom: sm8250: change ufs node name to ufshc
...
The ufs-qcom driver checks that the name matches the androidboot.bootdevice
parameter provided by the bootloader, which uses the name ufshc. Without
this change UFS fails to probe.
I think this is broken behavior from the ufs-qcom driver, but using the
name ufshc is consistent with dts for sdm845/sm8150/etc.
Signed-off-by: Jonathan Marek <jonathan@marek.ca >
Link: https://lore.kernel.org/r/20200523175232.13721-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-06-20 23:08:29 -07:00