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Author SHA1 Message Date
Krzysztof Kozlowski
60d2da2c91 arm64: dts: qcom: sm8450: drop incorrect cells from serial 
The serial/UART device node does not have children with unit addresses,
so address/size cells are not correct.

Fixes: f583741847 ("arm64: dts: qcom: sm8450: add uart20 node")
Fixes: 5188049c9b ("arm64: dts: qcom: Add base SM8450 DTSI")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230124084951.38195-3-krzysztof.kozlowski@linaro.org
 2023-02-08 15:57:19 -08:00
Krzysztof Kozlowski
6027331e6e arm64: dts: qcom: sm8350: drop incorrect cells from serial 
The serial/UART device node does not have children with unit addresses,
so address/size cells are not correct.

Fixes: cf03cd7e12 ("arm64: dts: qcom: sm8350: Set up WRAP0 QUPs")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230124084951.38195-2-krzysztof.kozlowski@linaro.org
 2023-02-08 15:57:19 -08:00
Krzysztof Kozlowski
f7aaaf3030 arm64: dts: qcom: use generic node name for Bluetooth 
Node names should be generic (as Devicetree spec mandates), so use
"bluetooth" for BT node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230124084951.38195-1-krzysztof.kozlowski@linaro.org
 2023-02-08 15:57:19 -08:00
Konrad Dybcio
cce9c1d0b0 arm64: dts: qcom: sm8450: Fix DSIn PHY compatible 
Use the correct compatible so that the driver can probe properly.

Fixes: a6dd1206e4 ("arm64: dts: qcom: sm8450: add display hardware devices")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230123200552.553181-1-konrad.dybcio@linaro.org
 2023-02-08 15:57:19 -08:00
Robert Marko
a1ab382704 arm64: dts: qcom: ipq8074: add QFPROM node 
IPQ8074 has efuses like other Qualcomm SoC-s that are required for
determining various HW quirks which will be required later for CPR etc,
so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230123101631.475712-2-robimarko@gmail.com
 2023-02-08 15:57:19 -08:00
Johan Hovold
cd649ac405 arm64: dts: qcom: sm8550: fix USB-DP PHY resets 
The USB-DP PHY resets have been switched.

Fixes: 7f7e5c1b03 ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230123101607.2413-1-johan+linaro@kernel.org
 2023-02-08 15:57:19 -08:00
Dmitry Baryshkov
6701b17395 arm64: dts: qcom: msm8996: add CBF device entry 
Add device tree node for the CBF clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120061417.2623751-8-dmitry.baryshkov@linaro.org
 2023-02-08 15:57:19 -08:00
Dmitry Baryshkov
8ae72166c2 arm64: dts: qcom: msm8996 switch from RPM_SMD_BB_CLK1 to RPM_SMD_XO_CLK_SRC 
The vendor kernel uses RPM_SMD_XO_CLK_SRC clock as an CXO clock rather
than using the RPM_SMD_BB_CLK1 directly. Follow this example and switch
msm8996.dtsi to use RPM_SMD_XO_CLK_SRC clock instead of RPM_SMB_BB_CLK1.

Fixes: 2b8c9c77c2 ("arm64: dts: qcom: msm8996: convert xo_board to RPM_SMD_BB_CLK1")
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120061417.2623751-7-dmitry.baryshkov@linaro.org
 2023-02-08 15:57:15 -08:00
Dmitry Baryshkov
bc72f13e44 arm64: dts: qcom: msm8996: enable UFS interconnects 
Specify interconnects to be used by the UFS host controller.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119144326.2492847-3-dmitry.baryshkov@linaro.org
 2023-02-08 14:24:05 -08:00
Bhupesh Sharma
7b54d92a9c arm64: dts: qcom: sm6115: Add watchdog node to dtsi 
Add watchdog node in Qualcomm sm6115 SoC dtsi.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119123200.1021735-1-bhupesh.sharma@linaro.org
 2023-02-08 14:21:12 -08:00
Krzysztof Kozlowski
a8ce63441a arm64: dts: qcom: sc7280-idp: drop incorrect properties 
The sound card does not expose DAIs and does not use custom qcom
properties, so drop '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh' and
'qcom,msm-mbhc-hphl-swh':

  sc7280-idp.dtb: sound: '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh', 'qcom,msm-mbhc-hphl-swh' do not match any of the regexes: '^dai-link@[0-9a-f]$', 'pinctrl-[0-9]+'

Reported-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119122205.73372-2-krzysztof.kozlowski@linaro.org
 2023-02-08 14:20:38 -08:00
Krzysztof Kozlowski
a1efba3362 arm64: dts: qcom: sc7280-herobrine-audio-wcd9385: drop incorrect properties 
The sound card does not expose DAIs and does not use custom qcom
properties, so drop '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh' and
'qcom,msm-mbhc-hphl-swh':

  sc7280-herobrine-crd.dtb: sound: '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh', 'qcom,msm-mbhc-hphl-swh' do not match any of the regexes: '^dai-link@[0-9a-f]$', 'pinctrl-[0-9]+'

Reported-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119122205.73372-1-krzysztof.kozlowski@linaro.org
 2023-02-08 14:20:38 -08:00
Konrad Dybcio
70d1e09ebf arm64: dts: qcom: sm6115: Use 64 bit addressing 
SM6115's SMMU uses 36bit VAs, which is a good indicator that we
should increase (dma-)ranges - and by extension #address- and
 #size-cells to prevent things from getting lost in translation
(both literally and figuratively). Do so.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119101644.10711-2-konrad.dybcio@linaro.org
 2023-02-08 14:18:48 -08:00
Konrad Dybcio
2f52e87499 arm64: dts: qcom: sm6115: Add mdss_ prefix to mdss nodes 
Add a mdss_ prefix to mdss nodes to keep them all near each other
when referencing them by label in device DTs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119101644.10711-1-konrad.dybcio@linaro.org
 2023-02-08 14:13:54 -08:00
Yang Xiwen
faf6943146 arm64: dts: qcom: msm8916-thwc: Add initial device trees 
This commit adds support for the ufi-001C and uf896 WiFi/LTE dongle made by
Tong Heng Wei Chuang based on MSM8916.
uf896 is another variant for the usb stick. The board design
differs by using different gpios for the keys and leds.

Note: The original firmware does not support 64-bit OS. It is necessary
to flash 64-bit TZ firmware to boot arm64.

Currently supported:
- All CPU cores
- Buttons
- LEDs
- Modem
- SDHC
- USB Device Mode
- UART

Co-developed-by: Jaime Breva <jbreva@nayarsystems.com>
Signed-off-by: Jaime Breva <jbreva@nayarsystems.com>
Co-developed-by: Nikita Travkin <nikita@trvn.ru>
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Signed-off-by: Yang Xiwen <forbidden405@foxmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-02-08 14:12:42 -08:00
Bhupesh Sharma
25aab0b852 arm64: dts: qcom: sm6115: Add geni debug uart node for qup0 
qup0 on sm6115 / sm4250 has 6 SEs, with SE4 as debug uart.
Add the debug uart node in sm6115 dtsi file.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208122718.338545-1-bhupesh.sharma@linaro.org
 2023-02-08 13:11:35 -08:00
Krzysztof Kozlowski
6de7f9c343 arm64: dts: qcom: sm8550: add GPR and LPASS pin controller 
Add the ADSP GPR (Generic Packet Router) and LPASS LPI (Low Power Audio
SubSystem Low Power Island) pin controller nodes used as part of audio
subsystem on SM8550.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Shortened stream mask, per Konrad's request]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230206150744.513967-1-krzysztof.kozlowski@linaro.org
 2023-02-06 12:49:04 -08:00
Rajendra Nayak
f816cda0ab arm64: dts: qcom: sc7280: Add a herobrine CRD Pro SKU 
Some of the qualcomm qcard based herobrine devices can come with
a Pro variant of the chipset on the qcard. Such Pro qcards have
the smps9 from pm8350c ganged up with smps7 and smps8, so add a
.dtsi for pro skus that deletes the smps9 node and include it from
the new dts for the CRD Pro

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221216112918.1243-2-quic_rjendra@quicinc.com
 2023-02-03 15:25:32 -08:00
Konrad Dybcio
e27f38e625 arm64: dts: qcom: sm8450-nagara: Correct firmware paths 
Nagara is definitely not SM8350, fix it!

Fixes: c53532f782 ("arm64: dts: qcom: pdx223: correct firmware paths")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230203142309.1106349-1-konrad.dybcio@linaro.org
 2023-02-03 12:37:32 -08:00
Dmitry Baryshkov
d7133d6d25 arm64: dts: qcom: sm8350: use qcom,sm8350-dsi-ctrl compatibles 
Add the per-SoC (qcom,sm8350-dsi-ctrl) compatible strings to DSI nodes
to follow the pending DSI bindings changes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118032024.1715857-1-dmitry.baryshkov@linaro.org
 2023-01-31 15:20:34 -06:00
Dmitry Baryshkov
19eee67386 arm64: dts: qcom: sc8280xp: add p1 register blocks to DP nodes 
Per DT bindings add p1 register blocks to all DP controllers on SC8280XP
platform.

Fixes: 6f299ae7f96d ("arm64: dts: qcom: sc8280xp: add p1 register blocks to DP nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118031718.1714861-4-dmitry.baryshkov@linaro.org
 2023-01-31 15:20:17 -06:00
Dmitry Baryshkov
3cfa9e245d arm64: dts: qcom: sc8280xp-crd: drop #sound-dai-cells from eDP node 
The eDP device doesn't provide sound DAI. Drop corresponding property
from the eDP node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118031718.1714861-3-dmitry.baryshkov@linaro.org
 2023-01-31 15:20:17 -06:00
Melody Olvera
d1f2cfe2f6 arm64: dts: qcom: Add base QDU1000/QRU1000 IDP DTs 
Add DTs for Qualcomm IDP platforms using the QDU1000 and QRU1000
SoCs.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112210722.6234-3-quic_molvera@quicinc.com
 2023-01-31 10:01:36 -06:00
Melody Olvera
6bd20c54b5 arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIs 
Add the base DTSI files for QDU1000 and QRU1000 SoCs, including base
descriptions of CPUs, GCC, RPMHCC, QUP, TLMM, and interrupt-controller
to boot to shell with console on these SoCs.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112210722.6234-2-quic_molvera@quicinc.com
 2023-01-31 10:01:36 -06:00
Bjorn Andersson
3ef1569b2b Merge branch '20230112204446.30236-2-quic_molvera@quicinc.com' into arm64-for-6.3 
Merge DT binding in order to get GCC clock defines.
 2023-01-31 10:01:36 -06:00
Bjorn Andersson
ac4fdb86a0 Merge branch 'icc-qdu1000-immutable' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD 
Merge DT binding to gain interconnect defines.
 2023-01-31 10:01:18 -06:00
Konrad Dybcio
b904227a4b arm64: dts: qcom: sm8350: Hook up DSI1 to MDP 
Somehow DSI1 was not hooked up to MDP resulting in it not working.
Fix it.

Fixes: d4a4410583 ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-8-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Konrad Dybcio
2a07efb8c0 arm64: dts: qcom: sm8350: Add mdss_ prefix to DSIn out labels 
Add the mdss_ prefix to DSIn labels, so that the hardware blocks can
be organized near each other while retaining the alphabetical order
in device DTs when referencing by label.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-7-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Konrad Dybcio
e3e654ced3 arm64: dts: qcom: sm8350: Fix DSI PLL size 
As downstream indicates, DSI PLL is actually 0x27c and not 0x260-
wide. Fix that to reserve the correct registers.

Fixes: d4a4410583 ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-6-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Konrad Dybcio
45cd807de1 arm64: dts: qcom: sm8350: Fix DSI PHY compatibles 
The compatibles were wrong, resulting in the driver not probing. Fix
that.

Fixes: d4a4410583 ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-5-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Konrad Dybcio
0af6a4012b arm64: dts: qcom: sm8350: Feed DSI1 PHY clocks to DISPCC 
This was omitted but is necessary for DSI1 to function. Fix it.

Fixes: d4a4410583 ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-4-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Konrad Dybcio
1eed7995d9 arm64: dts: qcom: sm8350: Fix DSI1 interrupt 
The interrupt was wrong, likely copypasted from DSI0. Fix it.

Fixes: d4a4410583 ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-3-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Konrad Dybcio
6636818ecf arm64: dts: qcom: sm8350: Add missing #address/size-cells to DSIn 
Panels/DRM bridges definitely don't need 64bits of address space and
are usually not 32-bit wide. Set address-cells to 1 and size-cells to
0.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-2-konrad.dybcio@linaro.org
 2023-01-26 14:52:29 -06:00
Sibi Sankar
a63a420d05 arm64: dts: qcom: sc7280: Add a carveout for modem metadata 
Add a new carveout for modem metadata on SC7280 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-12-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
cb0eaae8e8 arm64: dts: qcom: sc7180: Add a carveout for modem metadata 
Add a new carveout for modem metadata on SC7180 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-11-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
44c89ef3d1 arm64: dts: qcom: sdm845: Add a carveout for modem metadata 
Add a new carveout for modem metadata on SDM845 SoCs.

Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-10-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
264f6a8dff arm64: dts: qcom: msm8998: Add a carveout for modem metadata 
Add a new carveout for modem metadata on MSM8998 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-9-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
3c118d1b0d arm64: dts: qcom: msm8996: Add a carveout for modem metadata 
Add a new carveout for modem metadata on MSM8996 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-8-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Robert Marko
0e8b90c025 arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names 
Current PCIe QMP PHY output name were changed in ("arm64: dts: qcom: Fix
IPQ8074 PCIe PHY nodes") however it did not account for the fact that GCC
driver is relying on the old names to match them as they are being used as
the parent for the gcc_pcie0_pipe_clk and gcc_pcie1_pipe_clk.

This broke parenting as GCC could not find the parent clock, so fix it by
changing to the names that driver is expecting.

Fixes: 942bcd33ed ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-9-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
3e83a9c41a arm64: dts: qcom: ipq8074: fix Gen3 PCIe node 
IPQ8074 comes in 2 silicon versions:
* v1 with 2x Gen2 PCIe ports and QMP PHY-s
* v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s

v2 is the final and production version that is actually supported by the
kernel, however it looks like PCIe related nodes were added for the v1 SoC.

Finish the PCIe fixup by using the correct compatible, adding missing ATU
register space, declaring max-link-speed, use correct ranges, add missing
clocks and resets.

Fixes: 33057e1672 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-8-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
b605903148 arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed 
Add the generic 'max-link-speed' property to describe the Gen2 PCIe link
generation limit.
This allows the generic DWC code to configure the link speed correctly.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-4-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
2055cb7dcc arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges 
Current ranges property set in Gen2 PCIe node is incorrect, replace it
with the downstream 5.4 QCA kernel value.

Fixes: 33057e1672 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-3-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
7ba33591b4 arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY 
IPQ8074 comes in 2 silicon versions:
* v1 with 2x Gen2 PCIe ports and QMP PHY-s
* v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s

v2 is the final and production version that is actually supported by the
kernel, however it looks like PCIe related nodes were added for the v1 SoC.

Now that we have Gen3 QMP PHY support, we can start fixing the PCIe support
by fixing the Gen3 QMP PHY node first.

Change the compatible to the Gen3 QMP PHY, correct the register space start
and size, add the missing misc PCS register space.

Fixes: 33057e1672 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-2-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
100d9c94cc arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY 
Serdes register space sizes are incorrect, update them to match the
actual sizes from downstream QCA 5.4 kernel.

Fixes: 942bcd33ed ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-1-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Krzysztof Kozlowski
3e7a2e8bd9 arm64: dts: qcom: sdm845-db845c: drop label from I2C controllers 
Geni I2C Controller node does not allow a "label" property and Linux
driver does not parse it:

  sdm845-db845c.dtb: i2c@a8c000: Unevaluated properties are not allowed ('label' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113145231.79280-1-krzysztof.kozlowski@linaro.org
 2023-01-18 21:08:02 -06:00
Dmitry Baryshkov
ac0d84d455 arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input 
In some cases the driver might need using GPLL0 to drive CPU clocks.
Bring it in through the sys_apcs_aux clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113120544.59320-15-dmitry.baryshkov@linaro.org
 2023-01-18 21:07:04 -06:00
Melody Olvera
8c8acefcee dt-bindings: clock: Add QDU1000 and QRU1000 GCC clocks 
Add device tree bindings for global clock controller on QDU1000 and
QRU1000 SoCs.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112204446.30236-2-quic_molvera@quicinc.com
 2023-01-18 20:46:43 -06:00
Manivannan Sadhasivam
0da2eff44e arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller 
The devicetree should specify both MSI implementations and the OS/driver
should choose the one based on the platform requirements. Currently, Linux
DWC driver will choose GIC-ITS over the internal MSI controller.

Fixes: a11bbf6adef4 ("arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1")
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111123004.21048-2-manivannan.sadhasivam@linaro.org
 2023-01-18 20:36:15 -06:00
Abel Vesa
772e6bc4a0 arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes 
Enable USB HC and PHYs nodes on SM8550 MTP board.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119004533.1869870-3-abel.vesa@linaro.org
 2023-01-18 20:18:53 -06:00
Abel Vesa
7f7e5c1b03 arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes 
Add USB host controller and PHY nodes.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119004533.1869870-2-abel.vesa@linaro.org
 2023-01-18 20:18:53 -06:00