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Author SHA1 Message Date
Dmitry Baryshkov
5aa0d1becd arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode 
USB1 QMP PHY is not just a USB3 PHY, but USB3+DP PHY. Change device tree
nodes accordingly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210331151614.3810197-7-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 13:00:04 -05:00
Bryan O'Donoghue
fa245b3f06 arm64: dts: qcom: sm8250: Add venus DT node 
Add DT entries for the sm8250 venus encoder/decoder.

Co-developed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Co-developed-by: Dikshita Agarwal <dikshita@qti.qualcomm.com>
Signed-off-by: Dikshita Agarwal <dikshita@qti.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210401174256.1810044-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 12:59:29 -05:00
jonathan@marek.ca
5b9ec225d4 arm64: dts: qcom: sm8250: Add videocc DT node 
This commit adds the videocc DTS node for sm8250.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210401174256.1810044-2-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 12:59:22 -05:00
Vinod Koul
da6b24828d arm64: dts: qcom: sm8350: Add interconnects 
Add interconnect nodes and add them for modem and cdsp nodes

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210401113252.3078466-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 12:58:09 -05:00
Robert Foss
24e3eb2e32 arm64: dts: qcom: sm8350: Add support for PRNG EE 
RNG (Random Number Generator) in SM8350 features PRNG EE (Execution
Environment), hence add devicetree support for it.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://lore.kernel.org/r/20210401101536.1014560-1-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 12:57:15 -05:00
satya priya
60eb631f5d arm64: dts: qcom: sc7280: Add RPMh regulators for sc7280-idp 
Add regulator devices for SC7280 as RPMh regulators. This ensures
that consumers are able to modify the physical state of PMIC
regulators.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: satya priya <skakit@codeaurora.org>
Link: https://lore.kernel.org/r/1617192339-3760-4-git-send-email-skakit@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 12:56:51 -05:00
Dmitry Baryshkov
644e4d972d arm64: dts: qcom: sdm845: add required clocks on the gcc 
Specify input clocks to the SDM845's Global Clock Controller as required
by the bindings.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210402233944.273275-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-04-04 12:38:21 -05:00
Robert Foss
20f9d94e68 arm64: dts: qcom: sm8350: Add thermal zones and throttling support 
sm8350 has 29 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle their
frequencies on crossing passive temperature thresholds.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210324124308.1265626-2-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-29 22:46:55 -05:00
Caleb Connolly
81bee6953b arm64: dts: qcom: sm8150: add i2c nodes 
Tested on the OnePlus 7 Pro (including DMA).

Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20210321174522.123036-3-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-29 22:44:51 -05:00
Caleb Connolly
9cf3ebd16e arm64: dts: qcom: sm8150: add other QUP nodes and iommus 
Add the first and third qupv3 nodes used to hook
up peripherals on some devices, as well as the iommus properties for all
of them.

Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210321174522.123036-2-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-29 22:44:50 -05:00
Jonathan Marek
888771a9d0 arm64: dts: qcom: sm8250: fix display nodes 
Apply these fixes to the newly added sm8250 display ndoes
 - Remove "notused" interconnect (which apparently was blindly copied from
   my old patches)
 - Use dispcc node example from dt-bindings, removing clocks which aren't
   documented or used by the driver and fixing the region size.

Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
[DB: compatibility changes split into separate patch]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210329120051.3401567-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-29 22:16:50 -05:00
Dmitry Baryshkov
e9269650db arm64: dts: qcom: qrb5165-rb5: switch into using GPIO for SPI0 CS 
On the GENI SPI controller is is not very efficient if the chip select
line is controlled by the QUP itself (see 37dd4b7779 ("arm64: dts:
qcom: sc7180: Provide pinconf for SPI to use GPIO for CS") for the
details). Configure SPI0 CS pin as a GPIO.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210210133458.1201066-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-18 09:35:42 -05:00
Dmitry Baryshkov
eb97ccbba0 arm64: dts: qcom: sm8250: add pinctrl for SPI using GPIO as a CS 
GENI SPI controller shows several issues if it manages the CS on its own
(see 37dd4b7779 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to
use GPIO for CS")) for the details. Provide pinctrl entries for SPI
controllers using the same CS pin but in GPIO mode.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210210133458.1201066-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-18 09:35:35 -05:00
Dmitry Baryshkov
c88f9ecc0e arm64: dts: qcom: sm8250: further split of spi pinctrl config 
Split "default" device tree nodes into common "data-clk" nodes and "cs"
nodes which might differ from board to board depending on how the slave
chips are wired.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210210133458.1201066-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-18 09:35:27 -05:00
Dmitry Baryshkov
d3769729db arm64: dts: qcom: sm8250: split spi pinctrl config 
As discussed on linux-arm-msm list, start splitting sm8250 pinctrl
settings into generic and board-specific parts. The first part to
receive such treatment is the spi, so split spi pinconf to the board
device tree.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210210133458.1201066-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-18 09:35:22 -05:00
Robert Foss
68119b3abd arm64: dts: qcom: sdm845-db845c: Enable ov8856 sensor and connect to ISP 
Enable camss & ov8856 DT nodes.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Link: https://lore.kernel.org/r/20210316171931.812748-23-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-16 12:46:35 -05:00
Robert Foss
2c3d0b325e arm64: dts: qcom: sdm845-db845c: Configure regulators for camss node 
Add regulator to camss device tree node.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Link: https://lore.kernel.org/r/20210316171931.812748-22-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-16 12:46:32 -05:00
Robert Foss
d48a6698a6 arm64: dts: qcom: sdm845: Add CAMSS ISP node 
Add the camss dt node for sdm845.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Link: https://lore.kernel.org/r/20210316171931.812748-21-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-16 12:46:27 -05:00
Bjorn Andersson
40a5aa1f54 arm64: dts: qcom: pm8150: Enable RTC 
The PM8150 comes with everything the RTC needs, so let's just leave it
enabled instead of having to explicitly enable it for all boards.
In effect this patch enables the RTC on the SM8150 MTP and the SM8250
HDK.

Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210106001004.4081508-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 16:47:22 -06:00
Vinod Koul
f67cc6a91d arm64: dts: qcom: sm8350-mtp: Add PMICs 
SM8350-MTP features PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B. PMICs Add the dtsi for these PMICs to MTP.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-9-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:39 -06:00
Vinod Koul
93e7195946 arm64: dts: qcom: pmr735B: Add base dts file 
Add base DTS file for PMR735B along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-8-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:34 -06:00
Vinod Koul
59319dee21 arm64: dts: qcom: pmr735a: Add base dts file 
Add base DTS file for PMR735A along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-7-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:32 -06:00
Vinod Koul
58befd8f60 arm64: dts: qcom: pm8350c: Add base dts file 
Add base DTS file for PM8350C along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-6-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:29 -06:00
Vinod Koul
950775d9cb arm64: dts: qcom: pm8350b: Add base dts file 
Add base DTS file for PM8350B along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-5-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:26 -06:00
Vinod Koul
094da73ff0 arm64: dts: qcom: pm8350: Add base dts file 
Add base DTS file for PM8350 along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-4-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:21 -06:00
Vinod Koul
712d68d128 arm64: dts: qcom: pmk8350: Add base dts file 
Add base DTS file for PMK8350 along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:24:14 -06:00
Vinod Koul
389cd7acbb arm64: dts: qcom: sm8350: Add spmi node 
Add SPMI node found in SM8350 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-12 11:23:58 -06:00
Srinivas Kandagatla
c561740e7c arm64: dts: qcom: db845c: fix correct powerdown pin for WSA881x 
WSA881x powerdown pin is connected to GPIO1 not gpio2, so correct this.
This was working so far due to a shift bug in gpio driver, however
once that is fixed this will stop working, so fix this!

Fixes: 89a32a4e76 ("arm64: dts: qcom: db845c: add analog audio support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210309102025.28405-1-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:45:07 -06:00
Bjorn Andersson
c07ea1b495 dt-bindings: arm: qcom: Add SM8350 HDK 
Document the SM8350 Hardware Development Kit (HDK).

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reported-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210310035710.2816699-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:44 -06:00
Stephen Boyd
befc5ac94e arm64: dts: qcom: sc7180: Drop duplicate dp_hot_plug_det node in trogdor 
This moved from being trogdor specific to being part of the general
sc7180.dtsi SoC file in commit 681a607ad2 ("arm64: dts: qcom:
sc7180: Add DisplayPort HPD pin dt node"). Then we dropped the pinconf
from the general sc7180.dtsi file in commit 8d079bf204 ("arm64: dts:
qcom: sc7180: Drop pinconf on dp_hot_plug_det") and added it back to
the trogdor dts file in commit f772081f48 ("arm64: dts: qcom:
sc7180: Add "dp_hot_plug_det" pinconf for trogdor").

As part of this we managed to forget to drop the old copy in the
trogdor dts. Let's do it now.

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
[dianders: updated desc]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210311131008.1.I85fc8146c0ee47e261faa0c54dd621467b81952d@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:44 -06:00
Shawn Guo
790158579c arm64: dts: qcom: sm8350: fix number of pins in 'gpio-ranges' 
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: b7e8f433a6 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-5-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Shawn Guo
e526cb03e2 arm64: dts: qcom: sm8250: fix number of pins in 'gpio-ranges' 
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: 16951b490b ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node")
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-4-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Shawn Guo
de3abdf3d1 arm64: dts: qcom: sm8150: fix number of pins in 'gpio-ranges' 
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: e13c6d144f ("arm64: dts: qcom: sm8150: Add base dts file")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-3-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Shawn Guo
02058fc383 arm64: dts: qcom: sdm845: fix number of pins in 'gpio-ranges' 
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: bc2c806293 ("arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node")
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-2-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Rajendra Nayak
1608784b61 arm64: dts: qcom: sc7280: Add rpmh power-domain node 
Add the DT node for the rpmhpd power controller on SC7280 SoCs.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-15-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Maulik Shah
0ef5463c7a arm64: dts: qcom: sc7280: Add cpuidle states 
Add cpuidle states for little and big cpus.
The latency values are preliminary placeholders and will be updated
once testing provides the real numbers.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-14-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
satya priya
14abf8dfe3 arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280 
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: satya priya <skakit@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-13-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Sai Prakash Ranjan
0e51f883da arm64: dts: qcom: sc7280: Add APSS watchdog node 
Add APSS (Application Processor Subsystem) watchdog
DT node for SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-12-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Maulik Shah
e9d7397467 arm64: dts: qcom: sc7280: Add reserved memory for fw 
Add fw reserved memory area for CPUCP (CPUSS control
processor) and AOP (Always ON processor)

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-10-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Sai Prakash Ranjan
c73ed10440 arm64: dts: qcom: sc7280: Add device node for APPS SMMU 
Adding device node for APPS SMMU available on SC7280 chipset.
This is shared among the multiple client devices such as
display, video, usb, mmc and others.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-9-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Rajendra Nayak
ab7772de86 arm64: dts: qcom: SC7280: Add rpmhcc clock controller node 
Add rpmhcc clock controller node for SC7280. Also add references to
rpmhcc clocks in gcc.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-7-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:43 -06:00
Maulik Shah
3450bb5b95 arm64: dts: qcom: sc7280: Add RSC and PDC devices 
Add PDC interrupt controller along with apps RSC device.
Also add reserved memory for command_db.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-6-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Rajendra Nayak
7a1f4e7f74 arm64: dts: qcom: sc7280: Add basic dts/dtsi files for sc7280 soc 
Add initial device tree support for the sc7280 SoC and the IDP
boards based on this SoC

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Rajendra Nayak
36dc1681c9 dt-bindings: arm: qcom: Document sc7280 SoC and board 
Document the sc7280 SoC and the IDP board bindings

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1615461961-17716-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Bjorn Andersson
9208c19f21 arm64: dts: qcom: Introduce SM8350 HDK 
Add initial DTS for the Snapdragon 888 Mobile Hardware Development Kit,
aka SM8350 HDK. This initial version describes debug UART, UFS storage,
the three USB connectors and remoteprocs.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210308182113.1284966-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Vinod Koul
9ad3c08f6f dt-bindings: arm: qcom: Document sony boards for apq8094 
Document the various sony boards for apq8094. These are used in various
sony dts files but not documented

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-6-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Vinod Koul
c0dffc3fce arm64: dts: qcom: msm8994: don't use empty memory node 
We expect bootloader to full memory details but passing empty values
gives warning, so add a default value

arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dt.yaml: /: memory:
	False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-5-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Vinod Koul
ddfb3fc482 dt-bindings: arm: qcom: Document ipq6018-cp01 board 
Document the ipq6018-cp01 board. It was missing leading to warning:

arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: /: compatible: 'oneOf' conditional failed, one must be fixed:
        ['qcom,ipq6018-cp01', 'qcom,ipq6018'] is too short
        ['qcom,ipq6018-cp01', 'qcom,ipq6018'] is too long
        Additional items are not allowed ('qcom,ipq6018' was unexpected)

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-4-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Vinod Koul
74f417ca59 arm64: dts: qcom: msm8916: don't use empty memory node 
We expect bootloader to full memory details but passing empty values
gives warning, so add a default value

arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: memory:
	False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00
Vinod Koul
acf050ab5d arm64: dts: qcom: apq8016-sbc: drop qcom,sbc 
apq8016-sbc is one of the compaitibles for this board, but is not
documented, so drop it. This fixes these two warns:

arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible: ['qcom,apq8016-sbc', 'qcom,apq8016', 'qcom,sbc']
is not valid under any of the given schemas (Possible causes of the failure):

arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible: ['qcom,apq8016-sbc', 'qcom,apq8016', 'qcom,sbc'] is too long
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible:0: 'qcom,apq8016-sbc'
is not one of ['qcom,apq8064-cm-qs600', 'qcom,apq8064-ifc6410']
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible:0: 'qcom,apq8016-sbc'
is not one of ['qcom,apq8074-dragonboard']

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2021-03-11 20:22:42 -06:00