Ville Syrjälä
4c0eb35fc1
drm/i915: Improve PPS debugs
...
Always include both the encoder and PPS instance information
in the debug prints so that we know what piece of hardware
we're actually dealing with.
v2: Make sure pps is selected before debug prints/etc. in
intel_pps_vdd_on_unlocked() on vlv/chv
There is no pps on pipe C on chv
v3: Allow PPS=INVALID_PIPE for vlv/chv
Cc: Animesh Manna <animesh.manna@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221127155239.26973-1-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com >
2022-12-09 19:02:50 +02:00
Ville Syrjälä
ed5509d1d4
drm/i915: Fix whitespace
...
Stray spaces have snuck in where everything else uses tabs.
Cc: Animesh Manna <animesh.manna@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-9-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com >
2022-12-09 19:02:50 +02:00
Ville Syrjälä
1e47e035bb
drm/i915: Print the PPS registers using consistent format
...
Use the consistent format when dumping out the PPS control/status
registers. Helps with pattern matching.
Cc: Animesh Manna <animesh.manna@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-8-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com >
2022-12-09 19:02:50 +02:00
Ville Syrjälä
ba21bb2481
drm/i915: Reject unusable power sequencers
...
On ICP-ADP the pins used by the second PPS can be alternatively
muxed to some other function. In that case the second power
sequencer is unusable.
Unfortunately (on my ADL Thinkpad T14 gen3 at least) the
BIOS still likes to enable the VDD on the second PPS (due
to the VBT declaring the second bogus eDP panel) even when
not correctly muxed, so we need to deal with it somehow.
For now let's just initialize the PPS as normal, and then
use the normal eDP probe failure VDD off path to turn it off
(and release the wakeref the PPS init grabbed). The
alternative of just declaring that the platform has a single
PPS doesn't really work since it would cause the second eDP
probe to also try to use the first PPS and thus clobber the
state for the first (real) eDP panel.
Cc: Animesh Manna <animesh.manna@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-7-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com >
2022-12-09 19:02:50 +02:00
Ville Syrjälä
d83804f22d
drm/i915: Extend dual PPS handlind for ICP+
...
On the PCH side the second PPS was introduced in ICP. Let's
make sure we examine both power sequencer on ICP+ as well.
Note that DG1/2 south block only has the single PPS, so need
to exclude the fake DG1/2 PCHs.
Cc: Animesh Manna <animesh.manna@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-6-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com >
2022-12-09 19:02:49 +02:00
Ville Syrjälä
bf38bba3e7
drm/i915: Try to use the correct power sequencer intiially on bxt/glk
...
Currently on bxt/glk we just grab the power sequencer index from
the VBT data even though it may not have been parsed yet. That
could lead us to using the incorrect power sequencer during the
initial panel probe.
To avoid that let's try to read out the current state of the
power sequencer from the hardware. Unfortunately the power
sequencer no longer has anything in its registers to associate
it with the port, so the best we can do is just iterate through
the power sequencers and pick the first one. This should be
sufficient for single panel cases.
For the dual panel cases we probably need to go back to
parsing the VBT before the panel probe (and hope that
panel_type=0xff is never a thing in those cases). To that
end the code always prefers the VBT panel sequencer, if
available.
v2: Restructure a bit for upcoming icp+ dual PPS support
Cc: Animesh Manna <animesh.manna@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-5-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com >
2022-12-09 19:02:49 +02:00
Ville Syrjälä
209074fd5a
drm/i915: Generalize the PPS vlv_pipe_check() stuff
...
Restate the vlv_pipe_check() stuff in terms of PPS index
(rather than pipe, which it is on VLV/CHV) so that we can
reuse this same mechanim on other platforms as well.
Cc: Animesh Manna <animesh.manna@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-4-ville.syrjala@linux.intel.com
2022-12-09 19:02:49 +02:00
Ville Syrjälä
3f9ffce576
drm/i915: Do panel VBT init early if the VBT declares an explicit panel type
...
Lots of ADL machines out there with bogus VBTs that declare
two eDP child devices. In order for those to work we need to
figure out which power sequencer to use before we try the EDID
read. So let's do the panel VBT init early if we can, falling
back to the post-EDID init otherwise.
The post-EDID init panel_type=0xff approach of assuming the
power sequencer should already be enabled doesn't really work
with multiple eDP panels, and currently we just end up using
the same power sequencer for both eDP ports, which at least
confuses the wakeref tracking, and potentially also causes us
to toggle the VDD for the panel when we should not.
Cc: Animesh Manna <animesh.manna@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-3-ville.syrjala@linux.intel.com
2022-12-09 19:02:49 +02:00
Ville Syrjälä
f70f8153e3
drm/i915: Introduce intel_panel_init_alloc()
...
Introduce a place where we can initialize connector->panel
after it's been allocated. We already have a intel_panel_init()
so had to get creative with the name and came up with
intel_panel_init_alloc().
Cc: Animesh Manna <animesh.manna@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125173156.31689-2-ville.syrjala@linux.intel.com
2022-12-09 19:02:49 +02:00
Jani Nikula
af93397889
drm/i915/display: no need for gt/gen8_ppgtt.h
...
Remove an unnecessary include.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221208133638.478024-1-jani.nikula@intel.com
2022-12-09 10:53:06 +02:00
Khaled Almahallawy
be4a847652
drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
...
Bspecs has updated recently to remove the restriction to disable
DDI/Transcoder before setting PHY test pattern. This update is to
address PHY compliance test failures observed on a port with LTTPR.
The issue is that when Transc. is disabled, the main link signals fed
to LTTPR will be dropped invalidating link training, which will affect
the quality of the phy test pattern when the transcoder is enabled again.
v2: Update commit message (Clint)
v3: Add missing Signed-off in v2
v4: Update Bspec and commit message for pre-gen12 (Jani)
Bspec: 50482, 7555
Fixes: 8cdf727119 ("drm/i915/dp: Program vswing, pre-emphasis, test-pattern")
Cc: Imre Deak <imre.deak@intel.com >
Cc: Clint Taylor <clinton.a.taylor@intel.com >
CC: Jani Nikula <jani.nikula@intel.com >
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com >
Reviewed-by: Clint Taylor <clinton.a.taylor@intel.com >
Signed-off-by: Khaled Almahallawy <khaled.almahallawy@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221123220926.170034-1-khaled.almahallawy@intel.com
2022-12-09 10:32:58 +02:00
Ville Syrjälä
2ac5438ca9
drm/i915/vrr: Be more careful with the bits in TRANS_VRR_CTL
...
On mtl (at least) clearing the guardband bits in the same write
as the enable bit gets cleared seems to cause an immediate FIFO
underrun. Thus is seems that we need to first clear just the
enable bit, then wait for the VRR live status to indicate the
transcoder has exited VRR mode (this step is documented in Bspec
as well), and finally we can clear out the rest of the TRANS_VRR_CTL
for good measure.
I did this without any RMWs in case we want to toggle VRR on/off
via DSB in the future, and as we know DSB can't read registers.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221202134412.21943-5-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
2022-12-08 21:34:25 +02:00
Ville Syrjälä
0504d0acc2
drm/i915/vrr: Reorder transcoder vs. vrr enable/disable
...
On mtl it looks like disabling VRR after the transcoder has
been disabled can cause the pipe/transcoder to get stuck
when re-enabled in non-vrr mode. Reversing the order seems to
help.
Bspec is extremely confused about the VRR enable/disable sequence
anyway, and this now more closely matches the non-modeset VRR
sequence, whereas the full modeset sequence still claims that
the original order is fine. But since we eventually want to toggle
VRR without a full modeset anyway this seems like the better order
to follow.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221202134412.21943-4-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
2022-12-08 21:33:52 +02:00
Ville Syrjälä
944bda740f
drm/i915/vrr: Fix guardband/vblank exit length calculation for adl+
...
We are miscalculating both the guardband value, and the resulting
vblank exit length on adl+. This means that our start of vblank
(double buffered register latch point) is incorrect, and we also
think that it's not where it actually is (hence vblank evasion/etc.
may not work properly). Fix up the calculations to match the real
hardware behaviour (as reverse engineered by intel_display_poller).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221202134412.21943-3-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
2022-12-08 21:33:02 +02:00
Ville Syrjälä
98f974aa3c
drm/i915/vrr: Make registers latch in a consitent place on icl/tgl
...
Account for the framestart delay when calculating the "pipeline full"
value for icl/tgl vrr. This puts the start of vblank (ie. where the
double bufferd registers get latched) to a consistent place regardless
of what framestart delay value is used. framestart delay does not
change where start of vblank occurs in non-vrr mode and I can't see
any reason why we'd want different behaviour in vrr mode.
Currently framestart delay is always set to 1, and the hardcoded 4
scanlines in the code means we're currently delaying the start of
vblank by three extra lines. And with framestart delay set to 4 we'd
have no extra delay.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221202134412.21943-2-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
2022-12-08 21:32:09 +02:00
Ville Syrjälä
a467a24355
drm/i915: Fix VLV/CHV HDMI/DP audio enable
...
Despite what I claimed in commit c3c5dc1d92
("drm/i915/audio: Do the vblank waits") the vblank
interrupts are in fact not enabled yet when we do the
audio enable sequence on VLV/CHV (all other platforms are
fine).
Reorder the enable sequence on VLV/CHV to match that of the
other platforms so that the audio enable happens after the
pipe has been enabled.
Fixes: c3c5dc1d92 ("drm/i915/audio: Do the vblank waits")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221207225219.29060-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-12-08 19:57:23 +02:00
Jani Nikula
42bbdb8196
drm/i915/tc: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/8c29f4f76c2163da309ead0bf48652024f134f11.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:57 +02:00
Jani Nikula
5544d5e49b
drm/i915/snps: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/4992661d93f8d5744e19408dc60ae49a5f2d597a.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:54 +02:00
Jani Nikula
00136429f7
drm/i915/wm: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/588815fc60752b6470ee4067246698d478309fa1.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:51 +02:00
Jani Nikula
01f84f7421
drm/i915/gmbus: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/05690286d1521ec9c82d680122cca9a90a75b8dd.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:47 +02:00
Jani Nikula
ec2593e307
drm/i915/dp-aux: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/262a0cf647b37e27a1c7776d3816e1b4ef959a91.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:44 +02:00
Jani Nikula
2c035d759f
drm/i915/dmc: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/bc144ab3565b10e71244cd09f72ce7df86f4b5c6.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:41 +02:00
Jani Nikula
a0c5149088
drm/i915/power: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/21ea52a7c4fd400c256316143e3a2c9106c554d9.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:37 +02:00
Jani Nikula
f0798d8f72
drm/i915/crt: switch to intel_de_* register accessors in display code
...
Avoid direct uncore use in display code.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/39c198439be580052d1f78a44c96df7ba8ffd56d.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:34 +02:00
Jani Nikula
330bdd964d
drm/i915/crt: drop a bunch of unnecessary register variables
...
There's no need to save the register offsets. Drop the variables.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/3493286ecd1ae166e1e15235d31115f766f7c878.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:30 +02:00
Jani Nikula
4fa9fc424a
drm/i915/de: return the old register value from intel_de_rmw()
...
A similar thing was added in intel_uncore_rmw(). Make it available for
display too.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/b82cb29e8ece63e68499307f9e3e83139e590d23.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:27 +02:00
Maarten Lankhorst
93b3c44d6f
drm/i915/de: Add more macros to remove all direct calls to uncore
...
Add more de helpers to be able to avoid direct calls to uncore.
v3 by Jani:
- drop intel_de_write_samevalue/intel_de_rewrite_fw altogether
v2 by Jani:
- drop pcode stuff for now
- rename intel_de_write_samevalue -> intel_de_rewrite_fw
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/0d051554dfeeb4d8aa3bc9136ed111fa35f647d8.1670433372.git.jani.nikula@intel.com
2022-12-08 14:57:15 +02:00
Jani Nikula
40c3012205
drm/i915/backlight: convert DRM_DEBUG_KMS() to drm_dbg_kms()
...
Fix the final straggler.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/4769f8377be11536bd19840a2e59ef9f8c0a558c.1670405587.git.jani.nikula@intel.com
2022-12-07 19:24:15 +02:00
Jani Nikula
02c77424bc
drm/i915/backlight: drop drm_device local variables in favor of i915
...
Prefer only having struct drm_i915_private *i915 around. Drop the
drm_device *dev locals.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/6a791b06ab84bb8fb719cd46934eb09644e3edc7.1670405587.git.jani.nikula@intel.com
2022-12-07 19:24:15 +02:00
Jani Nikula
7177935c7d
drm/i915/backlight: mass rename dev_priv to i915
...
With the implicit dev_priv usage gone, we can rename dev_priv to i915
throughout. Do some drive-by whitespace cleanups while at it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/fc8b260bd8fa338edb312637f18ca7e6550d820d.1670405587.git.jani.nikula@intel.com
2022-12-07 19:24:15 +02:00
Jani Nikula
bf3753d1bb
drm/i915/backlight: drop DISPLAY_MMIO_BASE() use from backlight registers
...
None of the remaining backlight registers that use DISPLAY_MMIO_BASE()
are used on VLV/CHV, which are the only platforms that have non-zero
base. Just drop the DISPLAY_MMIO_BASE() use, reducing the implicit
dev_priv references.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/75ae3f2945912f908df2444d4f0ab97a23b89897.1670405587.git.jani.nikula@intel.com
2022-12-07 19:24:14 +02:00
Jani Nikula
9e9caa4beb
drm/i915/backlight: use VLV_DISPLAY_BASE for VLV/CHV backlight registers
...
Since the VLV/CHV backlight registers are only used on VLV/CHV, there's
no need to dynamically look up DISPLAY_MMIO_BASE(). We know it's
VLV_DISPLAY_BASE. Use it statically, reducing the implicit dev_priv
references.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/eb252083a56ec64b4fdb58d4d30abcf305a3a9c2.1670405587.git.jani.nikula@intel.com
2022-12-07 19:24:14 +02:00
Miaoqian Lin
955f4d7176
drm/i915: Fix documentation for intel_uncore_forcewake_put__locked
...
intel_uncore_forcewake_put__locked() is used to release a reference.
Fixes: a6111f7b66 ("drm/i915: Reduce locking in execlist command submission")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221207112909.2655251-1-linmq006@gmail.com
2022-12-07 12:15:40 -05:00
Jani Nikula
8ca57e4fc9
drm/i915/fbc: drop uncore locking around i8xx/i965 fbc nuke
...
The locking should not be needed after commits de5bd083d2
("drm/i915/fbc: Skip nuke when flip is pending") and 7cfd1a18c5
("drm/i915: Remove remaining locks from i9xx plane udpates").
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221205122918.3092092-1-jani.nikula@intel.com
2022-12-07 18:46:18 +02:00
Taylor, Clinton A
7d1675dcb5
drm/i915/hdmi: SPD infoframe update for discrete
...
Replace integrated with discrete for dgfx platforms.
v2: commit title reword (Jani)
v3: use variable name i915 (Jani)
v4: commit message reword (MattR)
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Taylor, Clinton A <clinton.a.taylor@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221129203343.720860-1-clinton.a.taylor@intel.com
2022-11-30 09:38:33 -08:00
Gustavo Sousa
6ee6692520
drm/i915/dmc: Update DG2 DMC version to v2.08
...
Release notes:
1. Fixes for Register noclaims and few restore.
Fixes: c4cf059d9c ("drm/i915/dmc: Update DG2 DMC firmware to v2.07")
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221124162123.16870-1-gustavo.sousa@intel.com
2022-11-30 09:04:29 -05:00
Swati Sharma
8f5c2f6eda
drm/i915/dsc: Refactor dsc gen checks
...
Use HAS_DSC(__i915) wrapper containing runtime info of has_dsc
member. Platforms supporting dsc has this flag enabled; no need of
DISPLAY_VER() check.
Also, simplified intel_dsc_source_support() based on above changes.
Suggested-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Swati Sharma <swati2.sharma@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Uma Shankar <uma.shankar@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221110093312.13932-1-swati2.sharma@intel.com
2022-11-30 16:12:19 +05:30
Mikko Kovanen
8d58bb7991
drm/i915/dsi: fix VBT send packet port selection for dual link DSI
...
intel_dsi->ports contains bitmask of enabled ports and correspondingly
logic for selecting port for VBT packet sending must use port specific
bitmask when deciding appropriate port.
Fixes: 08c59dde71 ("drm/i915/dsi: fix VBT send packet port selection for ICL+")
Cc: stable@vger.kernel.org
Signed-off-by: Mikko Kovanen <mikko.kovanen@aavamobile.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/DBBPR09MB466592B16885D99ABBF2393A91119@DBBPR09MB4665.eurprd09.prod.outlook.com
2022-11-29 11:51:35 +02:00
Xia Fukun
7674cd0b7d
drm/i915/bios: fix a memory leak in generate_lfp_data_ptrs
...
When (size != 0 || ptrs->lvds_ entries != 3), the program tries to
free() the ptrs. However, the ptrs is not created by calling kzmalloc(),
but is obtained by pointer offset operation.
This may lead to memory leaks or undefined behavior.
Fix this by replacing the arguments of kfree() with ptrs_block.
Fixes: a87d0a8476 ("drm/i915/bios: Generate LFP data table pointers if the VBT lacks them")
Signed-off-by: Xia Fukun <xiafukun@huawei.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221125063428.69486-1-xiafukun@huawei.com
2022-11-29 11:39:11 +02:00
Ville Syrjälä
af2c3b557e
drm/i915/dvo: Log about what was detected on which DVO port
...
Currently it's not 100% obvious which DVO encoder chip was
found on which port. Leave a slightly better trace in log.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-11-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:07:30 +02:00
Ville Syrjälä
df9f0ebe87
drm/i915/dvo: Extract intel_dvo_regs.h
...
Pull the DVO port register definitons into their own header
to declutter i915_reg.h a bit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:07:19 +02:00
Ville Syrjälä
079c4c0c6c
drm/i915/dvo: Use intel_de_rmw() for DVO enable/disable
...
Replace the hand rolled RMW with intel_de_rmw() in the DVO
port enable/disable functions. Also switch to intel_de_posting_read()
for the posting read (though maybe it should be just be nuked...).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:07:09 +02:00
Ville Syrjälä
7ce5b3a704
drm/i915/dvo: Use REG_BIT() & co. for DVO registers
...
Polish the DVO port registers with REG_BIT()/etc.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:06:50 +02:00
Ville Syrjälä
9710a5c14e
drm/i915/dvo: Rename the "active data order" bits
...
We have two sets of bits for DVO "data order" stuff. Rename
one set to ACT_DATA_ORDER to make it clear they are separate
bitfields.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:06:38 +02:00
Ville Syrjälä
5abd7d8d0e
drm/i915/dvo: Define a few more DVO register bits
...
Define a few extra interrupt related bits on the DVO register.
One of these we included in the DVO_PRESERVE_MASK already.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-6-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:06:15 +02:00
Ville Syrjälä
a8d9a13d24
drm/i915/dvo: Parametrize DVO/DVO_SRCDIM registers
...
Get rid of the dvo_reg/dvo_srcdim_reg stuff by parametrizing
the DVO port registers.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:06:03 +02:00
Ville Syrjälä
bf590368e5
drm/i915/dvo/sil164: Fix suspend/resume
...
Poke a few more bits into the SiI164 to make it
recover after S3. HEN/VEN are the important bits,
the rest PLL filter/HPD detection I just did
for good measure to match the BIOS programming.
Note that the spec recommended SCNT bit in REGC
isn't set by the BIOS at least for me, so I left
it out.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-4-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:05:54 +02:00
Ville Syrjälä
49908b743f
drm/i915/dvo/sil164: Nuke pointless return statements
...
Drop the pointless return statements at the end of void
functions.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:05:45 +02:00
Ville Syrjälä
6ad0571b58
drm/i915/dvo/ch7xxx: Fix suspend/resume
...
Poke a few more bits into the ch7xxx to make
it output a picture after being reset during S3.
In particular we need to set the input buffer select (IBS),
and enable VGA vsync output on the BCO pin. Selecting
VGA hsync on the c/h sync pin doesn't actually seem necessary
on my ADD card at least, but the BIOS selects it so why not.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120825.26338-2-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com >
2022-11-23 16:05:33 +02:00
Jani Nikula
d1dd99083d
drm/i915/hti: avoid theoretically possible negative shift
...
If phy is PHY_NONE, the shift to register bits becomes negative. Check
and warn about this.
Reported-by: coverity-bot <keescook@chromium.org >
References: https://lore.kernel.org/r/202211180848.D39006C@keescook
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Kees Cook <keescook@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20221122120948.3436180-1-jani.nikula@intel.com
2022-11-23 11:16:58 +02:00