imx8mn has only one USB interface. The platform supports using as USB host
(default), or switch to USB DR using this overlay.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
PCIe reference clock is provided by Renesas 9FGV0441. Reference this
instead of a fixed-clock.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit 8208181fe5 ("clk: imx: composite-8m:
Add imx8m_divider_determine_rate") the lcdif controller has
had the ability to set the disp_pixel_clk rate which propagates
up the tree and sets the video_pll rate automatically.
As such, there is no need to define it in the board file.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit 8208181fe5 ("clk: imx: composite-8m:
Add imx8m_divider_determine_rate") the lcdif controller has
had the ability to set the disp_pixel_clk rate which propagates
up the tree and sets the video_pll rate automatically.
By setting this value low, it will force the recalculation of
video_pll to the lowest rate needed by lcdif instead of
dividing a larger clock down to the desired clock speed. This
has the advantage of being able to lower the video_pll rate
from 594MHz to 148.5MHz when operating at 1080p. It can go even
lower when operating at lower resolutions and refresh rates.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx8mp-beacon SOM has an integrated PHY connected to
the EQOS ethernet controller which can support up to five
queues. Configure these queues in the same manor as done
on the imx8mp-evk.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx8mp-beacon SOM has wireless chip supporting Wi-Fi and
Bluetooth shared. The Wi-Fi is already enabled via the SDIO
interface, so enable the Bluetooth via UART1.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The prior configuration was an SBSA UART that can't be configured or
modified, or even enabled if it isn't the boot console. With properly
defined clocks, the PL011 configuration can be used.
Signed-off-by: Heinz Wrobel <Heinz.Wrobel@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SAI I2S and audio bindings to Data Modul i.MX8M Plus eDM SBC.
The SGTL5000 is attached to SAI3, however the SGTL5000 codec MCLK
must be supplied even if the SAI3 is not in use and is controlled
separately by the codec. The MCLK is also used to drive the codec
I2C block, so without MCLK, I2C access to the codec would not be
possible.
To provide such flexible MCLK control, use PWM4 with period 1 and
duty cycle 50% as 12 MHz clock source, as there is no direct way
to route MX8MP CCM clock to the MCLK pin. Use codec as bitclock
and frame clock master, so that the SGTL5000 PLL can be used to
generate derived clock.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Bindings say DMA channels are in order Rx, Tx. Adjust the DT nodes
accordingly. While at it, use defines for the flags.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
edma0 of iMX8DXL is difference with other imx8 chips. Update register's
size, channel number and power-domain.
Update i2c[0-3] channel number information.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add PDM micphone sound card support, configure the pinmux.
This sound card supports recording sound from PDM micphone
and convert the PDM format data to PCM data.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add PDM micphone sound card support, configure the pinmux.
This sound card supports recording sound from PDM micphone
and convert the PDM format data to PCM data.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx8mp-phyboard-pollux has on-board lvds interface connections. An
edt,etml1010g3dra panel is supported for this interface. Add device tree
nodes for backlight and panel.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Company name in compatible description appears twice, which is not really
helpful, so remove it from product name.
The board is a prototype developed by my company and we are still at the
prototype stage, so there is zero ABI impact.
Fixes: 67275c2f3d ("arm64: dts: freescale: introduce rve-gateway board")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the new version, v1.2, of Apalis Evaluation Board.
Because only imx8-apalis-eval.dtsi was available and used as the only
board configuration for board version v1.0 and v1.1, it was changed to
be the common hardware configurations for all versions v1.0,
v1.1 and v1.2. Also, two .dtsi board files were added to have the
differences by board. The .dts were organized by SoM and board version.
Board versions v1.0 and v1.1 are compatible with each other and should
use imx8qm-apalis-eval.dts file or imx8qm-apalis-v1.1-eval.dts file
depending on SoM version. Now for v1.2, organized by SoM version too, the
files are imx8qm-apalis-eval-v1.2.dts and imx8qm-apalis-v1.1-eval-v1.2.dts.
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add compatible string fsl,ls1012a-i2c and scl-gpios to support i2c bus
recovery when I2C bus lock by i2c devices.
[Leo: updated scl-gpios to match RM ]
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Following change in the I3C bindings, the "master" suffix in I3C
controller node name is discouraged (it is "controller" now) and not
accurate (if device supports also target mode).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that there is a dedicated compatible for the idendification page use
that instead. This also allows the removal the size and pagesize
properties.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is already done in dsi node, introduced in commit eda09fe149
("arm64: dts: imx8mp: Add display pipeline components").
This needs to be applied to csi nodes as well or the clock might be busy
if both csi and dsi nodes are enabled.
Fixes error:
clk: failed to reparent media_mipi_phy1_ref to osc_24m: -16
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit labels LDO5 as `reg_vdd_sdio` in `imx8mp-verdin.dtsi` to
facilitate changing its voltage to 1.8V, necessary for an SDIO
peripheral that requires 1.8V at default and high-speed modes.
Additionally, it links `reg_vdd_sdio` to `&usdhc2`, aligning with the
hardware configuration specified in the datasheet.
Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DTSI for Variscite VAR-SOM-MX93 System on Module and DTS for Variscite
VAR-SOM-MX93 on Symphony evaluation board.
This version comes with:
- NXP i.MX 93 Dual, 1.7GHz, Cortex-A55 + Cortex-M33
- 2 GB of RAM
- 16GB eMMC
- 802.11ax/ac/a/b/g/n WiFi with 5.3 Bluetooth
- CAN bus
- Audio codec
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Per qoriq-thermal.yaml, 'big-endian' is not a valid property.
When the 'little-endian' property is absent, the default is big endian.
Remove it to fix the following schema warning:
tmu@1f00000: 'big-endian' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml#
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW71xx does not have a gpio controlled vbus regulator but it does
require some pinctrl. Remove the regulator and move the valid pinctrl
into the usbotg1 node.
Fixes: bd306fdb4e ("arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW7901 has GPIO's to configure the direction of its isolated
digital I/O signals. Add the GPIO pinmux and line names.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT node for the GPU core found on the i.MX8QXP.
etnaviv-gpu 53100000.gpu: model: GC7000, revision: 6214
[drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is eDMA1 at QM, which have the same register with eDMA3 at qxp.
The below commit fix panic problem.
commit b37e75bddc ("arm64: dts: imx8qm: Add imx8qm's own pm to avoid panic during startup")
This fixes the IRQ and DMA channel numbers. While QM eDMA1 technically has
32 channels, only 10 channels are likely used for I2C. The exact IRQ
numbers for the remaining channels were unclear in the reference manual.
Fixes: e4d7a330fb ("arm64: dts: imx8: add edma[0..3]")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
<&pd IMX_SC_R_DMA_1_CH*> is now properly aligned with the previous line
for improved code readability.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These clock gates provide a clock output on ACM_MCLK_OUT pads. They are
intended to be used as MCLK for SAI0-3.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the sai nodes attached to aips1 bus. These can be shared with
imx8qm as well. Input clock from ACM is always feed to mclk1 only. Others
are unused and are connected to a dummy clock.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
