This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.13, please pull the following:
- Rafal fixes YAML warnings for the memory nodes of BCM5301X nodes and
adds support for the NVMEM NVRAM node on Linksys and Luxul WLAN
routers. He also fixes up the partitions for the Linksys EA9400 to
use the newly introduced parser compatible and sets the power LED to
its default state.
* tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Set Linksys EA9500 power LED
ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
ARM: dts: BCM5301X: fix "reg" formatting in /memory node
Link: https://lore.kernel.org/r/20210330184006.1451315-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SoCFPGA DTS updates for v5.13
- Patches from Krzysztof Kozlowski that fixes dtc warnings
and dtbs_check warnings
- Adjust the "cnds,read-delay" value for the Agilex devkit to 2
* tag 'socfpga_dts_update_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: intel: adjust qpsi read-delay property
arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema
arm64: dts: intel: socfpga_agilex: align node names with dtschema
arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts
arm64: dts: intel: socfpga_agilex: move usbphy out of soc node
arm64: dts: intel: socfpga_agilex: remove default status=okay
arm64: dts: intel: socfpga_agilex: move timer out of soc node
arm64: dts: intel: socfpga_agilex: move clocks out of soc node
arm64: dts: intel: socfpga: override clocks by label
Link: https://lore.kernel.org/r/20210330110430.558182-2-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to add the missing interconnect target module configuration for
the drivers that do not still have it. This is similar to what we have
already done earlier for am3 and 4 earlier.
These patches are very much similar for all the three SoCs here. The dra7
changes were already available for v5.12 merge window, but were considered
too late to add for v5.12. The patches for omap4 and 5 follow the same
pattern, except for PCIe that is available only on dra7.
We do the changes one driver at a time, and still keep the legacy property
for "ti,hwmods" mostly around, except for cases when already not needed.
We will be dropping the custom property and related legacy data in a
follow-up series.
* tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (53 commits)
ARM: dts: Configure simple-pm-bus for omap5 l3
ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
ARM: dts: Configure simple-pm-bus for omap5 l4_per
ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
ARM: dts: Move omap5 l3-noc to a separate node
ARM: dts: Move omap5 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap5 sata
ARM: dts: Configure interconnect target module for omap5 gpmc
ARM: dts: Configure interconnect target module for omap5 mpu
ARM: dts: Configure interconnect target module for omap5 emif
ARM: dts: Configure interconnect target module for omap5 dmm
ARM: dts: Prepare for simple-pm-bus for omap4 l3
ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
ARM: dts: Configure simple-pm-bus for omap4 l4_per
ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
ARM: dts: Move omap4 l3-noc to a separate node
ARM: dts: Move omap4 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap4 mpu
ARM: dts: Configure interconnect target module for omap4 debugss
ARM: dts: Configure interconnect target module for omap4 emif
...
Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
All of the currently known MStar/SigmaStar ARMv7 SoCs have an "xtal"
clock input that is usually 24MHz and an "RTC xtal" that is usually 32KHz.
The xtal input has to be connected to something so it's enabled by default.
The MSC313 and MSC313E do not bring the RTC clock input out to the pins
so it's impossible to connect it. The SSC8336 does bring the input
out to the pins but it's not always actually connected to something.
The RTC node needs to always be present because in the future the nodes
for the clock muxes will refer to it even if it's not usable.
The RTC node is disabled by default and should be enabled at the board
level if the RTC input is wired up.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-3-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Align the LED node names with dtschema to silence dtbs_check warnings
like:
leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
serial0@ffc02000: $nodename:0: 'serial0@ffc02000' does not match '^serial(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Use human-readable defines for GIC interrupt type and flag, instead of
hard-coding the numbers. It makes review easier. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The usual usb-nop-xceiv USB phy node should be under root node, to fix
dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:472.21-476.5:
Warning (simple_bus_reg): /soc/usbphy@0: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The ARM architected timer is part of ARM CPU design therefore by
convention it should not be inside the soc node. This also fixes dtc
warning like:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5:
Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The clocks are usually not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node fixes dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5:
Warning (simple_bus_reg): /soc/clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
On most BCM4908 devices MAC address can be read from the bootloader
binary section containing device settings. Use NVMEM to describe that.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Set Linux default trigger to default on, just like it's normally done
for power LEDs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.
While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This fixes warnings/errors like:
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml: /: memory@0:reg:0: [0, 134217728, 2281701376, 402653184] is too long
From schema: /lib/python3.6/site-packages/dtschema/schemas/reg.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Renesas ARM DT updates for v5.13
- OV7725 camera support for the iWave RainboW Qseven board (G21D), and
its camera expansion board,
- Add mmc aliases to fix /dev/mmcblkN order,
- HDMI Display support for the R-Car Starter Kit Pro with R-Car M3-W+,
- Support for running upstream kernels on the RZA2MEVB board, using
the SDRAM present on the sub-board,
- I2C EEPROM support for the Falcon development board,
- Timer, thermal sensor, and CAN support for the R-Car V3U SoC.
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a77980: Fix vin4-7 endpoint binding
arm64: dts: renesas: r8a77961: Add CAN nodes
arm64: dts: renesas: r8a779a0: Add CMT support
arm64: dts: renesas: r8a779a0: Add thermal support
arm64: dts: renesas: r8a779a0: Add TMU support
arm64: dts: renesas: falcon: Add Ethernet sub-board
arm64: dts: renesas: falcon: Add CSI/DSI sub-board
arm64: dts: renesas: falcon: Add I2C EEPROM nodes
ARM: dts: rza2mevb: Upstream Linux requires SDRAM
arm64: dts: renesas: Consolidate Salvator-X(S) HDMI0 handling
arm64: dts: renesas: Add mmc aliases into board dts files
arm64: dts: renesas: r8a77961-ulcb: add HDMI Display support
ARM: dts: renesas: Add mmc aliases into R-Car Gen2 board dts files
arm64: dts: renesas: Group tuples in pin control properties
arm64: dts: renesas: Group tuples in playback and capture properties
ARM: dts: renesas: Group tuples in pin control properties
ARM: dts: renesas: Group tuples in playback and capture properties
ARM: dts: renesas: Group tuples in APMU cpus properties
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add support for 8-bit ov7725 sensors
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Separate out ov5640 nodes
Link: https://lore.kernel.org/r/20210319085146.2709844-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This hardware supports two interrupts, one per DMA channel (RX and TX).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It
has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports,
1 WAN port.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Ethernet switch and MDIO are grouped using "simple-bus". It's not
allowed to use "ethernet-switch" node name as it isn't a switch. Replace
it with "bus".
Fixes: 527a3ac9bd ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM4908 bootloader supports multiple firmware partitions and has its own
bindings defined for them.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There are a few more GPIO connected LEDs there didn't get described
initially.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
In preparation for probing l3 with simple-pm-bus and genpd, we must move
l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from
claiming the whole l3 instance before simple-pm-bus has a chance to probe.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need mmio-sram early for omap4_sram_init() for IO barrier init, and
will be moving l3 interconnect to probe with simple-pm-bus that probes
at module_init() time. So let's move mmio-sram out of l3 to prepare for
that.
Otherwise we will get the following after probing the interconnects with
simple-pm-bus:
omap4_sram_init:Unable to get sram pool needed to handle errata I688
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.
There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's configure omap4 l3 for power-domain and clocks in preparation for
starting to use simple-pm-bus. We will flip over to using simple-pm-bus
later on after dropping the legacy data for all the devices on l3
interconnect.
Signed-off-by: Tony Lindgren <tony@atomide.com>
In preparation for probing l3 with simple-pm-bus and genpd, we must move
l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from
claiming the whole l3 instance before simple-pm-bus has a chance to probe.
Signed-off-by: Tony Lindgren <tony@atomide.com>
