Commit Graph

1335557 Commits

Author SHA1 Message Date
Jonas Karlman
3a01b5f14a arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C
The Radxa E20C may come with an onboard eMMC (8GB / 16GB / 32GB / 64GB).

Enable support for the onboard eMMC on Radxa E20C.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250305214108.1327208-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-13 23:09:34 +01:00
Jonas Karlman
a98cc47f79 arm64: dts: rockchip: Add SDHCI controller for RK3528
The SDHCI controller in Rockchip RK3528 is similar to the one included
in RK3588.

Add device tree node for the SDHCI controller in RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250305214108.1327208-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-13 23:08:45 +01:00
Chen-Yu Tsai
6b68387cf5 arm64: dts: rockchip: Remove bluetooth node from rock-3a
The Bluetooth node described in the device tree is actually on an M.2
slot. What module is present depends on what the end user installed,
and should be left to an overlay.

Remove the existing bluetooth node. This gets rid of bogus timeout
errors.

Fixes: 8cf890aabd ("arm64: dts: rockchip: Add nodes for SDIO/UART Wi-Fi/Bluetooth modules to Radxa Rock 3A")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20250220165051.1889055-1-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-13 23:07:46 +01:00
Chukun Pan
8fbb9376f0 arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory
0x0 to 0xf0000000 are SDRAM memory areas where 0x10f000 is located.
So move the SHMEM memory of arm_scmi to the reserved memory node.

Fixes: a3adc0b907 ("arm64: dts: rockchip: add core dtsi for RK3568 SoC")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250308100001.572657-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-13 23:07:46 +01:00
Jianfeng Liu
d6166ea4cc arm64: dts: rockchip: Add AP6275P wireless support to ArmSoM Sige7
ArmSoM Sige7 uses the PCI-e AP6275P Wi-Fi 6 module. The pcie@0 node can
be used as Bridge1, so the wifi@0 node is used as a device under the
bridge 1 similar with Khadas Edge 2.

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Link: https://lore.kernel.org/r/20250311142825.2727171-1-liujianfeng1994@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12 08:13:15 +01:00
Jimmy Hon
1bfb987d1a arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 Plus
HDMI audio is available on the Orange Pi 5 Plus HDMI TX ports.
Enable it for both ports.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20250227235623.1624-5-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12 08:11:15 +01:00
Jimmy Hon
ffafe9c2dc arm64: dts: rockchip: Enable HDMI1 on Orange Pi 5 Plus
Enable the second HDMI output port on the Orange Pi 5 Plus

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Reviewed-by: Ondrej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250227235623.1624-4-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12 08:11:15 +01:00
Jimmy Hon
01284d7e38 arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 Max
HDMI audio is available on the Orange Pi 5 Max HDMI TX ports.
Enable it for both ports.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20250227235623.1624-3-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12 08:11:15 +01:00
Jimmy Hon
21f1208a3a arm64: dts: rockchip: Enable HDMI0 audio output for Orange Pi 5/5B
HDMI audio is available on the Orange Pi 5 HDMI0 TX port.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20250227235623.1624-2-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12 08:11:15 +01:00
Detlev Casanova
ba82f56bbf arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D
The SPI NOR chip is connected on the FSPI0 core, so enable the sfc0 node
and add the flash device to it.

The SPI NOR won't work at higher speed than 50 MHz, specify the limit.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Link: https://lore.kernel.org/r/20250228145304.581349-3-detlev.casanova@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:19:59 +01:00
Detlev Casanova
3629975712 arm64: dts: rockchip: Add SFC nodes for rk3576
The rk3576 SoC has 2 SFC cores that provide FSPI functions.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Link: https://lore.kernel.org/r/20250228145304.581349-2-detlev.casanova@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:19:59 +01:00
Jonas Karlman
3a2819ee9c arm64: dts: rockchip: Add maskrom button to Radxa E20C
Radxa E20C has two buttons, one SARADC maskrom button and one GPIO user
button.

Add support for the maskrom button using a adc-keys node, also add the
regulators used by SARADC controller.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:15:48 +01:00
Jonas Karlman
6e58302c84 arm64: dts: rockchip: Add SARADC node for RK3528
Add a device tree node for the SARADC controller used by RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:15:48 +01:00
Jonas Karlman
ad8afc8813 arm64: dts: rockchip: Add user button to Radxa E20C
Radxa E20C has two buttons, one SARADC maskrom button and one GPIO user
button.

Add support for the user button using a gpio-keys node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:15:48 +01:00
Jonas Karlman
6a709e0034 arm64: dts: rockchip: Add leds node to Radxa E20C
Radxa E20C has three gpio controlled leds (sys, wan and lan).

Add led nodes and set default trigger to heartbeat for the sys led and
netdev for the lan and wan leds.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:15:47 +01:00
Detlev Casanova
4e4f54aaec arm64: dts: rockchip: Add HDMI support for rock-4d
Enable HDMI and VOP nodes for the rock-4d board.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Link: https://lore.kernel.org/r/20250306180737.127726-1-detlev.casanova@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:11:37 +01:00
Chukun Pan
fbcbc1fb93 arm64: dts: rockchip: enable SCMI clk for RK3528 SoC
Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK.
Add SCMI clk for CPU, GPU and RNG will also use it.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250307100008.789129-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 18:00:23 +01:00
Sebastian Reichel
c62d8fdb27 arm64: dts: rockchip: Enable HDMI receiver on rock-5b
The Rock 5B has a Micro HDMI port, which can be used for receiving
HDMI data. This enables support for it.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Link: https://lore.kernel.org/r/20250307091857.646581-3-dmitry.osipenko@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 17:58:24 +01:00
Shreeya Patel
0327238991 arm64: dts: rockchip: Add device tree support for HDMI RX Controller
Add device tree support for Synopsys DesignWare HDMI RX
Controller.

Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Co-developed-by: Dingxian Wen <shawn.wen@rock-chips.com>
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Link: https://lore.kernel.org/r/20250307091857.646581-2-dmitry.osipenko@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 17:58:23 +01:00
Chukun Pan
61a05d8ca3 arm64: dts: rockchip: Add rk3528 QoS register node
The Quality-of-Service (QsS) node stores/restores specific
register contents when the power domains is turned off/on.
Add QoS node so that they can connect to the power domain.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250306123809.273655-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 17:49:42 +01:00
Chukun Pan
19a634195c dt-bindings: mfd: syscon: Add rk3528 QoS register compatible
Document rk3528 compatible for QoS registers.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250306123809.273655-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08 17:49:42 +01:00
Patrick Wildt
5324af2d02 arm64: dts: rockchip: add MNT Reform 2 laptop
MNT Reform 2 is an open source laptop with replaceable CPU modules,
including a version with the RK3588-based MNT RCORE[1], which is based
on Firefly's iCore-3588Q SoM:

- Rockchip RK3588
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- SD Card slot
- Gigabit ethernet port
- HDMI port
- 2x mPCIe ports for WiFi or NVMe
- 3x USB 3.0 Type-A HOST port

[1] https://shop.mntre.com/products/mnt-reform

Co-developed-by: "Lukas F. Hartmann" <lukas@mntre.com>
Signed-off-by: "Lukas F. Hartmann" <lukas@mntre.com>
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Link: https://lore.kernel.org/r/Z8S6uDM634KJuyKP@windev.fritz.box
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-06 14:42:22 +01:00
Patrick Wildt
3bf4fc44c6 dt-bindings: arm: rockchip: Add MNT Reform 2 (RCORE)
Document board compatible bindings for the MNT Reform 2 with it's RCORE
SoM, which is based on Firefly's iCore-3588Q.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/Z8S5SHqUqKYiT6Wd@windev.fritz.box
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-06 14:41:21 +01:00
Yao Zi
8f814d7c9f dt-bindings: soc: rockchip: Add RK3528 VPU GRF syscon
Add compatible string for VPU GRF found on RK3528 SoC.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250305194217.47052-3-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-06 14:11:54 +01:00
Yao Zi
efc1bc1f36 dt-bindings: soc: rockchip: Add RK3528 VO GRF syscon
Add compatible string for VO GRF found on RK3528 SoC.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250305194217.47052-2-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-06 14:11:54 +01:00
Andy Yan
7641678ecb arm64: dts: rockchip: Enable hdmi out display for rk3576-evb-v10
Enable vop and hdmi on rk3576 evb1, so we can get a display output
on this board now.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20250305025128.479245-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-06 10:38:10 +01:00
Andy Yan
2062b91b9f arm64: dts: rockchip: Enable hdmi display on sige5
Enable hdmi display on sige5 board.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20241231095728.253943-4-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 21:43:31 +01:00
Andy Yan
ad0ea230ab arm64: dts: rockchip: Add hdmi for rk3576
Add hdmi and it's phy dt node for rk3576.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20241231095728.253943-3-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 21:43:31 +01:00
Andy Yan
d74b842cab arm64: dts: rockchip: Add vop for rk3576
Add VOP and VOP_MMU found on rk3576.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20241231095728.253943-2-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 21:43:31 +01:00
Krzysztof Kozlowski
ced36c336d arm64: dts: rockchip: Add ES8388 audio codec fallback on RK3588 boards
Devicetree bindings for ES8388 audio codec expect the device to be
marked as compatible with ES8328.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250304104200.76178-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 15:32:28 +01:00
Krzysztof Kozlowski
d83f6c32d7 arm64: dts: rockchip: Add ES8388 audio codec fallback on RK3399 ROC PC PLUS
Devicetree bindings for ES8388 audio codec expect the device to be
marked as compatible with ES8328.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250304104200.76178-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 15:32:27 +01:00
Jonas Karlman
0d2312f0d3 arm64: dts: rockchip: Add uart0 pinctrl to Radxa E20C
Radxa E20C route UART0 M0 pins (GPIO4_C7 and GPIO4_D0) to the onboard
CH340B for debug console use.

Add pinctrl for UART0 M0 pins used for serial console.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250228064024.3200000-6-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 12:53:58 +01:00
Jonas Karlman
a31fad19ae arm64: dts: rockchip: Add pinctrl and gpio nodes for RK3528
Add pinctrl and gpio nodes for RK3528 and import rk3528-pinctrl.dtsi
from vendor linux-6.1-stan-rkr5 kernel with the hdmi-pins-idle node
removed due to missing label reference to pcfg_output_low_pull_down.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250228064024.3200000-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 12:53:58 +01:00
Jonas Karlman
ac32ad07a9 dt-bindings: soc: rockchip: Add RK3528 ioc grf syscon
The GPIO is accessible via ioc grf syscon registers on RK3528.

Add compatible string for RK3528 ioc grf syscon.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250228064024.3200000-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-04 12:53:58 +01:00
Heiko Stuebner
c55c9e91d1 arm64: dts: rockchip: add usb typec host support to rk3588-jaguar
Jaguar has two type-c ports connected to fusb302 controllers that can
work both in host and device mode and can also run in display-port
altmode.

While these ports can work in dual-role data mode, they do not support
powering the device itself as power-sink. This causes issues because
the current infrastructure does not cope well with dual-role data
without dual-role power.

So add the necessary nodes for the type-c controllers as well as enable
the relevant core usb nodes. So far host modes works reliably, but
device-mode does not. So devicemode needs more investigation.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250228150853.329175-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-28 22:42:46 +01:00
Sebastian Reichel
f94500eb73 arm64: dts: rockchip: Add GPU power domain regulator dependency for RK3588
Enabling the GPU power domain requires that the GPU regulator is
enabled. The regulator is enabled at boot time, but gets disabled
automatically when there are no users.

This means the system might run into a failure state hanging the
whole system for the following use cases:

 * if the GPU driver is being probed late (e.g. build as a
   module and firmware is not in initramfs), the regulator
   might already have been disabled. In that case the power
   domain is enabled before the regulator.
 * unbinding the GPU driver will disable the PM domain and
   the regulator. When the driver is bound again, the PM
   domain will be enabled before the regulator and error
   appears.

Avoid this by adding an explicit regulator dependency to the
power domain.

Tested-by: Heiko Stuebner <heiko@sntech.de>
Reported-by: Adrián Martínez Larumbe <adrian.larumbe@collabora.com>
Tested-by: Adrian Larumbe <adrian.larumbe@collabora.com> # On Rock 5B
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250220-rk3588-gpu-pwr-domain-regulator-v6-8-a4f9c24e5b81@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-28 14:44:49 +01:00
Jimmy Hon
254324dbe3 arm64: dts: rockchip: Enable HDMI1 audio output for Orange Pi 5 Ultra
HDMI audio is available on the Orange Pi 5 Ultra HDMI1 TX port.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20250222193332.1761-6-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 14:36:07 +01:00
Jimmy Hon
efdc4018f3 arm64: dts: rockchip: Enable HDMI1 on Orange Pi 5 Ultra
Enable the only HDMI output port on the Orange Pi 5 Ultra

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Tested-By: Johannes Erdfelt <johannes@erdfelt.com>
Link: https://lore.kernel.org/r/20250222193332.1761-5-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 14:36:06 +01:00
Jimmy Hon
3df28b6fda arm64: dts: rockchip: Add Orange Pi 5 Ultra board
The RK3588 Single Board Computer includes
- eMMC
- microSD
- UART
- 2 PWM LEDs
- RTC
- RTL8125 network controller on PCIe 2.0x1.
- M.2 M-key connector routed to PCIe 3.0x4
- PWM controlled heat sink fan.
- 2 USB2 ports
- lower USB3 port
- upper USB3 port with OTG capability
- Mali GPU
- SPI NOR flash
- Mask Rom button
- Analog audio using es8388 codec via the headset jack and onboard mic
- HDMI1
- HDMI IN

the vcc5v0_usb30 regulator shares the same enable gpio pin as the
vcc5v0_usb20 regulator.

The Orange Pi 5 Ultra is a single board computer powered by the Rockchip
RK3588 with similar board layout as the 5 Max but with the HDMI0 swapped
for HDMI IN.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Tested-By: Johannes Erdfelt <johannes@erdfelt.com>
Link: https://lore.kernel.org/r/20250222193332.1761-4-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 14:36:06 +01:00
Jimmy Hon
f36f2ae1fe dt-bindings: arm: rockchip: Add Xunlong Orange Pi 5 Ultra
Add devicetree binding for the Xunlong Orange Pi 5 Ultra board.

The Orange Pi 5 Ultra is a single board computer powered by the Rockchip
RK3588 with similar board layout as the 5 Max but with the HDMI0 swapped
for HDMI IN.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250222193332.1761-3-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 14:36:06 +01:00
Jimmy Hon
6864a17614 arm64: dts: rockchip: Adapt to differences between Orange Pi 5 Max and Ultra
The Orange Pi 5 Plus and Orange Pi 5 Max have 2SK3018s attached to the
PWM LEDs. The Orange Pi 5 Ultra does not, and thus needs the PWM
polarity inverted.

Also remove the model/compatible from the dtsi. It should be at the
board level only.

Fixes: c600d252dc ("arm64: dts: rockchip: Add Orange Pi 5 Max board")
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20250222193332.1761-2-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 14:36:06 +01:00
Jianfeng Liu
3eac9319af arm64: dts: rockchip: add hdmi1 support to ROCK 5 ITX
Enable the HDMI port next to ethernet port.

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Link: https://lore.kernel.org/r/20250225030904.2813023-1-liujianfeng1994@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 14:09:32 +01:00
Detlev Casanova
97aa62ed1e arm64: dts: rockchip: Enable HDMI audio outputs for Rock 5B
HDMI audio is available on the Rock 5B HDMI TX ports.
Enable it for both ports.

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Fixes: 419d191810 ("ASoC: simple-card-utils: use __free(device_node) for device node")
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/20250217215641.372723-4-detlev.casanova@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 13:04:38 +01:00
Detlev Casanova
b8c6c13697 arm64: dts: rockchip: Add HDMI audio outputs for rk3588
For hdmi0_sound, use the simple-audio-card driver with the hdmi0 QP node
as CODEC and the i2s5 device as CPU.

Similarly for hdmi1_sound, the CODEC is the hdmi1 node and the CPU is
i2s6, but only added in the rk3588-extra.dtsi device tree as the second
TX HDMI port is not available on base versions of the SoC.

The simple-audio-card,mclk-fs value is set to 128 as it is done in
the downstream driver.

The #sound-dai-cells value is set to 0 in the hdmi0 and hdmi1 nodes so
that they can be used as audio codec nodes.

Tested-by: Quentin Schulz <quentin.schulz@cherry.de> # RK3588 Tiger Haikou
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Fixes: 419d191810 ("ASoC: simple-card-utils: use __free(device_node) for device node")
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/20250217215641.372723-3-detlev.casanova@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 13:04:38 +01:00
Cristian Ciocaltea
5c2d6181ae arm64: dts: rockchip: Enable HDMI1 on rk3588-evb1
Add the necessary DT changes to enable the second HDMI output port on
Rockchip RK3588 EVB1.

While at it, switch the position of &vop_mmu and @vop to maintain the
alphabetical order.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20250223-vop2-hdmi1-disp-modes-v2-5-f4cec5e06fbe@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 13:02:36 +01:00
Cristian Ciocaltea
b2e668a60e arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588
VOP2 on RK3588 is able to use the HDMI PHY PLL as an alternative and
more accurate pixel clock source to improve handling of display modes up
to 4K@60Hz on video ports 0, 1 and 2.

The HDMI1 PHY PLL clock source cannot be added directly to vop node in
rk3588-base.dtsi, along with the HDMI0 related one, because HDMI1 is an
optional feature and its PHY node belongs to a separate (extra) DT file.

Therefore, add the HDMI1 PHY PLL clock source to VOP2 by overwriting its
clocks & clock-names properties in the extra DT file.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20250223-vop2-hdmi1-disp-modes-v2-4-f4cec5e06fbe@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 13:02:36 +01:00
Cristian Ciocaltea
aadaa27956 arm64: dts: rockchip: Enable HDMI1 PHY clk provider on RK3588
Since commit c4b09c5620 ("phy: phy-rockchip-samsung-hdptx: Add clock
provider support"), the HDMI PHY PLL can be used as an alternative and
more accurate pixel clock source for VOP2 to improve display modes
handling on RK3588 SoC.

Add the missing #clock-cells property to allow using the clock provider
functionality of HDMI1 PHY.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20250223-vop2-hdmi1-disp-modes-v2-3-f4cec5e06fbe@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-27 13:02:36 +01:00
Andy Yan
a3b3b57ec9 arm64: dts: rockchip: Enable USB3 OTG on rk3588s Cool Pi 4B
Enable USB3 OTG and it's related PHY node. And the PHY will
also be shared with the upcoming DisplayPort controller.

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250223100757.73531-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-26 22:45:15 +01:00
Yao Zi
b9454434d0 arm64: dts: rockchip: Add UART clocks for RK3528 SoC
Add missing clocks in UART nodes for RK3528 SoC.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250217061142.38480-10-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-26 18:47:50 +01:00
Yao Zi
858cdcdd11 arm64: dts: rockchip: Add clock generators for RK3528 SoC
Add dt node for RK3528 clock and reset unit. Clock "gmac0_clk" is
generated by internal Ethernet phy, a fixed clock node is added as a
placeholder to avoid orphans.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250217061142.38480-9-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-26 18:47:50 +01:00