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Author SHA1 Message Date
Michael Walle
359afd90fe pinctrl: ocelot: fix duplicate debugfs entry 
This driver can have up to two regmaps. If the second one is registered
its debugfs entry will have the same name as the first one and the
following error will be printed:

[    2.242568] debugfs: Directory 'e2004064.pinctrl' with parent 'regmap' already present!

Give the second regmap a name to avoid this.

Fixes: 076d9e71bc ("pinctrl: ocelot: convert pinctrl to regmap")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Colin Foster <colin.foster@in-advantage.com>
Link: https://lore.kernel.org/r/20220216122727.1005041-1-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:06:20 +01:00
Michael Walle
94ef32970d pinctrl: ocelot: fix confops resource index 
Prior to commit ad96111e65 ("pinctrl: ocelot: combine get resource and
ioremap into single call") the resource index was 1, now it is 0. But 0
is the base region for the pinctrl block. Fix it.
I noticed this because there was an error that the memory region was
ioremapped twice.

Fixes: ad96111e65 ("pinctrl: ocelot: combine get resource and ioremap into single call")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Colin Foster <colin.foster@in-advantage.com>
Link: https://lore.kernel.org/r/20220216082020.981797-1-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:05:25 +01:00
Jacky Bai
1b945334a9 pinctrl: imx93: Add pinctrl driver support 
Add i.MX93 pinctrl driver

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220228010103.2725893-2-peng.fan@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:02:51 +01:00
Peng Fan
4ad8b50da8 dt-bindings: pinctrl: imx93: Add pinctrl binding 
Add pinctrl binding doc for i.MX93

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220228010103.2725893-1-peng.fan@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:02:51 +01:00
Guodong Liu
7966c5051f pinctrl: canonical rsel resistance selection property 
Change "mediatek,rsel_resistance_in_si_unit" to "mediatek,rsel-resistance-in-si-unit"

Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Link: https://lore.kernel.org/r/20220216032124.28067-4-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:00:03 +01:00
Guodong Liu
8b483bda1e pinctrl: add pinctrl driver on mt8186 
This commit includes pinctrl driver for mt8186.

Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Link: https://lore.kernel.org/r/20220216032124.28067-3-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:00:03 +01:00
Guodong Liu
338e953f1b dt-bindings: pinctrl: mt8186: add pinctrl file and binding document 
1. This patch adds pinctrl file for mt8186.
2. This patch adds mt8186 compatible node in binding document.

Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-03-15 01:00:03 +01:00
Linus Walleij
f54d626698 Merge tag 'intel-pinctrl-v5.18-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel 
intel-pinctrl for v5.18-1

* Introduce support for Alder Lake-N (required to revert misplaced ID)
* Add support for Raptor Lake-S
* Add support for Ice Lake-N (MacBookPro16,2)
* Miscellaneous fixes

The following is an automated git shortlog grouped by driver:

alderlake:
 -  Add Intel Alder Lake-N pin controller support
 -  Add Raptor Lake-S ACPI ID

baytrail:
 -  Clear direct_irq_en flag on broken configs

icelake:
 -  Add Ice Lake-N PCH pin controller support

intel:
 -  Fix a glitch when updating IRQ flags on a preconfigured line
 -  fix unexpected interrupt

Place correctly CONFIG_PINCTRL_ST in the Makefile:
 - Place correctly CONFIG_PINCTRL_ST in the Makefile

tigerlake:
 -  Revert "Add Alder Lake-M ACPI ID"
 2022-02-28 23:55:50 +01:00
Linus Walleij
1f02c8efa1 Merge tag 'renesas-pinctrl-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel 
pinctrl: renesas: Updates for v5.18 (take two)

  - Share more pin group data, to reduce kernel size and ease review,
  - Improve the pin control table validator,
  - Add support for the new R-Car S4-8 SoC,
  - Miscellaneous fixes and improvements.
 2022-02-27 02:18:54 +01:00
Geert Uytterhoeven
babe298e9c pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions 
Add pins, groups, and functions for the Ethernet Time-Sensitive
Networking (TSN) interfaces on the Renesas R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/e0a1dc7d2435d28811e3acb361dae050eb3aabc9.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
2e1b436239 pinctrl: renesas: r8a779f0: Add QSPI pins, groups, and functions 
Add pins, groups, and functions for the Quad SPI Controllers on the
Renesas R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/cd7f7feeabebf268adc9e050e348230e93b40829.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
384484a509 pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function 
Add pins, groups, and function for the PCIe Controllers on the Renesas
R-Car S4-8 (R8A779F0) SoC.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/b2f95db490d13e8cb7d97a63d58d47933317e28a.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
8aaeadb008 pinctrl: renesas: r8a779f0: Add MSIOF pins, groups, and functions 
Add pins, groups, and function for the Clock-Synchronized Serial
Interfaces with FIFO (MSIOF) on the Renesas R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/c625769714b1027a756dd2ed4a017eb24708a041.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
fe8989c672 pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function 
Add pins, groups, and function for the MMC interface on the Renesas
R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/81a35c1fac4616d25501942848eb9662d477f9ef.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
397416d8f9 pinctrl: renesas: r8a779f0: Add INTC-EX pins, groups, and function 
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/dc6e25da42ac4bd19ca31b5b32b43a10a0e1aa7e.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
e9b04360ff pinctrl: renesas: r8a779f0: Add HSCIF pins, groups, and functions 
Add pins, groups, and functions for the High Speed Serial Communication
Interfaces with FIFO (HSCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/2b85b8857c1189fa6ee33e2f57fe746d740481d1.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
180adcd40b pinctrl: renesas: r8a779f0: Add I2C pins, groups, and functions 
Add pins, groups, and functions for the I2C Bus Interfaces (I2C) on the
Renesas R-Car S4-8 (R8A779F0) SoC.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/217f5b3e3888b5899c375d3cb1ec8780f6a9e19b.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
5f3b69663f pinctrl: renesas: r8a779f0: Add SCIF pins, groups, and functions 
Add pins, groups, and functions for the Serial Communication Interfaces
with FIFO (SCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/6369359a53483291ee536787c8a232462ff1b3a9.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:49 +01:00
Geert Uytterhoeven
030ac6d7ee pinctrl: renesas: Initial R8A779F0 PFC support 
Add initial Pin Function Controller (PFC) support for the Renesas R-Car
S4-8 (R8A779F0) SoC, including bias, drive strength and voltage control.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/fd8201da404b7b0897130b254380ffc97f437266.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:45:48 +01:00
Geert Uytterhoeven
acdc4b9838 pinctrl: renesas: Add PORT_GP_CFG_19 macros 
Add PORT_GP_CFG_19() and PORT_GP_19() helper macros, to be used by the
r8a779f0 subdriver.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/f7fc711d065f78911bac1b616880ba3dbc858158.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:42:33 +01:00
LUU HOAI
64d45edd8b dt-bindings: pinctrl: renesas,pfc: Document r8a779f0 support 
Document Pin Function Controller (PFC) support for the Renesas R-Car
S4-8 (R8A779F0) SoC.

Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/d51828853396773be2d6837f3301ac9da8b6f29e.1645457792.git.geert+renesas@glider.be
 2022-02-25 13:42:33 +01:00
Geert Uytterhoeven
d47a74513f pinctrl: renesas: Remove unneeded #include <linux/gpio.h> 
Linus reports that some Renesas pin control sub-drivers are still
including <linux/gpio.h> instead of <linux/gpio/driver.h>.  As these
sub-drivers don't need either, the includes can just be removed.

Reported-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/578825d779b45af745cc7623c7f69d2ddeadac4b.1645605227.git.geert+renesas@glider.be
 2022-02-24 14:01:27 +01:00
Geert Uytterhoeven
de9b861018 pinctrl: renesas: checker: Fix miscalculation of number of states 
The checker failed to validate all enum IDs in the description of a
register with fixed-width register fields, due to a miscalculation of
the number of described states: each register field of n bits can have
"1 << n" possible states, not "1".

Increase SH_PFC_MAX_ENUMS accordingly, now more enum IDs are checked
(SH-Mobile AG5 has more than 4000 enum IDs defined).

Fixes: 12d057bad6 ("pinctrl: sh-pfc: checker: Add check for enum ID conflicts")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d8a6a05564f38f9d20464c1c17f96e52740cf6a.1645460429.git.geert+renesas@glider.be
 2022-02-24 13:59:49 +01:00
Andy Shevchenko
d25478e1d8 pinctrl: icelake: Add Ice Lake-N PCH pin controller support 
This adds pinctrl/GPIO support for Intel Ice Lake-N PCH. The Ice Lake-N
PCH GPIO is based on the same version of the Intel GPIO hardware than
Intel Cannon Lake with different set of pins and ACPI ID.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
 2022-02-23 17:15:11 +02:00
Andy Shevchenko
114b610b90 pinctrl: alderlake: Add Intel Alder Lake-N pin controller support 
This change driver adds pinctrl/GPIO support for Intel Alder Lake-N SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
 2022-02-23 17:15:11 +02:00
Andy Shevchenko
ddfdd1304e pinctrl: alderlake: Add Raptor Lake-S ACPI ID 
Intel Raptor Lake-S PCH has the same GPIO hardware than Alder Lake-S PCH
but the ACPI ID is different. Add this new ACPI ID to the list of supported
devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
 2022-02-23 17:15:11 +02:00
Andy Shevchenko
abcad0f9e7 pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID" 
It appears that last minute change moved ACPI ID of Alder Lake-M
to the INTC1055, which is already in the driver.

This ID on the other hand will be used elsewhere.

This reverts commit 258435a1c8.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
 2022-02-23 17:15:11 +02:00
Geert Uytterhoeven
4704797eb2 pinctrl: renesas: checker: Check drive pin conflicts 
Check that there is only a single entry for each pin with drive strength
capabilities.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/382206e737710afd3059abe75bc41e324823e657.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
6bfbaec7de pinctrl: renesas: checker: Check bias pin conflicts 
Check that there is only a single entry for each pin with pull-up and/or
pull-down capabilities.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/dbda76f342258f8029f0420fbe3f341a9abd6f01.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
8d1c50b801 pinctrl: renesas: checker: Validate I/O voltage configs consistency 
Validate consistency of the pin control tables for pins with I/O voltage
capabilities.  If a pin has I/O voltage register bits declarations
through .pin_to_pocctrl(), the SH_PFC_PIN_CFG_IO_VOLTAGE flag should be
set in the pin's configs, and vice versa.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/de81cced01ae3f26d341177d66d4b8e918fbfb76.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
854476b856 pinctrl: renesas: checker: Validate drive strength configs consistency 
Validate consistency of the pin control tables for pins with drive
strength capabilities.  If a pin has drive strength register bits
declarations in drive_regs[], the SH_PFC_PIN_CFG_DRIVE_STRENGTH flag
should be set in the pin's configs, and vice versa.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0d5de01b5fe2c5fd23c3bea41077dc57ad105b9e.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
4eb5a6eee7 pinctrl: renesas: checker: Validate bias configs consistency 
Validate consistency of the pin control tables for pins with pull-up
and/or pull-down capabilities.  If a pin has bias register bits
declarations in bias_regs[] or through .pin_to_portcr(), the
corresponding SH_PFC_PIN_CFG_PULL* flags should be set in the pin's
configs, and vice versa, and the .get_bias() and .set_bias() callbacks
should be implemented.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/19b3e0773fbb36c015a43db683f79e75b0fec3ee.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
4bb9514c49 pinctrl: renesas: checker: Add pin group sharing checks 
Add checks for discovering pin groups that could share pin data, as
sharing reduces kernel size.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e16fdf729156e13b591d2f082f2cc934da580074.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
27b32fbb28 pinctrl: renesas: checker: Simplify same_name() 
Simplify the helper that checks if two strings are valid and identical.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/509c70041bcf4302e284758abe1fd8165644b505.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
410ba4ad21 pinctrl: renesas: Pass sh_pfc_soc_info to rcar_pin_to_bias_reg() 
Currently rcar_pin_to_bias_reg() takes a struct sh_pfc pointer, which is
only available after the pin control driver has been initialized,
thus preventing the checker from calling this function for validating
consistency of the pin control tables.

Fix this by replacing the parameter by a struct sh_pfc_soc_info pointer.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3065a12dde606bacec9e5f14f10cabeaae75e265.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:19 +01:00
Geert Uytterhoeven
ceb8d2acbb pinctrl: renesas: Factor out .pin_to_portcr() address handling 
All implementations of the .pin_to_portcr() method implement the same
conversion from Port Control Register offset to virtual address.  Factor
it out into the two callers.
Remove the pfc parameter, as it is no longer used.

Note that the failure handling in r8a7740_pin_to_portcr() is pro forma,
as the function is never called with an invalid pin number.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a485d4986a17259256988eb14e3a4c2b8d61c303.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
b67fc1c667 pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl() 
The pfc parameter of the .pin_to_pocctrl() method was never used.
It is a relic of the old I/O voltage handling before commit
8775306dcf ("pinctrl: sh-pfc: refactor voltage setting").

Remove the parameter, as it prevents the checker from calling this
function for validating consistency of the pin control tables.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/822133086f32618c7fc920123c6a96f5d4ea7ad6.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
5356541360 pinctrl: renesas: r8a77990: Share more VIN pin group data 
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16_a.

This reduces kernel size by 128 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cfb71c90c19723ba2770f7512f138e4b17857141.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
ed92143ab6 pinctrl: renesas: r8a77965: Share more VIN pin group data 
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16.

This reduces kernel size by 128 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fd8779f5c7a397e8e4dc3604fe2af55e250a9f40.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
00a0537ed6 pinctrl: renesas: r8a7796: Share more VIN pin group data 
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16.

This reduces kernel size by 128 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1fc04bb08e2c26109509bd53b19ffbf9ce83d2f1.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
0b4423f774 pinctrl: renesas: r8a77951: Share more VIN pin group data 
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16.

This reduces kernel size by 128 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/100605798d02cbd8695aedfaaaa8a3b63e3a281f.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
7e37f104ac pinctrl: renesas: r8a7790: Share more VIN pin group data 
Pin group vin2_g8 is a subset of vin2_data24.

This reduces kernel size by 64 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a4f6a70344654456abea1f15539219d1e02a74fe.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
f3806b4623 pinctrl: renesas: r8a7790: Share USB1 pin group data 
Pin group usb0_ovc_vbus is a subset of usb0.
Pin group usb1_pwen is a subset of usb1.

This reduces kernel size by 16 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b9f37cf00064293b4b6f9068bda8c1ab819090f5.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
44a1212a9d pinctrl: renesas: emev2: Share SDI pin group data 
Pin groups sdi0_data[14] are subsets of sdi0_data8.
Pin groups sdi[12]_data1 are subsets of sdi[12]_data4.

This reduces kernel size by 56 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f35f01666748217b93c2debc0098f9442061a1a.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
4fe364be96 pinctrl: renesas: sh73a0: Share SDHI pin group data 
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.

This reduces kernel size by 24 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/96a5be0c34c66b302e16e915a7cc6272783aa73c.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
40c845dd87 pinctrl: renesas: r8a77990: Share SDHI pin group data 
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi3_data[14] are subsets of sdhi3_data8.

This reduces kernel size by 56 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2f702b6c6114458a43a77ae04089e7f9e20482e5.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
3329623882 pinctrl: renesas: r8a7796: Share SDHI pin group data 
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.

This reduces kernel size by 96 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b638b7ad4a874e64a35057fa1ce6ab23db3406cf.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
b79813f4fc pinctrl: renesas: r8a77965: Share SDHI pin group data 
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.

This reduces kernel size by 96 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d40b65eaf5e18856b6df53a1b787a1432ef14dd2.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
c8c05e812d pinctrl: renesas: r8a77951: Share SDHI pin group data 
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.

This reduces kernel size by 96 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f15024a4984f4b13e1171e3c40df9c6f7b672d7b.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:17 +01:00
Geert Uytterhoeven
3d48da9dbb pinctrl: renesas: r8a77950: Share SDHI pin group data 
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.

This reduces kernel size by 96 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4a479a1126bb405dbc853f328d483f649d43c61e.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:17 +01:00