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Author SHA1 Message Date
Jani Nikula
34e025972c drm/i915/pps: debug log the remaining power cycle delay to wait 
While pps_init_delays() debug logs the power cycle delay, also debug log
the actual remaining time to wait in wait_panel_power_cycle().

Note that this still isn't the full picture; the power sequencer may
still wait after this one.

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13007
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Tested-by: Paul Menzel <pmenzel@molgen.mpg.de> # Dell XPS 13
Link: https://patchwork.freedesktop.org/patch/msgid/20241204160048.2774419-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-12-09 16:27:09 +02:00
Jani Nikula
f5d38d4fa8 drm/i915/display: convert intel_display_driver.[ch] to struct intel_display 
Going forward, struct intel_display will be the main display driver
structure. Convert the main display entry points to struct
intel_display.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241204102150.2223455-1-jani.nikula@intel.com
 2024-12-09 11:42:37 +02:00
Suraj Kandpal
d71ff85ad8 drm/i915/wm: Club initialized variables of same type together 
Refactor program_dpkgc function so that all initialized variables
of same type are clubbed together.

--v2
-Modify commit message to reflect what is being done in patch [Mitul]

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-6-suraj.kandpal@intel.com
 2024-12-05 09:04:44 +05:30
Suraj Kandpal
9aa59753af drm/i915/wm: Modify latency programmed into PKG_C_LATENCY 
Increase the latency programmed into PKG_C_LATENCY latency to be
a multiple of line time which is written into WM_LINETIME.

--v2
-Fix commit subject line [Sai Teja]
-Use individual DISPLAY_VER checks instead of range [Sai Teja]
-Initialize max_linetime [Sai Teja]

--v3
-take into account the scenario when adjusted_latency is 0 [Vinod]

--v4
-rename adjusted_latency to latency [Mitul]
-fix the condition in which dpkgc is disabled [Vinod]

--v5
-Add check to see if max_linetime is 0 [Vinod]

--v6
-Avoid nested if statements [Mitul]

WA: 22020299601
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-5-suraj.kandpal@intel.com
 2024-12-05 09:04:32 +05:30
Suraj Kandpal
555a09d54e drm/i915/display: Refactor DPKGC code to call it from atomic_commit_tail 
Refactor the code to check the fixed refresh rate condition in the dpkgc
function itself and call it from intel_atomic_commit_tail so that we
have all the required values specially linetime which is computed after
intel_wm_compute, this will also help implement some WA's which requires
linetime. This also avoid writing into any of the registers while we are
in compute_config phase.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-4-suraj.kandpal@intel.com
 2024-12-05 09:04:31 +05:30
Suraj Kandpal
11c739218a drm/i915/wm: Use intel_display structure in DPKGC code 
Use intel_display for DPKGC code wherever we can. While we are
at it also use intel_de_rmw instead of intel_uncore_rmw as we
really don't need the internal uncore_rmw_function.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-3-suraj.kandpal@intel.com
 2024-12-05 09:04:30 +05:30
Suraj Kandpal
d4e8379ba2 drm/i915/wm: Refactor dpkgc value prepration 
Refactor the value getting prepped to be written into the PKG_C_LATENCY
register by ORing the REG_FIELD_PREP values instead of having val
getting operated on twice.
We dont need the clear and val variables to be initialized.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-2-suraj.kandpal@intel.com
 2024-12-05 09:04:29 +05:30
Suraj Kandpal
5105c80329 drm/i915/wm: Initialize max_latency variable to appropriate value 
Initialize max_latency variable to LNL_PKG_C_LATENCY_MASK which helps
to eliminate the else block and make the whole code a lot cleaner.

--v2
-Seprate patch to club variables together [Mitul]

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-1-suraj.kandpal@intel.com
 2024-12-05 09:04:28 +05:30
Jiasheng Jiang
9bc5e7dc69 drm/i915: Fix memory leak by correcting cache object name in error handler 
Replace "slab_priorities" with "slab_dependencies" in the error handler
to avoid memory leak.

Fixes: 32eb6bcfdd ("drm/i915: Make request allocation caches global")
Cc: <stable@vger.kernel.org> # v5.2+
Signed-off-by: Jiasheng Jiang <jiashengjiangcool@outlook.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241127201042.29620-1-jiashengjiangcool@gmail.com
 2024-12-04 17:34:51 +01:00
Eugene Kobyak
754302a5bc drm/i915: Fix NULL pointer dereference in capture_engine 
When the intel_context structure contains NULL,
it raises a NULL pointer dereference error in drm_info().

Fixes: e8a3319c31 ("drm/i915: Allow error capture without a request")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12309
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: <stable@vger.kernel.org> # v6.3+
Signed-off-by: Eugene Kobyak <eugene.kobyak@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/xmsgfynkhycw3cf56akp4he2ffg44vuratocsysaowbsnhutzi@augnqbm777at
 2024-12-04 12:55:34 +01:00
Jani Nikula
b27f45ea09 drm/i915/cx0: split out mtl_get_cx0_buf_trans() to c10 and c20 variants 
The PHY is either c10 or c20, there's no need to check at runtime and
complicate the conditions in mtl_get_cx0_buf_trans().

While at it, replace the direct port clock check with
intel_dp_is_uhbr().

Cc: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241129114158.486418-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-12-04 11:02:15 +02:00
Jani Nikula
5f7fb33b7b drm/i915/display: remove unused for_each_crtc() 
This is essentially a duplicate of drm_for_each_crtc() anyway. Remove.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241202125437.1154945-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-12-03 12:07:36 +02:00
Jani Nikula
6710232f1d drm/i915/display: replace dig_port->saved_port_bits with flags 
dig_port->saved_port_bits is used to permanently store two DDI_BUF_CTL
bits, DDI_BUF_PORT_REVERSAL and DDI_A_4_LANES. Store them separately as
bools to make their use more logical and less about storing state as
register bits.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241129102503.452272-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-12-02 16:26:31 +02:00
Jani Nikula
e3ca05ce50 drm/i915/display: convert power map to struct intel_display 
Going forward, struct intel_display is the main device data structure
for display. Convert the power map code to it.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9df6b67914cd5afe7107c8431e8c475794b62298.1732808222.git.jani.nikula@intel.com
 2024-12-02 12:56:23 +02:00
Jani Nikula
3987e35d69 drm/i915/display: convert high level power interfaces to struct intel_display 
Going forward, struct intel_display is the main device data structure
for display. Convert the high level interfaces (init, cleanup, suspend,
resume, etc.) of intel_display_power.c over to it. The actual power
get/put etc. are left for follow-up.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/e1761b0fe5081bf6ca21cca3430befe254f61b32.1732808222.git.jani.nikula@intel.com
 2024-12-02 12:56:18 +02:00
Jani Nikula
31f58252b7 drm/i915/display: convert power domain code internally to struct intel_display 
Going forward, struct intel_display is the main device data structure
for display. Convert intel_display_power.c internally first, leaving
external interfaces for follow-up.

v2: Rebase, checkpatch fixes

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d3284b30b53dd2fec786775ccb8992939360d774.1732808222.git.jani.nikula@intel.com
 2024-12-02 12:56:14 +02:00
Jani Nikula
263e827292 drm/i915/display: convert power wells to struct intel_display 
Going forward, struct intel_display is the main device data structure
for display. Switch the power well code over to it.

v2: Fix parenthesis alignment

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b8c0ff5502a5df55ec7a160d90257c6f2befc0b6.1732808222.git.jani.nikula@intel.com
 2024-12-02 12:56:10 +02:00
Jani Nikula
a92152f2c7 drm/i915/display: convert for_each_power_domain_well() to struct intel_display 
Start converting display power domain code to struct
intel_display. Start off with for_each_power_domain_well() and the
reverse variant.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d21752baef1cab52ac3bec4f4e1f09f9acd6c1bf.1732808222.git.jani.nikula@intel.com
 2024-12-02 12:56:05 +02:00
Jani Nikula
e1d3a13672 drm/i915/display: convert for_each_power_well() to struct intel_display 
Start converting power well code to struct intel_display. Start off with
for_each_power_well() and the reverse variant.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/30c3e44cdb9557a195b2e086bf169da8d8497c6b.1732808222.git.jani.nikula@intel.com
 2024-12-02 12:55:49 +02:00
Suraj Kandpal
63809cdef7 drm/i915/hdcp: Remove log for HDMI HDCP LIC check 
We don't need to shout out loud if there is a Link Integrity
Failure. This does not mean HDCP has failed, it is expected and
taken into account in the HDCP Spec. The real failure happens when
we are not able to reauthenticate and get HDCP running again for
which we already have the right logging.

--v2
-Remove the log altogether [Ankit]

--v3
-Remove useless display variable

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241202060410.1872121-1-suraj.kandpal@intel.com
 2024-12-02 14:08:05 +05:30
Gustavo Sousa
731c74e988 drm/xe/display: Flush DMC wakelock release work on runtime suspend 
We currently are not calling display runtime suspend functions when
D3cold is not allowed. Because of that, we end up not disabling dynamic
DC states (and do not go to DC9). With dynamic DC states enabled, we
will also have DMC wakelock enabled. Since we use a delayed work to
release the DMC wakelock, the work might get executed a little too late
(after the PCI device has been put to D3hot) and we get a timeout
warning ("DMC wakelock release timed out") because the MMIO for
releasing the wakelock will be invalid after that point.

To fix that, make sure we flush the release work at the end of
xe_display_pm_runtime_suspend_late(). We can do that unconditionally
because, if there is no pending work, that turns into a no-op.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241129164010.29887-4-gustavo.sousa@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-11-30 12:07:30 -05:00
Gustavo Sousa
a72f1bbf0c drm/xe/display: Extract xe_display_pm_runtime_suspend_late() 
The current behavior for the runtime suspend case is that
xe_display_pm_suspend_late() is only called when D3cold is allowed.
Let's incorporate that behavior into a function specific to runtime PM
and call it xe_display_pm_runtime_suspend_late().

With that, we keep stuff a bit more self-contained and allow having a
place for adding more "late display runtime suspend"-related logic that
isn't dependent on the "D3cold allowed" state.

v2:
  - Fix typo in that caused xe_display_pm_runtime_suspend_late() to call
    itself instead of xe_display_pm_suspend_late().
  - Add the empty version of xe_display_pm_runtime_suspend_late() for
    the !CONFIG_DRM_XE_DISPLAY case.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241129164010.29887-3-gustavo.sousa@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-11-30 12:07:30 -05:00
Gustavo Sousa
f71212f5cb drm/i915/dmc_wl: Extract intel_dmc_wl_flush_release_work() 
We will need to flush the release work from outside in an upcoming
change. Let's put that into a public interface and call it
intel_dmc_wl_flush_release_work().

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241129164010.29887-2-gustavo.sousa@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-11-30 12:07:30 -05:00
Jani Nikula
810f3bf22c drm/i915/dp: use seq buf for printing rates 
Hand rolling the buffer overflow handling with snprintf() is a bit
tedious. The seq_buf interface is made for this. Switch to it.

Use struct intel_display while at it.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241127131838.3268735-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-29 14:52:34 +02:00
Ville Syrjälä
329e9109b1 drm/i915/pps: Eliminate pointless get_delay() macro 
Now that we have pps_units_to_msecs(), get_delay() looks
rather pointless. Nuke it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:04:45 +02:00
Ville Syrjälä
a463dba64f drm/i915/pps: Extract pps_units_to_msecs() 
Add pps_units_to_msecs() as the counterpart to msecs_pps_units_to().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:04:28 +02:00
Ville Syrjälä
b6bf160102 drm/i915/pps: Extract msecs_to_pps_units() 
Replace all the hand rolled *10 stuff with something a bit
more descriptive (msecs_to_pps_units()).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:03:47 +02:00
Ville Syrjälä
87545d7584 drm/i915/pps: Spell out the eDP spec power sequencing delays a bit more clearly 
We determine the "spec" eDP power sequencing delays
by referencing some max values from the eDP spec.
Write out each number from the spec explicitly instead
of precomputing the final number (that's the job of
the computer). Makes it a bit easier to see what the
supposed spec defined numbers actually are.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:03:13 +02:00
Ville Syrjälä
ccae47c64b drm/i915/lvds: Use struct intel_pps_delays for LVDS power sequencing 
Reuse struct intel_pps_delays for the LVDS power
sequencing delays instead of hand rolling it all.
Perhaps in the future we could reuse some of the
same PPS code for both LVDS and eDP (assuming we
can decouple the PPS code from intel_dp...).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:02:41 +02:00
Ville Syrjälä
c55bc70309 drm/i915/pps: Rename intel_pps_delay members 
Stop using the semi-random eDP spec T1,T3,... names for the
power sequencing delays, and instead call them by their human
readable names. Much easier to keep track what delay goes
where when you don't have to constantly cross reference against
the eDP spec.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:01:17 +02:00
Ville Syrjälä
dac2ec8d3b drm/i915/pps: Decouple pps delays from VBT struct definition 
We currently lack a proper struct definition for the VBT power
squencing delays, and instead we use the same struct definition
(in intel_bios.h) for both the VBT layout and our driver side
state. Decouple those two things by moving the current struct
into intel_vbt_defs.h and adding a new one for the driver's use.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 18:00:48 +02:00
Ville Syrjälä
57ecdc5521 drm/i915/pps: Store the power cycle delay without the +1 
The code initializing the power sequencing delays is a bit
hard to follow. One confusing thing is that we keep doing the
+/-1 adjustment for the hardware register value in several places.
Simplify this a bit by doing the adjustment only when reading or
writing the actual register.

This also matches how the LVDS code does things.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241106215859.25446-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-28 17:59:50 +02:00
Ville Syrjälä
da5bb8974c drm/i915/dsb: Nuke the MMIO->indexed register write logic 
We've determined that indexed DSB writes are only faster
than MMIO writes when writing the same register ~5 or more
times. That seems very unlikely to happen in any other case
than when using indexed LUT registers. Simplify the code
by removing the MMIO->indexed write conversion logic and
just emit the instruction as an indexed write from the get go.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241120164123.12706-4-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-11-28 17:44:39 +02:00
Ville Syrjälä
2504a316b3 drm/i915/color: Stop using non-posted DSB writes for legacy LUT 
DSB LUT register writes vs. palette anti-collision logic
appear to interact in interesting ways:
- posted DSB writes simply vanish into thin air while
  anti-collision is active
- non-posted DSB writes actually get blocked by the anti-collision
  logic, but unfortunately this ends up hogging the bus for
  long enough that unrelated parallel CPU MMIO accesses start
  to disappear instead

Even though we are updating the LUT during vblank we aren't
immune to the anti-collision logic because it kicks in briefly
for pipe prefill (initiated at frame start). The safe time
window for performing the LUT update is thus between the
undelayed vblank and frame start. Turns out that with low
enough CDCLK frequency (DSB execution speed depends on CDCLK)
we can exceed that.

As we are currently using non-posted writes for the legacy LUT
updates, in which case we can hit the far more severe failure
mode. The problem is exacerbated by the fact that non-posted
writes are much slower than posted writes (~4x it seems).

To mititage the problem let's switch to using posted DSB
writes for legacy LUT updates (which will involve using the
double write approach to avoid other problems with DSB
vs. legacy LUT writes). Despite writing each register twice
this will in fact make the legacy LUT update faster when
compared to the non-posted write approach, making the
problem less likely to appear. The failure mode is also
less severe.

This isn't the 100% solution we need though. That will involve
estimating how long the LUT update will take, and pushing
frame start and/or delayed vblank forward to guarantee that
the update will have finished by the time the pipe prefill
starts...

Cc: stable@vger.kernel.org
Fixes: 34d8311f4a ("drm/i915/dsb: Re-instate DSB for LUT updates")
Fixes: 25ea3411bd ("drm/i915/dsb: Use non-posted register writes for legacy LUT")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12494
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241120164123.12706-3-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-11-28 17:42:22 +02:00
Ville Syrjälä
ecba559a88 drm/i915/dsb: Don't use indexed register writes needlessly 
Turns out the DSB indexed register write command has
rather significant initial overhead compared to the normal
MMIO write command. Based on some quick experiments on TGL
you have to write the register at least ~5 times for the
indexed write command to come out ahead. If you write the
register less times than that the MMIO write is faster.

So it seems my automagic indexed write logic was a bit
misguided. Go back to the original approach only use
indexed writes for the cases we know will benefit from
it (indexed LUT register updates).

Currently we shouldn't have any cases where this truly
matters (just some rare double writes to the precision
LUT index registers), but we will need to switch the
legacy LUT updates to write each LUT register twice (to
avoid some palette anti-collision logic troubles).
This would be close to the worst case for using indexed
writes (two writes per register, and 256 separate registers).
Using the MMIO write command should shave off around 30%
of the execution time compared to using the indexed write
command.

Cc: stable@vger.kernel.org
Fixes: 34d8311f4a ("drm/i915/dsb: Re-instate DSB for LUT updates")
Fixes: 25ea3411bd ("drm/i915/dsb: Use non-posted register writes for legacy LUT")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241120164123.12706-2-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-11-28 17:41:55 +02:00
Ville Syrjälä
24387a21dc Revert "drm/i915/dpt: Make DPT object unshrinkable" 
This reverts commit 51064d471c.

Now that we forcefully evict all DPT VMAs during suspend
there should be no problem allowing the shrinker to eat
the DPT objects.

Cc: Brian Geffon <bgeffon@google.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12965
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241127061117.25622-5-ville.syrjala@linux.intel.com
Acked-by: Brian Geffon <bgeffon@google.com>
Reviewed-by: Vidya Srinivas <vidya.srinivas@intel.com>
Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
 2024-11-28 17:33:48 +02:00
Ville Syrjälä
106216c220 drm/i915/dpt: Evict all DPT VMAs on suspend 
Currently intel_dpt_resume() tries to blindly rewrite all the
PTEs for currently bound DPT VMAs. That is problematic because
the CPU mapping for the DPT is only really guaranteed to exist
while the DPT object has been pinned. In the past we worked
around this issue by making DPT objects unshrinkable, but that
is undesirable as it'll waste physical RAM.

Let's instead forcefully evict all the DPT VMAs on suspend,
thus guaranteeing that intel_dpt_resume() has nothing to do.
To guarantee that all the DPT VMAs are evictable by
intel_dpt_suspend() we need to flush the cleanup workqueue
after the display output has been shut down.

And for good measure throw in a few extra WARNs to catch
any mistakes.

Cc: Brian Geffon <bgeffon@google.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241127061117.25622-4-ville.syrjala@linux.intel.com
Reviewed-by: Vidya Srinivas <vidya.srinivas@intel.com>
Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
 2024-11-28 17:33:44 +02:00
Ville Syrjälä
37ab41e11f drm/i915: Intruduce display.wq.cleanup 
Introduce a dedicated workqueue for the commit cleanup work.
In the future we'll need this to guarantee all the cleanup
works have finished at a specific point during suspend.

Cc: Brian Geffon <bgeffon@google.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241127061117.25622-3-ville.syrjala@linux.intel.com
Reviewed-by: Vidya Srinivas <vidya.srinivas@intel.com>
Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
 2024-11-28 17:33:40 +02:00
Ville Syrjälä
0768530b7c drm/i915: Don't reuse commit_work for the cleanup 
Currently we reuse the commit_work for a later cleanup step.
Let's not do that so that atomic ioctl handler won't accidentally
wait for the cleanup work when it really wants to just wait on the
commit_tail() part. We'll just add another work struct for the
cleanup.

Cc: Brian Geffon <bgeffon@google.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241127061117.25622-2-ville.syrjala@linux.intel.com
Reviewed-by: Vidya Srinivas <vidya.srinivas@intel.com>
Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
 2024-11-28 17:33:33 +02:00
Jani Nikula
36a585f6bb drm/i915/dislay: convert i9xx_display_sr.[ch] to struct intel_display 
Going forward, struct intel_display is the main device data structure
for display. Switch to it.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126101222.2671224-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-27 10:17:03 +02:00
Jani Nikula
ce44eb0063 drm/i915/display: prefer DISPLAY_VER over GRAPHICS_VER in display s/r 
Use display version checks for display scratch registers, not graphics
version. And for the older platforms it's the same thing anyway.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126101222.2671224-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-27 10:17:03 +02:00
Jani Nikula
ad4adad7c6 drm/i915/ddi: clarify intel_ddi_connector_get_hw_state() for DP MST 
encoder->get_hw_state() returns false for DP MST, and currently always
interprets 128b/132b as MST. Therefore the DDI MST mode checks in
intel_ddi_connector_get_hw_state() are redundant.

Prepare for future, and handle 128b/132b SST and warn on 8b/10b MST.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241125120959.2366419-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-26 11:03:53 +02:00
Zhang He
de5c149a9b drm/i915: Fixed an typo in i915_gem_gtt.c 
in function `i915_gem_gtt_reserve` @node comment,
i915_vma has no `mode` member, `i915_vma.node` is the correct name

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Zhang He <zhanghe9702@163.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241120123245.71101-1-zhanghe9702@163.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-11-25 10:59:00 -05:00
Jani Nikula
f0fa762400 drm/i915/irq: emphasize display_irqs_enabled is only about VLV/CHV 
Use display_irqs_enabled only on VLV/CHV where it's relevant. Rename to
vlv_display_irqs_enabled, to emphasize it's really only about VLV/CHV.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f60104ea59687cb8c65b18b4f9ddd832a643407d.1732102179.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:56:35 +02:00
Jani Nikula
1fbad9acb1 drm/i915/irq: hide display_irqs_enabled access 
Move the check for display_irqs_enabled within vlv_display_irq_reset()
and vlv_display_irq_postinstall() to avoid looking at struct
intel_display members within i915 core irq code.

Within display irq code, vlv_display_irq_reset() may need to be called
with !display_irqs_enabled, so add a small wrapper.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ef43e26ebab7f84768391f5053c0eba44b647c89.1732102179.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:56:35 +02:00
Jani Nikula
d9b31d6acc drm/i915/plane: convert initial plane setup to struct intel_display 
struct intel_display replaces struct drm_i915_private as the main
display device pointer. Convert initial plane setup to it, as much as
possible.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9e370d8e90235165539f81ca2d00fdd2e883397f.1732102179.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:56:35 +02:00
Jani Nikula
e3840e5871 drm/i915/overlay: add intel_overlay_available() and use it 
Avoid accessing struct intel_display members directly from
i915_getparam_ioctl(). Add intel_overlay_available() function to provide
the information for I915_PARAM_HAS_OVERLAY.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/26041645168ce3e76cb8f73bcb4c747619117e06.1732102179.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:56:35 +02:00
Jani Nikula
40c9ad5f2d drm/i915/overlay: convert to struct intel_display 
struct intel_display replaces struct drm_i915_private as the main
display device pointer. Convert overlay to it, as much as possible.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3680586c05e82fd01d173cfb4f8df015d6db663c.1732102179.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:56:35 +02:00
Jani Nikula
e713b26e5e drm/i915/ddi: simplify intel_ddi_get_encoder_pipes() slightly 
Use a temporary variable for DDI mode to simplify the conditions. This
is in line with the other places that read DDI mode.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/84892d31807bd8118474dd873e73c4d459f61448.1732106557.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:36:59 +02:00
Jani Nikula
68148b8ee1 drm/i915/ddi: refactor intel_ddi_connector_get_hw_state() 
Refactor the switch-case into an if-ladder similar to
intel_ddi_read_func_ctl() for clarity.

This highlights how TRANS_DDI_MODE_SELECT_FDI_OR_128B132B works on
different platforms.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/191f0210d720f3113a092e1ef0c7996a7dee85a0.1732106557.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-11-22 13:36:59 +02:00