Pull SoC devicetree updates from Arnd Bergmann:
"We see the addition of eleven new SoCs, including a total of sixx
arm64 chips from Qualcomm alone. Overall, the Qualcomm platforms once
again make up the majority of all changes, after a couple of quieter
releases.
The new SoCs in this branch are:
- Microchip sama7d65 is a new 32-bit embedded chip with a single
Cortex-A7 and the current high end of the old Atmel SoC line.
- Samsung Exynos 9810 is a mobile phone chip used in some older
phones like the Samsung Galaxy S9
- Renesas R-Car V4H ES3.0 (R8A779G3) is an updated version of the V4H
(R8A779G0) low-power automotive SoC
- Renesas RZ/G3E (R0A09G047) is a family of embedded chips using
Cortex-A55 cores
- Qualcomm Snapdragon 8 Elite (SM8750) is a new phone chip based on
Qualcomm's Oryon CPU cores.
- Qualcomm Snapdragon AR2 (SAR2130P) is a SoC for augmented reality
glasses.
- Qualcomm IQ6 (QCS610) and IQ8 (QCS8300) are two industrial IOT
platforms.
- Snapdragon 425 (MSM8917) is a mobile phone SoC from 2016
- Qualcomm IPQ5424 is a Wi-Fi 7 networking chip
All of the above are part of already supported SoC families that only
need new devicetree files. Two additional SoCs in new families are
part of a separate branch.
There are 48 new machines in total, including six arm32 ones based on
aspeed. broadcom, microchip and st SoCs all using Cortex-A7 cores, and
a single risc-v board, the Banana Pi R3.
The remaining ones use arm64 chips from Broadcom, Samsung, NXP,
Mediatek, Qualcomm, Renesas and Rockchips and cover development
boards, phones, laptops, industrial machines routers.
A lot of ongoing work is for cleaning up build time warnings and other
issues, in addition to the new machines and added features"
* tag 'soc-dt-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (619 commits)
arm64: tegra: Fix Tegra234 PCIe interrupt-map
arm64: dts: qcom: x1e80100-romulus: Update firmware nodes
arm64: dts: rockchip: add DTs for Firefly ITX-3588J and its Core-3588J SoM
dt-bindings: arm: rockchip: Add Firefly ITX-3588J board
arm64: dts: rockchip: Add Orange Pi 5 Max board
dt-bindings: arm: rockchip: Add Xunlong Orange Pi 5 Max
arm64: dts: rockchip: refactor common rk3588-orangepi-5.dtsi
arm64: dts: rockchip: add WLAN to rk3588-evb1 controller
arm64: dts: rockchip: increase gmac rx_delay on rk3399-puma
arm64: dts: rockchip: Delete redundant RK3328 GMAC stability fixes
arm64: tegra: Disable Tegra234 sce-fabric node
arm64: tegra: Fix typo in Tegra234 dce-fabric compatible
arm64: tegra: Fix DMA ID for SPI2
arm64: dts: qcom: msm8916-samsung-serranove: Add display panel
arm64: dts: qcom: sm8650: Add 'global' interrupt to the PCIe RC nodes
arm64: dts: qcom: sm8550: Add 'global' interrupt to the PCIe RC nodes
arm64: dts: qcom: Remove unused and undocumented properties
arm64: dts: qcom: sdm450-lenovo-tbx605f: add DSI panel nodes
arm64: dts: qcom: pmi8950: add LAB-IBB nodes
arm64: dts: qcom: ipq5424: enable the download mode support
...
ASPEED device tree updates for 6.14
- New machines
* IBM SPB1 AST2600 BMC machine, a Sapphire Rapids x86 server
* Ampre Mt Jefferson AST2600 BMC
- Updates to mtmitchell, rainier, blueridge, everest, fuji, system1,
harma, catalina and minerva
- A big rework of yosemite4
* tag 'aspeed-6.14-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (55 commits)
ARM: dts: aspeed: yosemite4: adjust secondary flash name
ARM: dts: aspeed: system1: Use crps PSU driver
ARM: dts: aspeed: minerva: add second source RTC
ARM: dts: aspeed: minerva: add bmc ready led setting
ARM: dts: aspeed: minerva: add i/o expanders on each FCB
ARM: dts: aspeed: minerva: add i/o expanders on bus 0
ARM: dts: aspeed: catalina: remove interrupt of GPIOB4 form all IOEXP
ARM: dts: aspeed: catalina: revise ltc4287 shunt-resistor value
arm: dts: aspeed: Blueridge and Rainer: Add VRM presence GPIOs
ARM: dts: aspeed: Blueridge and Fuji: Fix LED node names
arm: dts: aspeed: Everest and Fuji: Add VRM presence gpio expander
ARM: dts: aspeed: sbp1: IBM sbp1 BMC board
dt-bindings: arm: aspeed: add IBM SBP1 board
ARM: dts: aspeed: Add device tree for Ampere's Mt. Jefferson BMC
dt-bindings: arm: aspeed: add Mt. Jefferson board
ARM: dts: aspeed: yosemite4: Add i2c-mux for ADC monitor on Spider Board
ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode on Fan Boards
ARM: dts: aspeed: yosemite4: Change the address of Fan IC on fan boards
ARM: dts: aspeed: yosemite4: Revise address of i2c-mux for two fan boards
ARM: dts: aspeed: yosemite4: correct the compatible string for max31790
...
Link: https://lore.kernel.org/r/CACPK8Xe8yZLXzEQPp=1D2f0TsKA7hBZG=pHHW6U51FMpp_BiRQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Qualcomm Arm32 DeviceTree updates for v6.14
Describe the interconnect paths for PCIe EP controllers on SDX55 and
SDX65. Disable USB U1/U2 entry to improve USB stability on the same.
* tag 'qcom-arm32-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: sdx55: Disable USB U1/U2 entry
ARM: dts: qcom: sdx65: Disable USB U1/U2 entry
ARM: dts: qcom: sdx55: Add CPU PCIe EP interconnect path
ARM: dts: qcom: sdx65: Add PCIe EP interconnect path
Link: https://lore.kernel.org/r/20250111171126.369502-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 6.14, please pull the following:
- Rob removes some unused and undocumented properties pertaining to the
SPI flash controller on Broadcom boards
- Linus adds a number of BCM6846 peripherals: HWRNG, watchdog, GPIO,
MDIO, LED controller, DMA and then proceeds with adding support for
the GEnexsis XG6846B PON router
- Rosen sets the MAC address NVMEM reference on the Meraki MR26 platform
* tag 'arm-soc/for-6.14/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: meraki-mr26: set mac address for gmac0
ARM: dts: broadcom: Add Genexis XG6846B DTS file
dt-bindings: arm: bcmbca: Add Genexis XG6846B
dt-bindings: vendor-prefixes: Add Genexis
ARM: dts: bcm6846: Add ARM PL081 DMA block
ARM: dts: bcm6846: Add LED controller
ARM: dts: bcm6846: Add MDIO control block
ARM: dts: bcm6846: Add GPIO blocks
ARM: dts: bcm6846: Enable watchdog
ARM: dts: bcm6846: Add iproc rng
arm: dts: broadcom: Remove unused and undocumented properties
Link: https://lore.kernel.org/r/20250109224756.3632025-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner Device Tree changes for 6.14
- Add support for DMA engine and audio codec on F1C100s
and enable audio codec on Lichee Pi Nano
- Add syscon and SRAM nodes for A100
- Enable CPU DVFS for Tanix TX1
- Explicitly configure TCON0 pixel clock parent according to display
output used
This includes one commit shared with the clock tree
dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI
which adds the macros for the TCON0 pixel clock parents.
* tag 'sunxi-dt-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: explicitly assign clock parent for TCON0
dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI
arm64: dts: allwinner: h313: enable DVFS for Tanix TX1
arm64: dts: allwinner: a100: Add syscon nodes
dt-bindings: sram: sunxi-sram: Add A100 compatible
ARM: dts: suniv: f1c100s: Activate Audio Codec for Lichee Pi Nano
ARM: dts: suniv: f1c100s: Add support for Audio Codec
ARM: dts: suniv: f1c100s: Add support for DMA
Link: https://lore.kernel.org/r/Z36h2FwUxro8rouO@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SoCFPGA DTS updates for v6.14
- Remove unused and undocumented property "snps,max-mtu"
- Add gpio and spi node for Agilex5
- Add VGIC maintenance interrupt for Agilex
- Use correct reset name of "stmmaceth-ocp" instead of "ahb"
- Drop unused #address-cells/#size-cells in the cyclone5-mcvevk
* tag 'socfpga_dts_updates_v6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: altera: Remove unused and undocumented "snps,max-mtu" property
arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id
arm64: dts: socfpga: agilex: Add VGIC maintenance interrupt
arm: dts: socfpga: use reset-name "stmmaceth-ocp" instead of "ahb"
ARM: dts: socfpga_cyclone5_mcvevk: Drop unused #address-cells/#size-cells
Link: https://lore.kernel.org/r/20250103023012.1268627-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Minor improvements in ARM DTS for v6.14
1. Marvell: Use un-deprecated hp-det-gpios (no ABI impact expected).
2. SoCFPGA: Drop spidev devices which are not properly described in DTS,
but are using some other compatibles. This was part of wider tree
effort to fix such incorrect hardware descriptions.
Important: Dropping this device node will have user-visible impact:
spidev device will not register.
* tag 'dt-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: socfpga: remove non-existent DAC from CycloneV devkit
ARM: dts: marvell: mmp2-olpc-xo-1-75: Switch to {hp,mic}-det-gpios
Link: https://lore.kernel.org/r/20241231132847.135814-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Meta (Facebook) has a preference for all of our secondary flash
chips to be labelled "alt-bmc" for consistency of userspace tools
deal with updates. Bletchley, Harma, Minerva, and Catalina all
follow this convention but for some reason Yosemite4 is different.
Adjust the label in the dts to match the other platforms.
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://patch.msgid.link/20250107162726.232402-1-patrick@stwcx.xyz
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Despite CM_IDLEST1_CORE and CM_FCLKEN1_CORE behaving normal,
disabling SPI leads to messages like when suspending:
Powerdomain (core_pwrdm) didn't enter target state 0
and according to /sys/kernel/debug/pm_debug/count off state is not
entered. That was not connected to SPI during the discussion
of disabling SPI. See:
https://lore.kernel.org/linux-omap/20230122100852.32ae082c@aktux/
The reason is that SPI is per default in slave mode. Linux driver
will turn it to master per default. It slave mode, the powerdomain seems to
be kept active if active chip select input is sensed.
Fix that by explicitly disabling the SPI3 pins which used to be muxed by
the bootloader since they are available on an optionally fitted header
which would require dtb overlays anyways.
Fixes: a622310f7f ("ARM: dts: gta04: fix excess dma channel usage")
CC: stable@vger.kernel.org
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20241204174152.2360431-1-andreas@kemnade.info
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
3. On targets like SDX75, intermittent disconnects were observed
with certain cables due to impedence variations.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241231080932.3149448-3-quic_prashk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
3. On targets like SDX75, intermittent disconnects were observed
with certain cables due to impedence variations.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241231080932.3149448-2-quic_prashk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add no-1-8-v property to sdmmc0 node to keep VDDSDMMC power rail at 3.3V.
This property will stop the LDO regulator from switching to 1.8V when the
MMC core detects an UHS SD Card. VDDSDMMC power rail is used by all the
SDMMC interface pins in GPIO mode (PA0 - PA13).
On this board, PA10 is used as GPIO to enable the power switch controlling
USB Vbus for the USB Host. The change is needed to fix the PA10 voltage
level to 3.3V instead of 1.8V.
Fixes: 5d4c3cfb63 ("ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek")
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Tested-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241119160107.598411-3-cristian.birsan@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add no-1-8-v property to sdmmc0 node to keep VDDSDMMC power rail at 3.3V.
This property will stop the LDO regulator from switching to 1.8V when the
MMC core detects an UHS SD Card. VDDSDMMC power rail is used by all the
SDMMC interface pins in GPIO mode (PA0 - PA13).
On this board, PA6 is used as GPIO to enable the power switch controlling
USB Vbus for the USB Host. The change is needed to fix the PA6 voltage
level to 3.3V instead of 1.8V.
Fixes: d85c4229e9 ("ARM: dts: at91: sama5d29_curiosity: Add device tree for sama5d29_curiosity board")
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Tested-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241119160107.598411-2-cristian.birsan@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
mdio-gpio is not a valid pattern according to mdio-gpio.yaml.
Use the generic 'mdio' name to fix the following dt-schema warnings:
'mdio-gpio' does not match '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently there are 3 type of boards (imx6q|imx6qp|imx6dl-sabresd)
based on imx6qdl-sabresd.dtsi, they all do not set the dr_mode for
usbotg device node. The chipidea usb driver will configure it to otg
mode by default if the dr_mode is not set, but some testcases need to
parse the dr_mode from DT and decide the follow-up test strategy, here
set the dr_mode to otg explicitly for these 3 imx6qdl-sabresd based
boards.
Signed-off-by: Hui Wang <hui.wang@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to adv7180.yaml, the correct property name is
"adi,force-bt656-4".
Update it accordingly to fix several dt-schema warnings:
adv7280@21: 'adv,force-bt656-4' does not match any of the regexes: ...
imx6qdl-apalis.dtsi is the only in-tree kernel user of this property.
BSD does have a adv7180 driver, so should not be impacted.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The integrated usb phys are supplied by the 3p0 regulator, which has a
voltage range of 2.625V to 3.4V. Thus the min and max values are
corrected and the regulator added as a proper supply for the usb phys.
This fixes the following warnings during the probe of the mxs_phy
driver:
mxs_phy 20c9000.usbphy: supply phy-3p0 not found, using dummy regulator
mxs_phy 20ca000.usbphy: supply phy-3p0 not found, using dummy regulator
The regulator handling was introduced by commit `966d73152078 (usb: phy:
mxs: enable regulator phy-3p0 to improve signal qualilty, 2024-07-26)`.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The integrated usb phys are supplied by the 3p0 regulator, which has a
voltage range of 2.625V to 3.4V. Thus the min and max values are
corrected and the regulator added as a proper supply for the usb phys.
This fixes the following warnings during the probe of the mxs_phy
driver:
mxs_phy 20c9000.usbphy: supply phy-3p0 not found, using dummy regulator
mxs_phy 20ca000.usbphy: supply phy-3p0 not found, using dummy regulator
The 3p0 regulator handling was introduced by commit 966d731520 ("usb:
phy: mxs: enable regulator phy-3p0 to improve signal qualilty")`.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The integrated usb phys are supplied by the 3p0 regulator, which has a
voltage range of 2.625V to 3.4V. Thus the min and max values are
corrected and the regulator added as a proper supply for the usb phys.
This fixes the following warnings during the probe of the mxs_phy
driver:
mxs_phy 20c9000.usbphy: supply phy-3p0 not found, using dummy regulator
mxs_phy 20ca000.usbphy: supply phy-3p0 not found, using dummy regulator
The 3p0 regulator handling was introduced by commit 966d731520 ("usb:
phy: mxs: enable regulator phy-3p0 to improve signal qualilty")`.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In the schematics, the MCLK2 pin is shown as connected to CODEC_CLK32K,
which is derived from the same 32KHZ_PMIC clock as Bluetooth/WiFi and
GPS clocks. 32KHZ_PMIC is connected to the BTCLK pin, represented in
mainline as S2MPS11_CLK_BT.
Add the MCLK2 clock to the WM1811 codec clock property to properly
describe the hardware.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-4-48ee7f2293b3@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Renesas DTS updates for v6.14
- Add more serial (SCIF), power monitor, ADC, and sound support for
the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board,
- Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk
Single development board,
- Add display support for the R-Car V4M SoC and the Gray Hawk Single
development board,
- Add video capture support for the Gray Hawk Single development
board,
- Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E
SMARC SoM and Carrier-II EVK development board,
- Add support for 5-port MATEnet on the Falcon Ethernet sub-board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits)
arm64: dts: renesas: r9a09g047: Add I2C nodes
arm64: dts: renesas: rzg3s-smarc: Add sound card
arm64: dts: renesas: rzg3s-smarc: Enable SSI3
arm64: dts: renesas: Add da7212 audio codec node
arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node
arm64: dts: renesas: r9a08g045: Add SSI nodes
arm64: dts: renesas: rzg3s-smarc-som: Enable ADC
arm64: dts: renesas: r9a08g045: Add ADC node
arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board
arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM
arm64: dts: renesas: r9a09g047: Add OPP table
arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC
arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board
arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5]
dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK
dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
arm64: dts: renesas: gray-hawk-single: Add video capture support
arm64: dts: renesas: gray-hawk-single: Add DisplayPort support
arm64: dts: renesas: r8a779h0: Add display support
...
Link: https://lore.kernel.org/r/cover.1734689803.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 DT for v6.14, round 1
Highlights:
----------
- MPU:
- STM32MP13:
- Populate all timer counter nodes in Soc file.
- Enable counter (timers) on stm32mp135f-dk.
- DH core: increase CPU voltage to fit with STM32MP135F datasheet.
- STMP32MP15:
- Populate all timer counter nodes in Soc file.
- Enable counter (timers) on stm32mp15 EV1 and DK boards.
- OCTAVO:
- LXA-TAC (gen1/2): disable RTC, update aliases and
adjust USB gadget.
- Add LXA-TAC gen3 based on OSD32MP153x SIP:
STMP32MP153, RAM, PMIC.
- DH: minor fixes.
- STM32MP25:
- Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1.
- Add I2S, SAI, SPDIFRX supports.
- Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used
by PCIe and USB3.
* tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (23 commits)
arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1
arm64: dts: st: add csi & dcmipp node in stm32mp25
ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM
ARM: dts: stm32: add counter subnodes on stm32mp157 dk boards
ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1
ARM: dts: stm32: add counter subnodes on stm32mp135f-dk
ARM: dts: stm32: populate all timer counter nodes on stm32mp15
ARM: dts: stm32: populate all timer counter nodes on stm32mp13
ARM: dts: stm32: lxa-tac: Add support for generation 3 devices
ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boards
dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC gen 3
ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi function
ARM: dts: stm32: lxa-tac: extend the alias table
ARM: dts: stm32: lxa-tac: disable the real time clock
ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151
ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT
ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM
ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM
arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board
arm64: dts: st: Add combophy node on stm32mp251
...
Link: https://lore.kernel.org/r/7ffcca65-3953-413a-bcf3-0702a6b0518b@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Swap USART3 and UART8 aliases on STM32MP15xx DHCOM SoM,
make sure UART8 is listed first, USART3 second, because
the UART8 is labeled as UART2 on the SoM pinout, while
USART3 is labeled as UART3 on the SoM pinout.
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
