Merge tag 'socfpga_dts_updates_v6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.14
- Remove unused and undocumented property "snps,max-mtu"
- Add gpio and spi node for Agilex5
- Add VGIC maintenance interrupt for Agilex
- Use correct reset name of "stmmaceth-ocp" instead of "ahb"
- Drop unused #address-cells/#size-cells in the cyclone5-mcvevk

* tag 'socfpga_dts_updates_v6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: altera: Remove unused and undocumented "snps,max-mtu" property
  arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id
  arm64: dts: socfpga: agilex: Add VGIC maintenance interrupt
  arm: dts: socfpga: use reset-name "stmmaceth-ocp" instead of "ahb"
  ARM: dts: socfpga_cyclone5_mcvevk: Drop unused #address-cells/#size-cells

Link: https://lore.kernel.org/r/20250103023012.1268627-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-01-16 14:39:10 +01:00
5 changed files with 29 additions and 7 deletions

View File

@@ -440,7 +440,7 @@ gmac0: ethernet@ff800000 {
clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
clock-names = "stmmaceth", "ptp_ref";
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
reset-names = "stmmaceth", "stmmaceth-ocp";
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
@@ -460,7 +460,7 @@ gmac1: ethernet@ff802000 {
clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
clock-names = "stmmaceth", "ptp_ref";
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
reset-names = "stmmaceth", "stmmaceth-ocp";
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
@@ -480,7 +480,7 @@ gmac2: ethernet@ff804000 {
clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
clock-names = "stmmaceth", "ptp_ref";
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
reset-names = "stmmaceth", "stmmaceth-ocp";
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};

View File

@@ -50,8 +50,6 @@ &i2c0 {
stmpe1: stmpe811@41 {
compatible = "st,stmpe811";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41>;
id = <0>;
blocks = <0x5>;

View File

@@ -63,7 +63,6 @@ &gmac0 {
status = "okay";
phy-mode = "rgmii";
phy-addr = <0xffffffff>;
snps,max-mtu = <0x0>;
};
&gmac1 {

View File

@@ -101,10 +101,13 @@ intc: interrupt-controller@fffc1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
interrupt-parent = <&intc>;
reg = <0x0 0xfffc1000 0x0 0x1000>,
<0x0 0xfffc2000 0x0 0x2000>,
<0x0 0xfffc4000 0x0 0x2000>,
<0x0 0xfffc6000 0x0 0x2000>;
/* VGIC maintenance interrupt */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
clocks {

View File

@@ -222,6 +222,26 @@ i3c1: i3c@10da1000 {
status = "disabled";
};
gpio0: gpio@ffc03200 {
compatible = "snps,dw-apb-gpio";
reg = <0xffc03200 0x100>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&rst GPIO0_RESET>;
status = "disabled";
porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <24>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
};
};
gpio1: gpio@10c03300 {
compatible = "snps,dw-apb-gpio";
reg = <0x10c03300 0x100>;
@@ -314,7 +334,7 @@ spi0: spi@10da4000 {
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>;
dmas = <&dmac0 2>, <&dmac0 3>;
dmas = <&dmac0 16>, <&dmac0 17>;
dma-names = "tx", "rx";
status = "disabled";
@@ -331,6 +351,8 @@ spi1: spi@10da5000 {
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>;
dmas = <&dmac0 20>, <&dmac0 21>;
dma-names = "tx", "rx";
status = "disabled";
};