Commit Graph

1308807 Commits

Author SHA1 Message Date
Dmitry Baryshkov
1dd7d9d41d arm64: dts: qcom: sda660-ifc6560: fix l10a voltage ranges
L10A, being a fixed regulator, should have min_voltage = max_voltage,
otherwise fixed rulator fails to probe. Fix the max_voltage range to be
equal to minimum.

Fixes: 4edbcf264f ("arm64: dts: qcom: sda660-ifc6560: document missing USB PHY supplies")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240907-sdm660-wifi-v1-4-e316055142f8@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06 21:24:07 -05:00
Dmitry Baryshkov
deac51aedd arm64: dts: qcom: sda660-ifc6560: enable GPU
Enable Adreno GPU on the Inforce IFC6560 SBC. It requires the Zap shader
binary that was provided by the vendor.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240907-sdm660-wifi-v1-3-e316055142f8@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06 21:24:07 -05:00
Dmitry Baryshkov
166b955a8d arm64: dts: qcom: sdm630: enable GPU SMMU and GPUCC
Now as the arm-smmu-qcom driver gained workarounds for the Adreno SMMU,
it becomes possible to safely enable GPU on the devices. Enable GPU SMMU
and GPU clock controller. GPU should be enabled for target devices that
have ZAP shader blob.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240907-sdm660-wifi-v1-2-e316055142f8@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06 21:24:07 -05:00
Luca Weiss
73f9c18c34 arm64: dts: qcom: qcm6490-fairphone-fp5: Add thermistor for UFS/RAM
Configure the ADC and thermal zone for the thermistor next to the
UFS+RAM chip which is connected to GPIO_12 of PM7250B. It is used to
measure the temperature of that area of the PCB.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20241002-fp5-ufs-therm-v1-1-1d2d8c1f08b5@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:24:10 -05:00
Luca Weiss
600c499f8f arm64: dts: qcom: sm6350: Fix GPU frequencies missing on some speedbins
Make sure the GPU frequencies are marked as supported for the respective
speedbins according to downstream msm-4.19 kernel:

* 850 MHz: Speedbins 0 + 180
* 800 MHz: Speedbins 0 + 180 + 169
* 650 MHz: Speedbins 0 + 180 + 169 + 138
* 565 MHz: Speedbins 0 + 180 + 169 + 138 + 120
* 430 MHz: Speedbins 0 + 180 + 169 + 138 + 120
* 355 MHz: Speedbins 0 + 180 + 169 + 138 + 120
* 253 MHz: Speedbins 0 + 180 + 169 + 138 + 120

Fixes: bd9b767502 ("arm64: dts: qcom: sm6350: Add GPU nodes")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20241002-sm6350-gpu-speedbin-fix-v1-1-8a5d90c5097d@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:24:02 -05:00
Jérôme de Bretagne
f6231a2eef arm64: dts: qcom: sc8280xp: Add Microsoft Surface Pro 9 5G
Add an initial devicetree for the Microsoft Surface Pro 9 5G, based
on SC8280XP.

It enables the support for Wi-Fi, NVMe, the two USB Type-C ports,
Bluetooth, 5G cellular modem, audio output (via Bluetooth headsets
or USB audio), external display via DisplayPort over Type-C (only
the bottom USB Type-C port is working so far), charging, the Surface
Aggregator Module (SAM) to get keyboard and touchpad working with
Surface Type Cover accessories.

Some key features not supported yet:
- built-in display (but software fallback is working with efifb
  when blacklisting the msm module)
- built-in display touchscreen
- external display with the top USB Type-C port
- speakers and microphones
- physical volume up and down keys
- LID switch detection

This devicetree is based on the other SC8280XP ones, for the Lenovo
ThinkPad X13s and the Qualcomm CRD.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jérôme de Bretagne <jerome.debretagne@gmail.com>
Link: https://lore.kernel.org/r/20240908223505.21011-6-jerome.debretagne@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:20:46 -05:00
Jérôme de Bretagne
1e70551123 arm64: dts: qcom: sc8280xp: Add uart18
Add the node describing uart18 for sc8280xp devices.

Signed-off-by: Jérôme de Bretagne <jerome.debretagne@gmail.com>
Link: https://lore.kernel.org/r/20240908223505.21011-5-jerome.debretagne@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:20:46 -05:00
Jérôme de Bretagne
e221af1659 dt-bindings: arm: qcom: Document Microsoft Surface Pro 9 5G
Add compatible for the SC8280XP-based Microsoft Surface Pro 9 5G,
using its Arcata codename.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jérôme de Bretagne <jerome.debretagne@gmail.com>
Link: https://lore.kernel.org/r/20240908223505.21011-2-jerome.debretagne@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:20:46 -05:00
Krzysztof Kozlowski
8a77bb1e14 arm64: dts: qcom: minor whitespace cleanup
The DTS code coding style expects exactly one space around '='
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240905-dts-cleanup-v1-4-f4c5f7b2c8c2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:18:59 -05:00
Krzysztof Kozlowski
5046893176 arm64: dts: qcom: drop underscore in node names
Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens.

Functional impact checked with comparing before/after DTBs with dtx_diff
and fdtdump.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240905-dts-cleanup-v1-3-f4c5f7b2c8c2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:18:59 -05:00
Konrad Dybcio
facead4ce0 arm64: dts: qcom: x1e80100-romulus: Set up USB Multiport controller
The USB MP controller is wired up to the USB-A port on the left side
and to the Surface Connector on the right side. Configure it.

While at it, remove a stray double \n.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240902-topic-sl7_updates-v1-2-3ee667e6652d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:15:27 -05:00
Konrad Dybcio
86d402355e arm64: dts: qcom: x1e80100-romulus: Add lid switch
One of the best parts of having a laptop is being able to close the lid
and go on with your day. Enable this feature by defining the lid switch.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240902-topic-sl7_updates-v1-1-3ee667e6652d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:15:27 -05:00
Danila Tikhonov
89f324ef54 arm64: dts: qcom: sc7280: Fix PMU nodes for Cortex A55 and A78
The SC7280, SM7325, and QCM6490 platforms feature an 8-core setup
consisting of:
- 1x Kryo 670 Prime (Cortex-A78) / Kryo 670 Gold Plus (Cortex-A78)
- 3x Kryo 670 Gold (Cortex-A78)
- 4x Kryo 670 Silver (Cortex-A55)
(The CPU cores in the SC7280 are simply called Kryo, but are
nevertheless based on the same Cortex A78 and A55).

Use the correct compatibility.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20240818192905.120477-1-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:06:55 -05:00
Maya Matuszczyk
4c3d9c1348 arm64: dts: qcom: x1e80100: Add debug uart to Lenovo Yoga Slim 7x
This commit enables the debug UART found on the motherboard under the SSD

Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Link: https://lore.kernel.org/r/20241004192436.16195-2-maccraft123mc@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:03:11 -05:00
Johan Hovold
8beaf6e08d arm64: dts: qcom: x1e80100: describe tcsr download mode register
Describe the TCSR download mode register to enable download mode
control.

This specifically allows the OS to disable download mode in case the
boot firmware has left it enabled to avoid entering the crash dump mode
after a hypervisor reset by default.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241002100122.18809-3-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:58:02 -05:00
Vedang Nagar
17a809b35d arm64: dts: qcom: qcs6460-rb3gen2: enable venus node
Enable the venus node on Qualcomm Rb3gen2 so that the
video decoder will start working.

Signed-off-by: Vedang Nagar <quic_vnagar@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240917-venus_rb3_gen2-v1-1-8fea70733592@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:53:36 -05:00
Konrad Dybcio
5207d9c75f arm64: dts: qcom: x1e80100: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-11-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:56 -05:00
Konrad Dybcio
c9ab665276 arm64: dts: qcom: sm8450: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-10-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:56 -05:00
Konrad Dybcio
051ff563cb arm64: dts: qcom: sm8350: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-9-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:56 -05:00
Konrad Dybcio
05bd9923d1 arm64: dts: qcom: sm8150: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-8-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:56 -05:00
Konrad Dybcio
7abe72765d arm64: dts: qcom: sm6350: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-7-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:56 -05:00
Konrad Dybcio
6b31a9744b arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-6-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:56 -05:00
Konrad Dybcio
e009473c5f arm64: dts: qcom: sdm670: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-5-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:55 -05:00
Konrad Dybcio
2b73b83cb8 arm64: dts: qcom: sc8280xp: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-4-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:55 -05:00
Konrad Dybcio
57222f077b arm64: dts: qcom: sc8180x: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-3-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:55 -05:00
Konrad Dybcio
3d89c19840 arm64: dts: qcom: sc7180: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-2-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:55 -05:00
Konrad Dybcio
7a52db70c8 arm64: dts: qcom: qdu1000: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-1-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:52:55 -05:00
Sachin Gupta
c17818a429 arm64: dts: qcom: qcs6490-rb3gen2: Add SD Card node
Add SD Card node for Qualcomm qcs6490-rb3gen2 Board.

Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240919084826.1117-1-quic_sachgupt@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:50:54 -05:00
Vladimir Zapolskiy
7bce7fa277 arm64: dts: qcom: sm8650-qrd: remove status property from dispcc device tree node
After a change enabling display clock controller for all Qualcomm SM8650
powered board by default there is no more need to set a status property
of dispcc on SM8650-QRD board.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-10-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:41 -05:00
Vladimir Zapolskiy
615ce95458 arm64: dts: qcom: sm8650-mtp: remove status property from dispcc device tree node
After a change enabling display clock controller for all Qualcomm SM8650
powered board by default there is no more need to set a status property
of dispcc on SM8650-MTP board.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-9-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:41 -05:00
Vladimir Zapolskiy
5a93da0424 arm64: dts: qcom: sm8650-hdk: remove status property from dispcc device tree node
After a change enabling display clock controller for all Qualcomm SM8650
powered board by default there is no more need to set a status property
of dispcc on SM8650-HDK board.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-8-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Vladimir Zapolskiy
959176141e arm64: dts: qcom: sm8650: don't disable dispcc by default
Enable display clock controller for all Qualcomm SM8650 powered boards
by default.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-7-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Vladimir Zapolskiy
c9c87512a5 arm64: dts: qcom: sm8450-hdk: remove status property from dispcc device tree node
After a change enabling display clock controller for all Qualcomm SM8450
powered board by default there is no more need to set a status property
of dispcc on SM8450-HDK board.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-6-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Vladimir Zapolskiy
c014190967 arm64: dts: qcom: sm8450: don't disable dispcc by default
Enable display clock controller for all Qualcomm SM8450 powered boards
by default.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-5-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Vladimir Zapolskiy
30326d120a arm64: dts: qcom: sm8450-sony-xperia-nagara: disable dispcc on derived boards
A platform display clock controller is expected to be enabled by default
for all boards, however in particular cases preset display clock setting
is expected. To avoid any probable regression before enabling display
clock controller for all SM8450 platforms disable it for SM8450 powered
Sony Xperia phones.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-4-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Vladimir Zapolskiy
23be31bdf0 arm64: dts: qcom: sm8450-qrd: explicitly disable dispcc on the board
A platform display clock controller is expected to be enabled by default
for all boards, however in particular cases preset display clock setting
is expected. To avoid any probable regression before enabling display
clock controller for all SM8450 platforms disable it for SM8450-QRD board
only.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-3-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Vladimir Zapolskiy
4bd9b84e09 arm64: dts: qcom: sm8350-hdk: remove a blank overwrite of dispcc node status
According to the description of dispcc device tree node from sm8350.dtsi
there is no need to set a status property value to enable the display clock
controller.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-2-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 21:05:40 -05:00
Arnaud Vrac
2150c87db8 arm64: dts: qcom: msm8998: add HDMI nodes
Add HDMI controller and PHY nodes, ported from vendor code.

Signed-off-by: Arnaud Vrac <avrac@freebox.fr>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Link: https://lore.kernel.org/r/20240724-hdmi-tx-v7-6-e44a20553464@freebox.fr
[bjorn: Updated commit message]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 20:53:26 -05:00
Marc Gonzalez
1b97f00d1b arm64: dts: qcom: msm8998: add HDMI GPIOs
MSM8998 GPIO pin controller reference design defines:

- CEC: pin 31
- DDC: pin 32,33
- HPD: pin 34

Downstream vendor code for reference:

https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400

mdss_hdmi_{cec,ddc,hpd}_{active,suspend}

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Link: https://lore.kernel.org/r/20240724-hdmi-tx-v7-5-e44a20553464@freebox.fr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-02 21:45:47 -05:00
Dmitry Baryshkov
0f6c6ae2e9 arm64: dts: qcom: qcm6490-rb3gen2: enable WiFi
Enable WiFi device and specify the calibration variant name on the
RB3gen2 device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-4-eb9da98e9f80@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-09-30 21:51:10 -05:00
Dmitry Baryshkov
afa11181fa arm64: dts: qcom: qcm6490-idp: enable WiFi
Enable WiFi device and specify the calibration variant name on the
QCM6490 IDP device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-3-eb9da98e9f80@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-09-30 21:51:10 -05:00
Dmitry Baryshkov
94d5ffab9d arm64: dts: qcom: sc7280: don't enable GPU on unsupported devices
On SC7280 and derivative platforms GPU by default requires a signed
binary, a660_zap.mbn. Disable GPU by default and enable it only when
the binary is actually available (QCM6490-IDP, RB3gen2). ChromeOS
devices do not use TrustZone, so GPU can be enabled by default in
sc7280-chrome-common.dtsi. FairPhone5 and SHIFTphone8 DTS already
enable GPU (even though it wasn't required beforehand).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-2-eb9da98e9f80@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-09-30 21:51:10 -05:00
Dmitry Baryshkov
6317aad0e1 arm64: dts: qcom: qcs6390-rb3gen2: use modem.mbn for modem DSP
Newer boards should always use squashed MBN firmware instead of split
MDT+bNN. Use qcom/qcs6490/modem.mbn as the firmware for the modem on
RB3gen2.

Fixes: ac6d35b9b7 ("arm64: dts: qcom: qcs6490-rb3gen2: Enable various remoteprocs")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-1-eb9da98e9f80@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-09-30 21:51:10 -05:00
Linus Torvalds
9852d85ec9 Linux 6.12-rc1 v6.12-rc1 2024-09-29 15:06:19 -07:00
Linus Torvalds
3f749befb0 x86: kvm: fix build error
The cpu_emergency_register_virt_callback() function is used
unconditionally by the x86 kvm code, but it is declared (and defined)
conditionally:

  #if IS_ENABLED(CONFIG_KVM_INTEL) || IS_ENABLED(CONFIG_KVM_AMD)
  void cpu_emergency_register_virt_callback(cpu_emergency_virt_cb *callback);
  ...

leading to a build error when neither KVM_INTEL nor KVM_AMD support is
enabled:

  arch/x86/kvm/x86.c: In function ‘kvm_arch_enable_virtualization’:
  arch/x86/kvm/x86.c:12517:9: error: implicit declaration of function ‘cpu_emergency_register_virt_callback’ [-Wimplicit-function-declaration]
  12517 |         cpu_emergency_register_virt_callback(kvm_x86_ops.emergency_disable_virtualization_cpu);
        |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  arch/x86/kvm/x86.c: In function ‘kvm_arch_disable_virtualization’:
  arch/x86/kvm/x86.c:12522:9: error: implicit declaration of function ‘cpu_emergency_unregister_virt_callback’ [-Wimplicit-function-declaration]
  12522 |         cpu_emergency_unregister_virt_callback(kvm_x86_ops.emergency_disable_virtualization_cpu);
        |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Fix the build by defining empty helper functions the same way the old
cpu_emergency_disable_virtualization() function was dealt with for the
same situation.

Maybe we could instead have made the call sites conditional, since the
callers (kvm_arch_{en,dis}able_virtualization()) have an empty weak
fallback.  I'll leave that to the kvm people to argue about, this at
least gets the build going for that particular config.

Fixes: 590b09b1d8 ("KVM: x86: Register "emergency disable" callbacks when virt is enabled")
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>
Cc: Kai Huang <kai.huang@intel.com>
Cc: Chao Gao <chao.gao@intel.com>
Cc: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-09-29 14:47:33 -07:00
Linus Torvalds
e7ed343658 Merge tag 'mailbox-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox
Pull mailbox updates from Jassi Brar:

 - fix kconfig dependencies (mhu-v3, omap2+)

 - use devie name instead of genereic imx_mu_chan as interrupt name
   (imx)

 - enable sa8255p and qcs8300 ipc controllers (qcom)

 - Fix timeout during suspend mode (bcm2835)

 - convert to use use of_property_match_string (mailbox)

 - enable mt8188 (mediatek)

 - use devm_clk_get_enabled helpers (spreadtrum)

 - fix device-id typo (rockchip)

* tag 'mailbox-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox:
  mailbox, remoteproc: omap2+: fix compile testing
  dt-bindings: mailbox: qcom-ipcc: Document QCS8300 IPCC
  dt-bindings: mailbox: qcom-ipcc: document the support for SA8255p
  dt-bindings: mailbox: mtk,adsp-mbox: Add compatible for MT8188
  mailbox: Use of_property_match_string() instead of open-coding
  mailbox: bcm2835: Fix timeout during suspend mode
  mailbox: sprd: Use devm_clk_get_enabled() helpers
  mailbox: rockchip: fix a typo in module autoloading
  mailbox: imx: use device name in interrupt name
  mailbox: ARM_MHU_V3 should depend on ARM64
2024-09-29 09:53:04 -07:00
Linus Torvalds
907537f570 Merge tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:

 - fix DesignWare driver ENABLE-ABORT sequence, ensuring ABORT can
   always be sent when needed

 - check for PCLK in the SynQuacer controller as an optional clock,
   allowing ACPI to directly provide the clock rate

 - KEBA driver Kconfig dependency fix

 - fix XIIC driver power suspend sequence

* tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: xiic: Fix pm_runtime_set_suspended() with runtime pm enabled
  i2c: keba: I2C_KEBA should depend on KEBA_CP500
  i2c: synquacer: Deal with optional PCLK correctly
  i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled
2024-09-29 09:47:33 -07:00
Linus Torvalds
b81b78dacc Merge tag 'dma-mapping-6.12-2024-09-29' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping fix from Christoph Hellwig:

 - handle chained SGLs in the new tracing code (Christoph Hellwig)

* tag 'dma-mapping-6.12-2024-09-29' of git://git.infradead.org/users/hch/dma-mapping:
  dma-mapping: fix DMA API tracing for chained scatterlists
2024-09-29 09:35:10 -07:00
Linus Torvalds
3ed7df0852 Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull more SCSI updates from James Bottomley:
 "These are mostly minor updates.

  There are two drivers (lpfc and mpi3mr) which missed the initial
  pull and a core change to retry a start/stop unit which affect
  suspend/resume"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (32 commits)
  scsi: lpfc: Update lpfc version to 14.4.0.5
  scsi: lpfc: Support loopback tests with VMID enabled
  scsi: lpfc: Revise TRACE_EVENT log flag severities from KERN_ERR to KERN_WARNING
  scsi: lpfc: Ensure DA_ID handling completion before deleting an NPIV instance
  scsi: lpfc: Fix kref imbalance on fabric ndlps from dev_loss_tmo handler
  scsi: lpfc: Restrict support for 32 byte CDBs to specific HBAs
  scsi: lpfc: Update phba link state conditional before sending CMF_SYNC_WQE
  scsi: lpfc: Add ELS_RSP cmd to the list of WQEs to flush in lpfc_els_flush_cmd()
  scsi: mpi3mr: Update driver version to 8.12.0.0.50
  scsi: mpi3mr: Improve wait logic while controller transitions to READY state
  scsi: mpi3mr: Update MPI Headers to revision 34
  scsi: mpi3mr: Use firmware-provided timestamp update interval
  scsi: mpi3mr: Enhance the Enable Controller retry logic
  scsi: sd: Fix off-by-one error in sd_read_block_characteristics()
  scsi: pm8001: Do not overwrite PCI queue mapping
  scsi: scsi_debug: Remove a useless memset()
  scsi: pmcraid: Convert comma to semicolon
  scsi: sd: Retry START STOP UNIT commands
  scsi: mpi3mr: A performance fix
  scsi: ufs: qcom: Update MODE_MAX cfg_bw value
  ...
2024-09-29 09:22:34 -07:00
Linus Torvalds
9f9a534724 Merge tag 'bcachefs-2024-09-28' of git://evilpiepirate.org/bcachefs
Pull more bcachefs updates from Kent Overstreet:
 "Assorted minor syzbot fixes, and for bigger stuff:

  Fix two disk accounting rewrite bugs:

   - Disk accounting keys use the version field of bkey so that journal
     replay can tell which updates have been applied to the btree.

     This is set in the transaction commit path, after we've gotten our
     journal reservation (and our time ordering), but the
     BCH_TRANS_COMMIT_skip_accounting_apply flag that journal replay
     uses was incorrectly skipping this for new updates generated prior
     to journal replay.

     This fixes the underlying cause of an assertion pop in
     disk_accounting_read.

   - A couple of fixes for disk accounting + device removal.

     Checking if acocunting replicas entries were marked in the
     superblock was being done at the wrong point, when deltas in the
     journal could still zero them out, and then additionally we'd try
     to add a missing replicas entry to the superblock without checking
     if it referred to an invalid (removed) device.

  A whole slew of repair fixes:

   - fix infinite loop in propagate_key_to_snapshot_leaves(), this fixes
     an infinite loop when repairing a filesystem with many snapshots

   - fix incorrect transaction restart handling leading to occasional
     "fsck counted ..." warnings

   - fix warning in __bch2_fsck_err() for bkey fsck errors

   - check_inode() in fsck now correctly checks if the filesystem was
     clean

   - there shouldn't be pending logged ops if the fs was clean, we now
     check for this

   - remove_backpointer() doesn't remove a dirent that doesn't actually
     point to the inode

   - many more fsck errors are AUTOFIX"

* tag 'bcachefs-2024-09-28' of git://evilpiepirate.org/bcachefs: (35 commits)
  bcachefs: check_subvol_path() now prints subvol root inode
  bcachefs: remove_backpointer() now checks if dirent points to inode
  bcachefs: dirent_points_to_inode() now warns on mismatch
  bcachefs: Fix lost wake up
  bcachefs: Check for logged ops when clean
  bcachefs: BCH_FS_clean_recovery
  bcachefs: Convert disk accounting BUG_ON() to WARN_ON()
  bcachefs: Fix BCH_TRANS_COMMIT_skip_accounting_apply
  bcachefs: Check for accounting keys with bversion=0
  bcachefs: rename version -> bversion
  bcachefs: Don't delete unlinked inodes before logged op resume
  bcachefs: Fix BCH_SB_ERRS() so we can reorder
  bcachefs: Fix fsck warnings from bkey validation
  bcachefs: Move transaction commit path validation to as late as possible
  bcachefs: Fix disk accounting attempting to mark invalid replicas entry
  bcachefs: Fix unlocked access to c->disk_sb.sb in bch2_replicas_entry_validate()
  bcachefs: Fix accounting read + device removal
  bcachefs: bch_accounting_mode
  bcachefs: fix transaction restart handling in check_extents(), check_dirents()
  bcachefs: kill inode_walker_entry.seen_this_pos
  ...
2024-09-29 09:17:44 -07:00