This device-tree pxa update brings :
- pxa3xx fixes and updates
* tag 'pxa-dt-4.19' of https://github.com/rjarzmik/linux:
arm: dts: pxa3xx: Add ssp ports to pxa3xx device tree
arm: dts: pxa3xx: provide correct clk-names property for nand controller node
ARM: dts: pxa: add label to lcd controller node
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM64 changes for v4.19
Cleanup from old properties and code-style warnings.
* tag 'samsung-dt64-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Remove leading 0x from unit addresses in Exynos5433
arm64: dts: exynos: Remove no longer needed samsung thermal properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM changes for v4.19
1. Add two new S5Pv210 boards: Samsung Galaxy S and Samsung Galaxy S 4G
mobile phones. Both are from family codenamed Aries. The Samsung
Galaxy S was released on the market in 2010 with Android operating
system. At that time, it was the Samsung's flagship model.
This brings support for storage (SD card and internal memory), PMIC,
RTC, fuel-gauge, keys, USB (in peripherial mode) and WiFi.
2. Add missing secondary CPU properties.
3. Cleanup from old files and properties.
* tag 'samsung-dt-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: samsung: Document bindings for SGH-T959P board
dt-bindings: samsung: Document bindings for Samsung aries boards
ARM: dts: s5pv210: Add initial DTS for SGH-T959P phone
ARM: dts: s5pv210: Add initial DTS for Samsung Galaxy S phone
ARM: dts: s5pv210: Add initial DTS for Samsung Aries based phones
ARM: dts: s5pv210: Add missing interrupt-controller property to gph2
ARM: dts: exynos: remove no longer needed samsung thermal properties
dt-bindings: arm: Remove obsolete insignal-boards.txt
ARM: dts: exynos: Add missing CPU clocks to secondary CPUs on Exynos542x
arm: dts: exynos: Add missing cooling device properties for CPUs
Signed-off-by: Olof Johansson <olof@lixom.net>
arm64: tegra: Device tree changes for v4.19-rc1
These changes enable the GPIO controllers on Tegra194 SoCs, which in
turn allows the SD card detection and ethernet controllers to be enabled
as well. The Tegra194 device tree is also extended with the list of CPUs
and a PSCI node to inform the kernel about the presence of PSCI capable
firmware.
* tag 'tegra-for-4.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add CPU nodes to Tegra194 device tree
arm64: tegra: Add ethernet controller on Tegra194
arm64: tegra: Enable card detect for SD card on P2888
arm64: tegra: Add GPIO controller on Tegra194
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: tegra: Device tree changes for v4.19-rc1
This set of changes adds support for the memory client resets on Tegra20
and Tegra30, fixes a couple of issues on Cardhu and Tegra30 Apalis as
well as adds a unit-address to the memory node to avoid warnings from
DTC. To round things of, the NAND flash controller is enabled on the
Tegra20 Colibri.
* tag 'tegra-for-4.19-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: enable NAND flash on Colibri T20
ARM: dts: tegra: add Tegra20 NAND flash controller node
ARM: tegra: Work safely with 256 MB Colibri-T20 modules
ARM: tegra: Fix unit_address_vs_reg and avoid_unnecessary_addr_size DTC warnings
ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memory
ARM: tegra: Remove usage of deprecated skeleton.dtsi
ARM: tegra: Fix can2 on Tegra30 Apalis
ARM: tegra: Fix Tegra30 Cardhu PCA954x reset
ARM: dts: tegra30: Add Memory Client reset to VDE
ARM: dts: tegra20: Add Memory Client reset to VDE
Signed-off-by: Olof Johansson <olof@lixom.net>
dt-bindings: tegra: Changes for v4.19-rc1
This contains a single update that adds the Carmel CPU found in Tegra194
SoCs to the arm/cpus.txt device tree bindings.
* tag 'tegra-for-4.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: Add compatible string for NVIDIA Carmel
Signed-off-by: Olof Johansson <olof@lixom.net>
dts changes for mcan for omaps for v4.19 merge window
These changes configure the mcan clock, interconnect target
module and mcan device. These changes depend on the ti-sysc
related driver changes and are based on those.
Notably this is the first new driver that probes with ti-sysc
driver with no legacy hwmod platform data for the interconnect
target module.
* tag 'omap-for-v4.19/dt-mcan-v2-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra76x: Add MCAN node
ARM: dts: Add generic interconnect target module node for MCAN
ARM: dts: dra762: Add MCAN clock support
bus: ti-sysc: Add support for software reset
bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x
clk: ti: dra7: Add clkctrl clock data for the mcan clocks
bus: ti-sysc: Use 2-factor allocator arguments
Signed-off-by: Olof Johansson <olof@lixom.net>
dts changes for omaps for v4.19 merge window
Mostly updates to configure and improve the devices
found on various SoCs and boards:
- several patches to update support for am3517-evm
to replace bogus fixed regulators with proper
regulators and configure various devices such
as wlan, bluetooth and usb1
- add missing cooling devices for omap5 and dra7
- configure dual role for usb ports for am57xx
and dra7
- PM updates for omap4 devices to allow retention
idle for minimal configurations
- am335x-sl50 updates for various devices
- update d-can alias names to not use undescore
- configure pandaboard gpio button
- a non-urgent change to fix dcan node address that
i forgot to send a pull request for earlier
* tag 'omap-for-v4.19/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
ARM: dts: pandaboard: add gpio user button
ARM: dts: am3517-evm: Add 'vdd_io_reg' regulator references
ARM: dts: am3517-evm: Enable USB1 Host
ARM: dts: am33xx: Fix syntax of alias names
ARM: dts: am3517-som: Add builtin Bluetooth
ARM: dts: am3517-som: Add WL127x Wifi
ARM: dts: am335x-sl50: enable tsadc on SL50 board
ARM: dts: am335x-sl50: fix label names for all LEDs
ARM: dts: am335x-sl50: use audio-graph-card for sound
ARM: dts: am335x-sl50: add support for DS1339 Real Time Clock
ARM: dts: am335x-sl50: set dr_mode to otg
ARM: dts: am335x-sl50: add a node for the LCD controller
ARM: dts: am335x-sl50: use phy-phandle declarations
ARM: dts: am335x-sl50: update backlight nodes
ARM: dts: omap4-droid4: Use software debounce for gpio-keys
ARM: dts: Configure duovero for to allow core retention during idle
ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt
ARM: dts: dra76-evm: Add VBUS GPIO to USB1/USB2 extcon
ARM: dts: dra71-evm: Add VBUS GPIO to USB1/USB2 extcon
ARM: dts: dra7-evm: Add extcon to USB2 port
...
Signed-off-by: Olof Johansson <olof@lixom.net>
DaVinci Device-Tree updates for v4.19
-------------------------------------
* DA850 now uses clocks from device-tree
* DA850 EVM gains LCD (with backlight) and SATA support
* Lego Mindstorms gains bluetooth support
* DSP reset control support on DA850
* tag 'davinci-for-v4.19/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850: Add power-domains to CPPI 4.1 node
ARM: davinci: dts: add a reset control to the dsp node
ARM: davinci: dts: make psc0 a reset provider
ARM: dts: da850-lego-ev3: Add Bluetooth nodes
ARM: dts: da850: Add power-domains to PWM nodes
ARM: dts: da850: Add clocks
dt-bindings: timer: new bindings for TI DaVinci timer
ARM: dts: da850-evm: Enable LCD and backlight
ARM: dts: da850-evm: Enable SATA port
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.19, please pull the following:
- Scott does a bunch of updates to the Stingray DTS and DTS include
files to better support the addition of new boards. Scott also adds
the Stingray OTP Device Tree node
- Pramod updates the Stingray clocks such that they match the latest
revision of the ASIC and datasheets
- Ray sets the Stingray initial watchdog timeout to 60 seconds to give
sufficient time for the kernel to boot and then adds PAXC (internal
PCIe) support to the Stingray base DTS files
- Vladimir adds support for the Stingray smart NIC PS225 boards variants
* tag 'arm-soc/for-4.19/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: stingray: add bcm958802a802x dts
arm64: dts: stingray: add PAXC support
arm64: dts: set initial SR watchdog timeout to 60 seconds
arm64: dts: Update Stingray clock DT nodes
arm64: dts: stingray: Add OTP device node
arm64: dts: stingray: move common board components to stingray-board-base
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 4.19, please pull the following:
- Clement adds ethernet aliases to the Cygnus DTS include file such that
a DT aware bootloader such as u-boot can properly insert MAC addresses
- Mohamed adds a Device Tree node for the HWRNG found on Cygnus SoCs
- Vivek migrates all the BCM5301x (Northstar) Device Tree sources to use
the proper USB 3.0 PHY representation using its parent MDIO bus.
Vivek also completes the Linksys EA9500 Device Tree by adding support
for LEDs, internal and external switches.
- Rafal adds the ARM architected timer to the BCM53573 Device Tree
include file.
- Eric adds the Performance Monitoring Unit to the BCM2837 DTS include
file since it was absent before
- Boris adds the BCM283x transposer block to the Device Tree
- Stefan adds the Raspberry Pi Compute Module (CM1) Device Tree include
and sources.
* tag 'arm-soc/for-4.19/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Add support for Linksys EA9500
ARM: dts: BCM53573: Add architected timer
ARM: dts: BCM5301X: Make USB 3.0 PHY use MDIO PHY driver
ARM: dts: cygnus: enable iproc-hwrng
ARM: dts: cygnus: add ethernet0 alias
ARM: dts: bcm283x: Add Transposer block
ARM: dts: bcm283x: Add the PMU to the devicetree.
ARM: dts: add Raspberry Pi Compute Module and IO board
Signed-off-by: Olof Johansson <olof@lixom.net>
SPDX conversion for existing devicetree files. New board is Gru-Bob
the Chromebook Flip C101PA which also got some stuff moved around
to make room for Scarlet once its display pipeline makes some more
advances.
Also included are some general sound improvements for rk3399
including enabling hdmi-sound on the sapphire board and some
misc fixes like missing cooling device properties and wrong
clock-names for the uart1 on rk3328.
* tag 'v4.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: corrected uart1 clock-names for rk3328
arm64: dts: rockchip: add Google Bob
arm64: dts: rockchip: move core edp from rk3399-kevin to shared chromebook
arm64: dts: rockchip: move Chromebook-specific Gru-parts to a separate file
arm64: dts: rockchip: add phandles to some nodes on rk3399-gru
arm64: dts: rockchip: add some common pin-settings to rk3399
arm64: dts: rockchip: generalize rk3399 #sound-dai-cells
arm64: dts: rockchip: Add missing cooling device properties for CPUs
arm64: dts: rockchip: enable hdmi sound on rk3399-sapphire
arm64: dts: rockchip: connect hdmi sound in rk3399
arm64: dts: rockchip: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>
SPDX conversion for existing Rockchip devicetree files as well
as conversion of rk3288 to OPPv2 to facilitate the addition of
missing cpu-cooling-device properties.
* tag 'v4.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add missing cooling device properties for CPUs on rk3288
ARM: dts: rockchip: convert rk3288 to operating-points-v2
ARM: dts: rockchip: Add missing cooling device properties for CPUs on rk322x
ARM: dts: rockchip: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the MCAN peripheral which supports both classic
CAN messages along with the new CAN-FD message.
Add MCAN node to evm and enable it with a maximum datarate of 5 mbps
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ti-sysc driver provides support for manipulating the idle modes
and interconnect level resets.
Add the generic interconnect target module node for MCAN to support
the same.
CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other
DPLL dividers this DPLL_GMAC H14 divider is controlled by
control module. Adding support for these clocks.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the power-domains property to CPPI 4.1 node.
The CPPI 4.1 DMA driver uses pm_runtime to manage the clocks,
so it needs this property in order to find and enable the clock
properly.
Reviewed-by: David Lechner <david@lechnology.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add support for the software reset of a target interconnect
module using its sysconfig and sysstatus registers.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
[tony@atomide.com: updated to check if sysconfig exists]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dra76x MCAN generic interconnect module has a its own
format for the bits in the control registers.
Therefore add a new module type, new regbits and new capabilities
specific to the MCAN module.
Acked-by: Rob Herring <robh@kernel.org>
CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Set initial Stingray watchdog timeout to 60 seconds
By the time when the userspace watchdog daemon is ready and taking control
over, the watchdog timeout will then be reset to what's configured in the
daemon.
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This enables the on-module ONFI conformant NAND flash.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add basic controller device tree node to be extended by
individual boards. Use the assigned-clocks mechanism to set
NDFLASH clock to a sensible default rate of 150MHz.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM
(with 1024 MB NAND) flavors. Both of them will use the same DTSI
expecting the bootloader to do the fixup of /memory node. However in
case it does not happen, let's stay on safe side by limiting the memory
to 256 MB for both versions of Colibri-T20.
Rename to remove the unnecessary memory size from the device tree file
name. While at it, also follow the typical Toradex SoC, module, carrier
board hierarchy.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Remove unneeded address/size cells properties and unit addresses to fix
DTC warnings like:
arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (unit_address_vs_reg):
/i2c@7000d000/stmpe811@41/stmpe_touchscreen@0: node has a unit name, but no reg property
arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (avoid_unnecessary_addr_size):
/i2c@7000d000/stmpe811@41: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a generic /memory node in each Tegra DTSI (with empty reg property,
to be overidden by each DTS) and set proper unit address for /memory
nodes to fix the DTC warnings:
arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name
The DTB after the change is the same as before except adding
unit-address to /memory node.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Remove the usage of skeleton.dtsi because it was deprecated since commit
9c0da3cc61 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated").
It also allows later to fix DTC warnings for missing unit name in
/memory nodes.
Compiled DTBs are the same as before this commit.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This pull request brings in a board DT for the Raspberry Pi Compute
Module and its I/O board, the Pi3's PMU node, and the display's
transposer block.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It's a standard ARM architected timer that was simply missed when
initially adding this .dtsi file.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Currently, the USB 3.0 PHY in bcm5301x.dtsi uses platform driver which
requires register range "ccb-mii" <0x18003000 0x1000>. This range
overlaps with MDIO cmd and param registers (<0x18003000 0x8>).
Essentially, the platform driver partly acts like a MDIO bus driver,
hence to use of this register range.
In some Northstar devices like Linksys EA9500, secondary switch is
connected via external MDIO. The only way to access and configure the
external switch is via MDIO bus. When we enable the MDIO bus in it's
current state, the MDIO bus and any child buses fail to register because
of the register range overlap.
On Northstar, the USB 3.0 PHY is connected at address 0x10 on the
internal MDIO bus. This change moves the usb3_phy node and makes it a
child node of internal MDIO bus.
Thanks to Rafał Miłecki's commit af850e14a7 ("phy: bcm-ns-usb3: add
MDIO driver using proper bus layer") the same USB 3.0 platform driver
can now act as USB 3.0 PHY MDIO driver.
Tested on Linksys Panamera (EA9500)
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
In order to avoid Linux generating a random mac address on every boot,
add an ethernet0 alias that will allow u-boot to patch the dtb with
the MAC address.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The transposer block is allowing one to write the result of the VC4
composition back to memory instead of displaying it on a screen.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
This only probes on arm64 so far, but hopefully that driver will be
generalized soon.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
CAN2 currently fails on probe as follows:
mcp251x spi1.1: Probe failed, err=19
Fix this by enabling input on pin mux of resp. SPI4 pins.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
On all versions of Tegra30 Cardhu, the reset signal to the NXP PCA9546
I2C mux is connected to the Tegra GPIO BB0. Currently, this pin on the
Tegra is not configured as a GPIO but as a special-function IO (SFIO)
that is multiplexing the pin to an I2S controller. On exiting system
suspend, I2C commands sent to the PCA9546 are failing because there is
no ACK. Although it is not possible to see exactly what is happening
to the reset during suspend, by ensuring it is configured as a GPIO
and driven high, to de-assert the reset, the failures are no longer
seen.
Please note that this GPIO is also used to drive the reset signal
going to the camera connector on the board. However, given that there
is no camera support currently for Cardhu, this should not have any
impact.
Fixes: 40431d16ff ("ARM: tegra: enable PCA9546 on Cardhu")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PandaBoard has a user button connected to GPIO. On the ES this is connected
to GPIO 113, on all the other Panda editons this is GPIO 121.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are a few peripherals that generate some extra noise when they
don't have a regulator assigned to them. This patch assigns them to
their actual tps65023 regulator 'vdd_io_reg' (VDCDC2).
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hook up Memory Client reset of the Video Decoder to the decoders DT node.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Hook up Memory Client reset of the Video Decoder to the decoders DT node.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
After Kevin, the second chromebook-incarnation of the Gru series is Bob.
This materializes as the Asus Chromebook Flip C101PA, whose formfactor
is quite similar to Minnie from the Veyron series.
Add the devicetree file and binding update for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Bob needs the same backlight and core edp settings, so move these nodes to
the shared dtsi that both will use as a base.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Similar to rk3288-Veyron before, the Gru-series does contain Chromebook
(aka clamshell laptops) and non-Chromebook devices. And while the two
Chromebook devices Kevin and Bob are quite similar, Scarlet the tablet-
device is quite different in its design.
Therefore move the Chromebook parts into a gru-chromebook dtsi file
to make sharing easier.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some nodes will need to be refined on a per board level, so add phandles
to them to reference them later.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
