VRR is not supported on analog signals.
Don't add freesync modes to analog displays or when
VRR is unsupported by DC.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When the EDID of an analog display is not available, we can't
know the possible modes supported by the display. However, we
still need to offer the user to select from a variety of common
modes. It will be up to the user to select the best one, though.
This is how it works on other operating systems as well as the
legacy display code path in amdgpu.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This feature is useful for analog connections without EDID:
- Really old monitors with a VGA connector
- Cheap DVI/VGA adapters that don't connect DDC pins
When a connection is established through DAC load detection,
the driver is supposed to fill in the supported modes for the
display, which we already do in amdgpu_dm_connector_get_modes.
Also, because the load detection causes visible glitches, do not
attempt to poll the connector again after it was detected this
way. Note that it will still be polled after sleep/resume or
when force is enabled, which is okay.
v2:
Add dc_connection_dac_load connection type.
Properly release sink when no display is connected.
Don't print error when EDID isn't read from an analog display.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
DAC_LoadDetection can be used to determine whether something
is connected to an analog connector by determining if there is
an analog load. This causes visible flickering on displays, so
we only resort to using this when the connected display doesn't
have an EDID.
For reference, see the legacy display code:
amdgpu_atombios_encoder_dac_load_detect
v2:
Only clear corresponding bit from BIOS_SCRATCH_0.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The BIOS uses this register to write the results of the
DAC_LoadDetection command, so we'll need to read this
in order to make DAC load detection work.
As a reference, I used the mmBIOS_SCRATCH_0 definition from
the amdgpu legacy display code.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
VGA connectors don't support any hotplug detection, so the kernel
needs to periodically poll them to see if a display is connected.
DVI-I connectors have hotplug detection for digital signals, and
some analog DVI cables pull up that pin to work with that.
However, in general not all DVI cables do this so we can't rely on
this feature, therefore we need to poll DVI-I connectors as well.
v2:
Call drm_kms_helper_poll_fini in amdgpu_dm_hpd_fini.
Disable/enable polling on suspend/resume.
Don't call full link detection when already connected.
v3:
Encounter CLANG build failure. Remove unused variable:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_irq.c:980:7:
error: variable 'use_polling' set but not used [-Werror,-Wunused-but-
set-variable]
980 | bool use_polling = false;
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Analog displays typically have a DDC connection which can be
used by the GPU to read EDID. This commit adds the capability
to probe analog displays using DDC, reading the EDID header and
deciding whether the analog link is connected based on the data
that was read.
Note that VGA has no HPD (hotplug detection), so we need to
to do analog link detection for VGA before checking HPD.
In case of DVI-I, while the connector supports HPD, not all
analog cables connect the HPD pins, so we can't rely on HPD
either.
For reference, see the legacy display code:
amdgpu_connector_vga_detect
amdgpu_display_ddc_probe
DAC load detection will be implemented in a separate commit.
v2:
Fix crash / black screen on newer GPUs during link detection.
Ignore HPD pin for analog connectors.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The dce110_hwseq is used by all DCE hardware,
so add the DAC support here.
When enabling/disabling a stream for a RGB signal,
this will call the VBIOS to enable/disable the DAC.
Additionally, when applying the controller context,
call SelectCRTC_Source from VBIOS in order to
direct the CRTC output to the DAC.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We support two kinds of analog connections:
1. DVI-I, which allows both digital and analog signals:
The DC code base only allows 1 encoder per connector, and the
preferred engine type is still going to be digital. So, for DVI-I
to work, we need to make sure the pre-existing link encoder can
also work with analog signals.
1. VGA, which only supports analog signals:
For VGA, we need to create a link encoder that only works with the
DAC without perturbing any digital transmitter functionality.
Since dce110_link_encoder already supports analog DVI-I,
just reuse that code for VGA as well.
v2:
Reduce code churn by reusing same link encoder for VGA and DVI-I.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add analog stream encoders for DCE which will be used when
connecting an analog display through VGA or DVI-I.
Considering that all stream encoder functions currently deal
with digital streams, there is nothing for an analog stream
encoder to do, making them basically a no-op.
That being said, we still need some kind of stream encoder to
represent an analog stream, and it is beneficial to split them
from digital stream encoders in the code to make sure they
don't accidentally write any DIG* registers.
On supported chips there is currently up to 1 analog encoder,
which is DACA. There are references to DACB in some code such
as VBIOS commands and register files but it seems to be
not present on DCE 6 and newer.
Set num_analog_stream_encoder = 1 so that we can support
the analog connectors on DCE 6-10, for now.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add a num_analog_stream_encoders field to indicate how many
analog stream encoders are present. When analog stream encoders
are present, create them.
Additionally, add an analog_engine field to link encoders and
search for supported analog encoders in the BIOS for each link.
When connecting an RGB signal, search for analog stream encoders.
The actual DCE analog link and stream encoder is going to be
added in a subsequent commit.
v2:
Add check to see if an analog engine is really supported.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Avoid initializing DDC, HPD, etc. when we know that the link is
not going to be constructed because it has no supported encoders.
This is mainly useful for old GPUs which may have encoders such
as TRAVIS and NUTMEG that are not yet supported by DC.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
VGA connectors don't have HPD (hotplug detection), so don't
touch any HPD related registers for VGA.
Determine whether hotplug detection is available by checking that
the interrupt source is invalid.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Analog video signals on VGA or DVI-A (analog part of DVI-I)
don't support audio, so avoid calling any audio related
functions on analog signals.
Stereo sync was not set up for analog signals in the legacy
display code either, so there is no loss of functionality if
we omit it from DC for now.
Also add a dc_is_rgb_signal similar to other dc_is_*_signal.
v2:
Added comment to clarify what we mean by RGB in this context.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We will use this for validating the pixel clock when
an analog monitor is connected to VGA or DVI-I connectors.
For reference, see the legacy display code:
amdgpu_connector_vga_mode_valid
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The SelectCRTC_Source command will be used to change which CRTC
should be connected to which encoder.
For reference, see the legacy display code:
amdgpu_atombios_encoder_set_crtc_source
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Enable the codebase to use encoder_control()
when the encoder engine is one of the DACs.
The BIOS parser already supports calling the DAC1EncoderControl
function from the VBIOS, but it was not exposed anywhere.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We are going to support analog encoders as well, not just digital,
so we need to make space for them in various arrays.
v2: Fix typo.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The new analog bit will be used with DVI-I connectors.
DVI-I connectors can connect to both digital and analog monitors
and this bit will help distinguish between those.
v2:
Sanitize analog bit based on connector type.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
DC determines the DRM connector type based on the
signal type, which becomes problematic when a connector may
support different signal types, such as DVI-I.
With this patch, it is now determined according to the actual
connector type for DVI-D and DVI-I connectors.
Also set the HPD (hotplug detection) flag for DVI-I connectors
to prevent regressing their digital functionality, which has
been already working.
A subsequent commit will also implement polling for DVI-I.
v2:
Only use connector type for DVI to prevent regressions
for other signal types.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This version brings along following update:
- Fix incorrect return of vblank enable on unconfigured crtc
- Add HDR workaround for a specific eDP
- Make observers const-correct
- Add lock descriptor to check_update
- Update cursor offload assignments
- Add dc interface to log pre os firmware information
- Init dispclk from bootup clock for DCN315
- Remove dc param from check_update
- Update link encoder assignment
- Add more DC HW state info to underflow logging
- Rename dml2 to dml2_0 folder
- Fix notification of vtotal to DMU for cursor offload
- Fix wrong index for DCN401 cursor offload
- Add opp count validation to dml2.1
- Fix DMUB reset sequence for DCN32
- Bump minimum for frame_warn_limit
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Observers which do not modify their pointer arguments should take
them as const. This clearly signals their intent to the caller,
making it clear that the function is safe to call multiple times,
or remove the call if the result is no longer necessary.
[How]
Made const-correct all of the functions below:
* full_update_required[_weak]
* fast_updates_exist
* fast_update_only
* dc_can_clear_cursor_limit
* dc_stream_get_status (added const named overload)
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
DM locks the global DC lock during all updates, even if multiple
updates touch different resources and could be run in parallel.
[How]
Add extra enum specifying which kind of resources should be locked.
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
- Cursor lines per chunk must be assigned from hubp->att and not
hubp->pos (the one in hubp->pos is unassigned)
- In DCN401 DPP, cur0_enable in attribute struct must be assigned
as this is the field passed to DMU
- DCN401 should not program position in driver if offload is enabled
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Driver does not pick up and save vbios's clocks during init clocks,
the dispclk in clk_mgr will keep 0.
OS might change the timing (lower the pixel clock) after boot.
Then driver will set the dispclk to lower when safe_to_lower is false,
for in clk_mgr dispclk is zero, it's illegal and causes garbage.
[How]
Dump and save the vbios's clocks, and init the dispclk in
dcn315_init_clocks.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhongwei Zhang <Zhongwei.Zhang@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
dc_check_update_surfaces_for_stream should not have access to entire
DC, especially not a mutable one. Concurrent checks should be able
to run independently of one another, without risk of changing state.
[How]
* Replace dc and stream_status structs with new dc_check_config.
* Move required fields from dc_debug and dc_caps to dc_check_config.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Debugging underflow issues frequently requires knowing the
HW state at the time of underflow. To enable capturing this
HW state information, interface functions are needed for the
various DC HW blocks.
[How]
This change adds the interface functions to read HW state for
the following DC HW blocks:
- HUBBUB
- HUBP
- DPP
- MPC
- OPP
- DSC
- OPTC
- DCCG
Reviewed-by: George Shen <george.shen@amd.com>
Signed-off-by: Karen Chen <Karen.Chen@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
dml2 folder contains all logic for all versions of DML2
This is currently DML2.0 and DML2.1.
Rename dml2 to dml2_0 folder to reflect this better (dml2_0
for DML2.0).
[How]
Rename dml2 to dml2_0 folder and update dml2 references to
use dml2_0 folder.
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
Signed-off-by: waynelin <Wayne.Lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Payloads are ignored because the wrong index is written as part of the
pipe update implementation for DCN401.
[How]
Align it to the DCN35 implementation and ensure the + 1 is added.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
commit 0887054d14 ("drm/amd: Drop abm_level property") dropped the
abm level property in favor of sysfs control. Since then there have
been discussions that compositors showed an interest in modifying
a vendor specific property instead.
So re-introduce the abm level property, but with different semantics.
Rather than being an integer it's now an enum. One of the enum options
is 'sysfs', and that is because there is still a sysfs file for use by
userspace when the compositor doesn't support this property.
If usespace has not modified this property, the default value will
be for sysfs to control it. Once userspace has set the property stop
allowing sysfs control.
The property is only attached to non-OLED eDP panels.
Cc: Xaver Hugl <xaver.hugl@kde.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Before commit 33056a97ae ("drm/amd/display: Remove double checks for
`debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
checked the low-power debug flag before calling
dpp3_power_on_blnd_lut(false).
After commit 33056a97ae ("drm/amd/display: Remove double checks for
`debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
unconditionally calls dpp3_power_on_blnd_lut(false). The BLNDGAM power
helper writes BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled, causing
immediate SRAM power toggles instead of deferring at vupdate. This can
disrupt atomic color/LUT sequencing during transitions between
direct scanout and composition within gamescope's DRM backend on
Steam Deck OLED.
To fix this, leave the BLNDGAM power state unchanged when low-power is
disabled, matching dpp3_power_on_hdr3dlut and dpp3_power_on_shaper.
Fixes: 33056a97ae ("drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm`")
Signed-off-by: Matthew Schwartz <matthew.schwartz@linux.dev>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This version brings along following update:
-Fix GFP_ATOMIC abuse
-Fix several checkpatch issues
-Set DCN32 to use update planes and stream version 3
-Write segment pointer with mot enabled for MST
-Control BW allocation in FW side
-Change clean dsc blocks condition in accelerated mode
-Check disable_fec flag before enabling FEC
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Some mst branches NAK's segment pointer writes with mot disabled.
So reset of segment pointer to 0 should be performed with mot enabled.
[How]
Write segment pointer of mst branch devices with mot enabled.
Reviewed-by: Cruise Hung <cruise.hung@amd.com>
Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
